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clocksource: make CLOCKSOURCE_OF_DECLARE type safe
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1/*
2 * This file contains common code that is intended to be used across
3 * boards so that it's not replicated.
4 *
5 * Copyright (C) 2011 Xilinx
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/cpumask.h>
20#include <linux/platform_device.h>
21#include <linux/clk.h>
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22#include <linux/clk/zynq.h>
23#include <linux/of_address.h>
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24#include <linux/of_irq.h>
25#include <linux/of_platform.h>
3d64b449 26#include <linux/of.h>
c0675617 27#include <linux/irqchip.h>
b85a3ef4 28
3d64b449 29#include <asm/mach/arch.h>
b85a3ef4 30#include <asm/mach/map.h>
03e07595 31#include <asm/mach/time.h>
3d64b449 32#include <asm/mach-types.h>
b85a3ef4 33#include <asm/page.h>
9a45eb69 34#include <asm/pgtable.h>
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35#include <asm/hardware/cache-l2x0.h>
36
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37#include "common.h"
38
39static struct of_device_id zynq_of_bus_ids[] __initdata = {
40 { .compatible = "simple-bus", },
41 {}
42};
43
44/**
45 * xilinx_init_machine() - System specific initialization, intended to be
46 * called from board specific initialization.
47 */
3d64b449 48static void __init xilinx_init_machine(void)
b85a3ef4 49{
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50 /*
51 * 64KB way size, 8-way associativity, parity disabled
52 */
0fcfdbca 53 l2x0_of_init(0x02060000, 0xF0F0FFFF);
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54
55 of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
56}
57
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58#define SCU_PERIPH_PHYS 0xF8F00000
59#define SCU_PERIPH_SIZE SZ_8K
60#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE)
b85a3ef4 61
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62static struct map_desc scu_desc __initdata = {
63 .virtual = SCU_PERIPH_VIRT,
64 .pfn = __phys_to_pfn(SCU_PERIPH_PHYS),
65 .length = SCU_PERIPH_SIZE,
66 .type = MT_DEVICE,
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67};
68
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69static void __init xilinx_zynq_timer_init(void)
70{
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71 struct device_node *np;
72 void __iomem *slcr;
73
74 np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");
75 slcr = of_iomap(np, 0);
76 WARN_ON(!slcr);
77
78 xilinx_zynq_clocks_init(slcr);
79
f184c5ca 80 xttcps_timer_init();
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81}
82
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83/**
84 * xilinx_map_io() - Create memory mappings needed for early I/O.
85 */
3d64b449 86static void __init xilinx_map_io(void)
b85a3ef4 87{
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88 debug_ll_io_init();
89 iotable_init(&scu_desc, 1);
b85a3ef4 90}
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91
92static const char *xilinx_dt_match[] = {
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93 "xlnx,zynq-zc702",
94 "xlnx,zynq-7000",
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95 NULL
96};
97
98MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
99 .map_io = xilinx_map_io,
0529e315 100 .init_irq = irqchip_init,
3d64b449 101 .init_machine = xilinx_init_machine,
6bb27d73 102 .init_time = xilinx_zynq_timer_init,
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103 .dt_compat = xilinx_dt_match,
104MACHINE_END