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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mm/copypage-v6.c | |
3 | * | |
4 | * Copyright (C) 2002 Deep Blue Solutions Ltd, All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | #include <linux/init.h> | |
11 | #include <linux/spinlock.h> | |
12 | #include <linux/mm.h> | |
063b0a42 | 13 | #include <linux/highmem.h> |
1da177e4 | 14 | |
1da177e4 LT |
15 | #include <asm/pgtable.h> |
16 | #include <asm/shmparam.h> | |
17 | #include <asm/tlbflush.h> | |
18 | #include <asm/cacheflush.h> | |
46097c7d | 19 | #include <asm/cachetype.h> |
1da177e4 | 20 | |
1b2e2b73 RK |
21 | #include "mm.h" |
22 | ||
1da177e4 LT |
23 | #if SHMLBA > 16384 |
24 | #error FIX ME | |
25 | #endif | |
26 | ||
bd31b859 | 27 | static DEFINE_RAW_SPINLOCK(v6_lock); |
1da177e4 | 28 | |
1da177e4 LT |
29 | /* |
30 | * Copy the user page. No aliasing to deal with so we can just | |
31 | * attack the kernel's existing mapping of these pages. | |
32 | */ | |
063b0a42 | 33 | static void v6_copy_user_highpage_nonaliasing(struct page *to, |
f00a75c0 | 34 | struct page *from, unsigned long vaddr, struct vm_area_struct *vma) |
1da177e4 | 35 | { |
063b0a42 RK |
36 | void *kto, *kfrom; |
37 | ||
5472e862 CW |
38 | kfrom = kmap_atomic(from); |
39 | kto = kmap_atomic(to); | |
1da177e4 | 40 | copy_page(kto, kfrom); |
5472e862 CW |
41 | kunmap_atomic(kto); |
42 | kunmap_atomic(kfrom); | |
1da177e4 LT |
43 | } |
44 | ||
45 | /* | |
46 | * Clear the user page. No aliasing to deal with so we can just | |
47 | * attack the kernel's existing mapping of this page. | |
48 | */ | |
303c6443 | 49 | static void v6_clear_user_highpage_nonaliasing(struct page *page, unsigned long vaddr) |
1da177e4 | 50 | { |
5472e862 | 51 | void *kaddr = kmap_atomic(page); |
1da177e4 | 52 | clear_page(kaddr); |
5472e862 | 53 | kunmap_atomic(kaddr); |
1da177e4 LT |
54 | } |
55 | ||
56 | /* | |
063b0a42 RK |
57 | * Discard data in the kernel mapping for the new page. |
58 | * FIXME: needs this MCRR to be supported. | |
1da177e4 | 59 | */ |
063b0a42 | 60 | static void discard_old_kernel_data(void *kto) |
1da177e4 | 61 | { |
1da177e4 LT |
62 | __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06" |
63 | : | |
64 | : "r" (kto), | |
80231874 | 65 | "r" ((unsigned long)kto + PAGE_SIZE - 1) |
1da177e4 | 66 | : "cc"); |
063b0a42 RK |
67 | } |
68 | ||
69 | /* | |
70 | * Copy the page, taking account of the cache colour. | |
71 | */ | |
72 | static void v6_copy_user_highpage_aliasing(struct page *to, | |
f00a75c0 | 73 | struct page *from, unsigned long vaddr, struct vm_area_struct *vma) |
063b0a42 RK |
74 | { |
75 | unsigned int offset = CACHE_COLOUR(vaddr); | |
76 | unsigned long kfrom, kto; | |
77 | ||
c0177800 | 78 | if (!test_and_set_bit(PG_dcache_clean, &from->flags)) |
063b0a42 RK |
79 | __flush_dcache_page(page_mapping(from), from); |
80 | ||
81 | /* FIXME: not highmem safe */ | |
82 | discard_old_kernel_data(page_address(to)); | |
1da177e4 LT |
83 | |
84 | /* | |
85 | * Now copy the page using the same cache colour as the | |
86 | * pages ultimate destination. | |
87 | */ | |
bd31b859 | 88 | raw_spin_lock(&v6_lock); |
1da177e4 | 89 | |
de27c308 RK |
90 | kfrom = COPYPAGE_V6_FROM + (offset << PAGE_SHIFT); |
91 | kto = COPYPAGE_V6_TO + (offset << PAGE_SHIFT); | |
1da177e4 | 92 | |
67ece144 RK |
93 | set_top_pte(kfrom, mk_pte(from, PAGE_KERNEL)); |
94 | set_top_pte(kto, mk_pte(to, PAGE_KERNEL)); | |
1da177e4 | 95 | |
063b0a42 | 96 | copy_page((void *)kto, (void *)kfrom); |
1da177e4 | 97 | |
bd31b859 | 98 | raw_spin_unlock(&v6_lock); |
1da177e4 LT |
99 | } |
100 | ||
101 | /* | |
102 | * Clear the user page. We need to deal with the aliasing issues, | |
103 | * so remap the kernel page into the same cache colour as the user | |
104 | * page. | |
105 | */ | |
303c6443 | 106 | static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vaddr) |
1da177e4 | 107 | { |
de27c308 | 108 | unsigned long to = COPYPAGE_V6_TO + (CACHE_COLOUR(vaddr) << PAGE_SHIFT); |
1da177e4 | 109 | |
303c6443 RK |
110 | /* FIXME: not highmem safe */ |
111 | discard_old_kernel_data(page_address(page)); | |
1da177e4 LT |
112 | |
113 | /* | |
114 | * Now clear the page using the same cache colour as | |
115 | * the pages ultimate destination. | |
116 | */ | |
bd31b859 | 117 | raw_spin_lock(&v6_lock); |
1da177e4 | 118 | |
67ece144 | 119 | set_top_pte(to, mk_pte(page, PAGE_KERNEL)); |
1da177e4 LT |
120 | clear_page((void *)to); |
121 | ||
bd31b859 | 122 | raw_spin_unlock(&v6_lock); |
1da177e4 LT |
123 | } |
124 | ||
125 | struct cpu_user_fns v6_user_fns __initdata = { | |
303c6443 | 126 | .cpu_clear_user_highpage = v6_clear_user_highpage_nonaliasing, |
063b0a42 | 127 | .cpu_copy_user_highpage = v6_copy_user_highpage_nonaliasing, |
1da177e4 LT |
128 | }; |
129 | ||
130 | static int __init v6_userpage_init(void) | |
131 | { | |
132 | if (cache_is_vipt_aliasing()) { | |
303c6443 | 133 | cpu_user.cpu_clear_user_highpage = v6_clear_user_highpage_aliasing; |
063b0a42 | 134 | cpu_user.cpu_copy_user_highpage = v6_copy_user_highpage_aliasing; |
1da177e4 LT |
135 | } |
136 | ||
137 | return 0; | |
138 | } | |
139 | ||
08ee4e4c | 140 | core_initcall(v6_userpage_init); |