]>
Commit | Line | Data |
---|---|---|
d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
d73e60b7 RK |
2 | /* |
3 | * linux/arch/arm/mm/copypage-xsc3.S | |
4 | * | |
5 | * Copyright (C) 2004 Intel Corp. | |
6 | * | |
d73e60b7 RK |
7 | * Adapted for 3rd gen XScale core, no more mini-dcache |
8 | * Author: Matt Gilbert (matthew.m.gilbert@intel.com) | |
9 | */ | |
10 | #include <linux/init.h> | |
063b0a42 | 11 | #include <linux/highmem.h> |
d73e60b7 RK |
12 | |
13 | /* | |
14 | * General note: | |
15 | * We don't really want write-allocate cache behaviour for these functions | |
16 | * since that will just eat through 8K of the cache. | |
17 | */ | |
18 | ||
19 | /* | |
063b0a42 | 20 | * XSC3 optimised copy_user_highpage |
d73e60b7 RK |
21 | * |
22 | * The source page may have some clean entries in the cache already, but we | |
23 | * can safely ignore them - break_cow() will flush them out of the cache | |
24 | * if we eventually end up using our copied page. | |
25 | * | |
26 | */ | |
b99afae1 | 27 | static void xsc3_mc_copy_user_page(void *kto, const void *kfrom) |
d73e60b7 | 28 | { |
b99afae1 NP |
29 | int tmp; |
30 | ||
31 | asm volatile ("\ | |
32 | pld [%1, #0] \n\ | |
33 | pld [%1, #32] \n\ | |
34 | 1: pld [%1, #64] \n\ | |
35 | pld [%1, #96] \n\ | |
d73e60b7 | 36 | \n\ |
bc2eca9a NP |
37 | 2: ldrd r2, r3, [%1], #8 \n\ |
38 | ldrd r4, r5, [%1], #8 \n\ | |
b99afae1 | 39 | mcr p15, 0, %0, c7, c6, 1 @ invalidate\n\ |
bc2eca9a NP |
40 | strd r2, r3, [%0], #8 \n\ |
41 | ldrd r2, r3, [%1], #8 \n\ | |
42 | strd r4, r5, [%0], #8 \n\ | |
43 | ldrd r4, r5, [%1], #8 \n\ | |
44 | strd r2, r3, [%0], #8 \n\ | |
45 | strd r4, r5, [%0], #8 \n\ | |
46 | ldrd r2, r3, [%1], #8 \n\ | |
47 | ldrd r4, r5, [%1], #8 \n\ | |
b99afae1 | 48 | mcr p15, 0, %0, c7, c6, 1 @ invalidate\n\ |
bc2eca9a NP |
49 | strd r2, r3, [%0], #8 \n\ |
50 | ldrd r2, r3, [%1], #8 \n\ | |
b99afae1 | 51 | subs %2, %2, #1 \n\ |
bc2eca9a NP |
52 | strd r4, r5, [%0], #8 \n\ |
53 | ldrd r4, r5, [%1], #8 \n\ | |
54 | strd r2, r3, [%0], #8 \n\ | |
55 | strd r4, r5, [%0], #8 \n\ | |
d73e60b7 | 56 | bgt 1b \n\ |
b99afae1 NP |
57 | beq 2b " |
58 | : "+&r" (kto), "+&r" (kfrom), "=&r" (tmp) | |
59 | : "2" (PAGE_SIZE / 64 - 1) | |
60 | : "r2", "r3", "r4", "r5"); | |
d73e60b7 RK |
61 | } |
62 | ||
063b0a42 | 63 | void xsc3_mc_copy_user_highpage(struct page *to, struct page *from, |
f00a75c0 | 64 | unsigned long vaddr, struct vm_area_struct *vma) |
063b0a42 RK |
65 | { |
66 | void *kto, *kfrom; | |
67 | ||
5472e862 CW |
68 | kto = kmap_atomic(to); |
69 | kfrom = kmap_atomic(from); | |
2725898f | 70 | flush_cache_page(vma, vaddr, page_to_pfn(from)); |
063b0a42 | 71 | xsc3_mc_copy_user_page(kto, kfrom); |
5472e862 CW |
72 | kunmap_atomic(kfrom); |
73 | kunmap_atomic(kto); | |
063b0a42 RK |
74 | } |
75 | ||
d73e60b7 RK |
76 | /* |
77 | * XScale optimised clear_user_page | |
d73e60b7 | 78 | */ |
303c6443 | 79 | void xsc3_mc_clear_user_highpage(struct page *page, unsigned long vaddr) |
d73e60b7 | 80 | { |
5472e862 | 81 | void *ptr, *kaddr = kmap_atomic(page); |
43ae286b NP |
82 | asm volatile ("\ |
83 | mov r1, %2 \n\ | |
d73e60b7 RK |
84 | mov r2, #0 \n\ |
85 | mov r3, #0 \n\ | |
303c6443 | 86 | 1: mcr p15, 0, %0, c7, c6, 1 @ invalidate line\n\ |
bc2eca9a NP |
87 | strd r2, r3, [%0], #8 \n\ |
88 | strd r2, r3, [%0], #8 \n\ | |
89 | strd r2, r3, [%0], #8 \n\ | |
90 | strd r2, r3, [%0], #8 \n\ | |
d73e60b7 | 91 | subs r1, r1, #1 \n\ |
303c6443 | 92 | bne 1b" |
43ae286b NP |
93 | : "=r" (ptr) |
94 | : "0" (kaddr), "I" (PAGE_SIZE / 32) | |
303c6443 | 95 | : "r1", "r2", "r3"); |
5472e862 | 96 | kunmap_atomic(kaddr); |
d73e60b7 RK |
97 | } |
98 | ||
99 | struct cpu_user_fns xsc3_mc_user_fns __initdata = { | |
303c6443 | 100 | .cpu_clear_user_highpage = xsc3_mc_clear_user_highpage, |
063b0a42 | 101 | .cpu_copy_user_highpage = xsc3_mc_copy_user_highpage, |
d73e60b7 | 102 | }; |