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48388b2a LB |
1 | /* |
2 | * arch/arm/plat-iop/time.c | |
3 | * | |
4 | * Timer code for IOP32x and IOP33x based systems | |
5 | * | |
6 | * Author: Deepak Saxena <dsaxena@mvista.com> | |
7 | * | |
8 | * Copyright 2002-2003 MontaVista Software Inc. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/time.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/timex.h> | |
a09e64fb | 21 | #include <mach/hardware.h> |
48388b2a LB |
22 | #include <asm/io.h> |
23 | #include <asm/irq.h> | |
24 | #include <asm/uaccess.h> | |
25 | #include <asm/mach/irq.h> | |
26 | #include <asm/mach/time.h> | |
a09e64fb | 27 | #include <mach/time.h> |
48388b2a LB |
28 | |
29 | static unsigned long ticks_per_jiffy; | |
30 | static unsigned long ticks_per_usec; | |
31 | static unsigned long next_jiffy_time; | |
32 | ||
3668b45d | 33 | unsigned long iop_gettimeoffset(void) |
48388b2a | 34 | { |
8903fcce | 35 | unsigned long offset, temp; |
3668b45d DW |
36 | |
37 | /* enable cp6, if necessary, to avoid taking the overhead of an | |
38 | * undefined instruction trap | |
39 | */ | |
40 | asm volatile ( | |
41 | "mrc p15, 0, %0, c15, c1, 0\n\t" | |
8903fcce | 42 | "tst %0, #(1 << 6)\n\t" |
3668b45d DW |
43 | "orreq %0, %0, #(1 << 6)\n\t" |
44 | "mcreq p15, 0, %0, c15, c1, 0\n\t" | |
8903fcce | 45 | #ifdef CONFIG_CPU_XSCALE |
3668b45d DW |
46 | "mrceq p15, 0, %0, c15, c1, 0\n\t" |
47 | "moveq %0, %0\n\t" | |
48 | "subeq pc, pc, #4\n\t" | |
49 | #endif | |
8903fcce | 50 | : "=r"(temp) : : "cc"); |
48388b2a | 51 | |
3668b45d | 52 | offset = next_jiffy_time - read_tcr1(); |
48388b2a LB |
53 | |
54 | return offset / ticks_per_usec; | |
55 | } | |
56 | ||
57 | static irqreturn_t | |
3668b45d | 58 | iop_timer_interrupt(int irq, void *dev_id) |
48388b2a | 59 | { |
3668b45d | 60 | write_tisr(1); |
48388b2a | 61 | |
3668b45d DW |
62 | while ((signed long)(next_jiffy_time - read_tcr1()) |
63 | >= ticks_per_jiffy) { | |
0cd61b68 | 64 | timer_tick(); |
48388b2a LB |
65 | next_jiffy_time -= ticks_per_jiffy; |
66 | } | |
67 | ||
48388b2a LB |
68 | return IRQ_HANDLED; |
69 | } | |
70 | ||
3668b45d DW |
71 | static struct irqaction iop_timer_irq = { |
72 | .name = "IOP Timer Tick", | |
73 | .handler = iop_timer_interrupt, | |
b30fabad | 74 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
48388b2a LB |
75 | }; |
76 | ||
70c14ff0 DW |
77 | static unsigned long iop_tick_rate; |
78 | unsigned long get_iop_tick_rate(void) | |
79 | { | |
80 | return iop_tick_rate; | |
81 | } | |
82 | EXPORT_SYMBOL(get_iop_tick_rate); | |
83 | ||
3668b45d | 84 | void __init iop_init_time(unsigned long tick_rate) |
48388b2a LB |
85 | { |
86 | u32 timer_ctl; | |
87 | ||
88 | ticks_per_jiffy = (tick_rate + HZ/2) / HZ; | |
89 | ticks_per_usec = tick_rate / 1000000; | |
90 | next_jiffy_time = 0xffffffff; | |
70c14ff0 | 91 | iop_tick_rate = tick_rate; |
48388b2a | 92 | |
3668b45d DW |
93 | timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED | |
94 | IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1; | |
48388b2a LB |
95 | |
96 | /* | |
97 | * We use timer 0 for our timer interrupt, and timer 1 as | |
98 | * monotonic counter for tracking missed jiffies. | |
99 | */ | |
3668b45d DW |
100 | write_trr0(ticks_per_jiffy - 1); |
101 | write_tmr0(timer_ctl); | |
102 | write_trr1(0xffffffff); | |
103 | write_tmr1(timer_ctl); | |
48388b2a | 104 | |
3668b45d | 105 | setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq); |
48388b2a | 106 | } |