]>
Commit | Line | Data |
---|---|---|
2db68237 UKK |
1 | /* |
2 | * Copyright (C) 2009-2010 Pengutronix | |
3 | * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it under | |
6 | * the terms of the GNU General Public License version 2 as published by the | |
7 | * Free Software Foundation. | |
8 | */ | |
5162de08 | 9 | #include <mach/hardware.h> |
2db68237 UKK |
10 | #include <mach/devices-common.h> |
11 | ||
5162de08 UKK |
12 | #define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \ |
13 | [_id] = { \ | |
14 | .id = _id, \ | |
15 | .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \ | |
16 | .iosize = _size, \ | |
17 | .irqrx = soc ## _INT_UART ## _hwid ## RX, \ | |
18 | .irqtx = soc ## _INT_UART ## _hwid ## TX, \ | |
19 | .irqrts = soc ## _INT_UART ## _hwid ## RTS, \ | |
20 | } | |
21 | ||
22 | #define imx_imx_uart_1irq_data_entry(soc, _id, _hwid, _size) \ | |
23 | [_id] = { \ | |
24 | .id = _id, \ | |
25 | .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \ | |
26 | .iosize = _size, \ | |
27 | .irq = soc ## _INT_UART ## _hwid, \ | |
28 | } | |
29 | ||
30 | #ifdef CONFIG_SOC_IMX1 | |
31 | const struct imx_imx_uart_3irq_data imx1_imx_uart_data[] __initconst = { | |
32 | #define imx1_imx_uart_data_entry(_id, _hwid) \ | |
33 | imx_imx_uart_3irq_data_entry(MX1, _id, _hwid, 0xd0) | |
34 | imx1_imx_uart_data_entry(0, 1), | |
35 | imx1_imx_uart_data_entry(1, 2), | |
36 | }; | |
37 | #endif /* ifdef CONFIG_SOC_IMX1 */ | |
38 | ||
39 | #ifdef CONFIG_SOC_IMX21 | |
40 | const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst = { | |
41 | #define imx21_imx_uart_data_entry(_id, _hwid) \ | |
42 | imx_imx_uart_1irq_data_entry(MX21, _id, _hwid, SZ_4K) | |
43 | imx21_imx_uart_data_entry(0, 1), | |
44 | imx21_imx_uart_data_entry(1, 2), | |
45 | imx21_imx_uart_data_entry(2, 3), | |
46 | imx21_imx_uart_data_entry(3, 4), | |
47 | }; | |
48 | #endif | |
49 | ||
972cc482 | 50 | #ifdef CONFIG_SOC_IMX25 |
5162de08 UKK |
51 | const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst = { |
52 | #define imx25_imx_uart_data_entry(_id, _hwid) \ | |
53 | imx_imx_uart_1irq_data_entry(MX25, _id, _hwid, SZ_16K) | |
54 | imx25_imx_uart_data_entry(0, 1), | |
55 | imx25_imx_uart_data_entry(1, 2), | |
56 | imx25_imx_uart_data_entry(2, 3), | |
57 | imx25_imx_uart_data_entry(3, 4), | |
58 | imx25_imx_uart_data_entry(4, 5), | |
59 | }; | |
972cc482 | 60 | #endif /* ifdef CONFIG_SOC_IMX25 */ |
5162de08 UKK |
61 | |
62 | #ifdef CONFIG_SOC_IMX27 | |
63 | const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst = { | |
64 | #define imx27_imx_uart_data_entry(_id, _hwid) \ | |
65 | imx_imx_uart_1irq_data_entry(MX27, _id, _hwid, SZ_4K) | |
66 | imx27_imx_uart_data_entry(0, 1), | |
67 | imx27_imx_uart_data_entry(1, 2), | |
68 | imx27_imx_uart_data_entry(2, 3), | |
69 | imx27_imx_uart_data_entry(3, 4), | |
70 | imx27_imx_uart_data_entry(4, 5), | |
71 | imx27_imx_uart_data_entry(5, 6), | |
72 | }; | |
73 | #endif /* ifdef CONFIG_SOC_IMX27 */ | |
74 | ||
a528bc87 | 75 | #ifdef CONFIG_SOC_IMX31 |
5162de08 UKK |
76 | const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst = { |
77 | #define imx31_imx_uart_data_entry(_id, _hwid) \ | |
78 | imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_4K) | |
79 | imx31_imx_uart_data_entry(0, 1), | |
80 | imx31_imx_uart_data_entry(1, 2), | |
81 | imx31_imx_uart_data_entry(2, 3), | |
82 | imx31_imx_uart_data_entry(3, 4), | |
83 | imx31_imx_uart_data_entry(4, 5), | |
84 | }; | |
a528bc87 | 85 | #endif /* ifdef CONFIG_SOC_IMX31 */ |
5162de08 | 86 | |
a528bc87 | 87 | #ifdef CONFIG_SOC_IMX35 |
5162de08 UKK |
88 | const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = { |
89 | #define imx35_imx_uart_data_entry(_id, _hwid) \ | |
9954c57d | 90 | imx_imx_uart_1irq_data_entry(MX35, _id, _hwid, SZ_16K) |
5162de08 UKK |
91 | imx35_imx_uart_data_entry(0, 1), |
92 | imx35_imx_uart_data_entry(1, 2), | |
93 | imx35_imx_uart_data_entry(2, 3), | |
94 | }; | |
a528bc87 | 95 | #endif /* ifdef CONFIG_SOC_IMX35 */ |
5162de08 | 96 | |
3d5a44be RZ |
97 | #ifdef CONFIG_SOC_IMX50 |
98 | const struct imx_imx_uart_1irq_data imx50_imx_uart_data[] __initconst = { | |
99 | #define imx50_imx_uart_data_entry(_id, _hwid) \ | |
100 | imx_imx_uart_1irq_data_entry(MX50, _id, _hwid, SZ_4K) | |
101 | imx50_imx_uart_data_entry(0, 1), | |
102 | imx50_imx_uart_data_entry(1, 2), | |
103 | imx50_imx_uart_data_entry(2, 3), | |
104 | imx50_imx_uart_data_entry(3, 4), | |
105 | imx50_imx_uart_data_entry(4, 5), | |
106 | }; | |
107 | #endif /* ifdef CONFIG_SOC_IMX50 */ | |
108 | ||
d94ed128 | 109 | #ifdef CONFIG_SOC_IMX51 |
04b73b15 UKK |
110 | const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst = { |
111 | #define imx51_imx_uart_data_entry(_id, _hwid) \ | |
112 | imx_imx_uart_1irq_data_entry(MX51, _id, _hwid, SZ_4K) | |
113 | imx51_imx_uart_data_entry(0, 1), | |
114 | imx51_imx_uart_data_entry(1, 2), | |
115 | imx51_imx_uart_data_entry(2, 3), | |
116 | }; | |
d94ed128 | 117 | #endif /* ifdef CONFIG_SOC_IMX51 */ |
04b73b15 | 118 | |
a58154d1 YS |
119 | #ifdef CONFIG_SOC_IMX53 |
120 | const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst = { | |
121 | #define imx53_imx_uart_data_entry(_id, _hwid) \ | |
122 | imx_imx_uart_1irq_data_entry(MX53, _id, _hwid, SZ_4K) | |
123 | imx53_imx_uart_data_entry(0, 1), | |
124 | imx53_imx_uart_data_entry(1, 2), | |
125 | imx53_imx_uart_data_entry(2, 3), | |
fce43f99 FE |
126 | imx53_imx_uart_data_entry(3, 4), |
127 | imx53_imx_uart_data_entry(4, 5), | |
a58154d1 YS |
128 | }; |
129 | #endif /* ifdef CONFIG_SOC_IMX53 */ | |
130 | ||
5162de08 UKK |
131 | struct platform_device *__init imx_add_imx_uart_3irq( |
132 | const struct imx_imx_uart_3irq_data *data, | |
2db68237 UKK |
133 | const struct imxuart_platform_data *pdata) |
134 | { | |
135 | struct resource res[] = { | |
136 | { | |
5162de08 UKK |
137 | .start = data->iobase, |
138 | .end = data->iobase + data->iosize - 1, | |
2db68237 UKK |
139 | .flags = IORESOURCE_MEM, |
140 | }, { | |
5162de08 UKK |
141 | .start = data->irqrx, |
142 | .end = data->irqrx, | |
2db68237 UKK |
143 | .flags = IORESOURCE_IRQ, |
144 | }, { | |
5162de08 UKK |
145 | .start = data->irqtx, |
146 | .end = data->irqtx, | |
2db68237 UKK |
147 | .flags = IORESOURCE_IRQ, |
148 | }, { | |
5162de08 UKK |
149 | .start = data->irqrts, |
150 | .end = data->irqrx, | |
2db68237 UKK |
151 | .flags = IORESOURCE_IRQ, |
152 | }, | |
153 | }; | |
154 | ||
fe6b540a | 155 | return imx_add_platform_device("imx1-uart", data->id, res, |
5162de08 | 156 | ARRAY_SIZE(res), pdata, sizeof(*pdata)); |
2db68237 UKK |
157 | } |
158 | ||
5162de08 UKK |
159 | struct platform_device *__init imx_add_imx_uart_1irq( |
160 | const struct imx_imx_uart_1irq_data *data, | |
2db68237 UKK |
161 | const struct imxuart_platform_data *pdata) |
162 | { | |
163 | struct resource res[] = { | |
164 | { | |
5162de08 UKK |
165 | .start = data->iobase, |
166 | .end = data->iobase + data->iosize - 1, | |
2db68237 UKK |
167 | .flags = IORESOURCE_MEM, |
168 | }, { | |
5162de08 UKK |
169 | .start = data->irq, |
170 | .end = data->irq, | |
2db68237 UKK |
171 | .flags = IORESOURCE_IRQ, |
172 | }, | |
173 | }; | |
174 | ||
fe6b540a SG |
175 | /* i.mx21 type uart runs on all i.mx except i.mx1 */ |
176 | return imx_add_platform_device("imx21-uart", data->id, | |
177 | res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); | |
2db68237 | 178 | } |