projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 52c543f9 QJ |
1 | /* |
| 2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | |
| 3 | */ | |
| 4 | ||
| 5 | /* | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | */ | |
| 10 | ||
| 11 | #ifndef __ASM_ARCH_MXC_COMMON_H__ | |
| 12 | #define __ASM_ARCH_MXC_COMMON_H__ | |
| 13 | ||
| 282b13d0 | 14 | struct platform_device; |
| 30c730f8 | 15 | struct clk; |
| 282b13d0 | 16 | |
| cd4a05f9 SH |
17 | extern void mx1_map_io(void); |
| 18 | extern void mx21_map_io(void); | |
| 8c25c36f | 19 | extern void mx25_map_io(void); |
| cd4a05f9 SH |
20 | extern void mx27_map_io(void); |
| 21 | extern void mx31_map_io(void); | |
| 22 | extern void mx35_map_io(void); | |
| 3d5a44be | 23 | extern void mx50_map_io(void); |
| a329b48c | 24 | extern void mx51_map_io(void); |
| c0abefd3 | 25 | extern void mx53_map_io(void); |
| 3dac2196 UKK |
26 | extern void imx1_init_early(void); |
| 27 | extern void imx21_init_early(void); | |
| 28 | extern void imx25_init_early(void); | |
| 29 | extern void imx27_init_early(void); | |
| 97976e22 UKK |
30 | extern void imx31_init_early(void); |
| 31 | extern void imx35_init_early(void); | |
| 32 | extern void imx50_init_early(void); | |
| ab130421 UKK |
33 | extern void imx51_init_early(void); |
| 34 | extern void imx53_init_early(void); | |
| c5aa0ad0 | 35 | extern void mxc_init_irq(void __iomem *); |
| a003708a | 36 | extern void tzic_init_irq(void __iomem *); |
| c5aa0ad0 SH |
37 | extern void mx1_init_irq(void); |
| 38 | extern void mx21_init_irq(void); | |
| 8c25c36f | 39 | extern void mx25_init_irq(void); |
| c5aa0ad0 SH |
40 | extern void mx27_init_irq(void); |
| 41 | extern void mx31_init_irq(void); | |
| 42 | extern void mx35_init_irq(void); | |
| 3d5a44be | 43 | extern void mx50_init_irq(void); |
| a329b48c | 44 | extern void mx51_init_irq(void); |
| c0abefd3 | 45 | extern void mx53_init_irq(void); |
| b78d8e59 SG |
46 | extern void imx1_soc_init(void); |
| 47 | extern void imx21_soc_init(void); | |
| 48 | extern void imx25_soc_init(void); | |
| 49 | extern void imx27_soc_init(void); | |
| 50 | extern void imx31_soc_init(void); | |
| 51 | extern void imx35_soc_init(void); | |
| 52 | extern void imx50_soc_init(void); | |
| 53 | extern void imx51_soc_init(void); | |
| 54 | extern void imx53_soc_init(void); | |
| f2b8901d | 55 | extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq); |
| 8db5d1a6 | 56 | extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); |
| 30c730f8 | 57 | extern int mx1_clocks_init(unsigned long fref); |
| aa3b0a6f | 58 | extern int mx21_clocks_init(unsigned long lref, unsigned long fref); |
| fadc0956 | 59 | extern int mx25_clocks_init(void); |
| 30c730f8 SH |
60 | extern int mx27_clocks_init(unsigned long fref); |
| 61 | extern int mx31_clocks_init(unsigned long fref); | |
| 2cb536d1 | 62 | extern int mx35_clocks_init(void); |
| a329b48c AK |
63 | extern int mx51_clocks_init(unsigned long ckil, unsigned long osc, |
| 64 | unsigned long ckih1, unsigned long ckih2); | |
| c0abefd3 DN |
65 | extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, |
| 66 | unsigned long ckih1, unsigned long ckih2); | |
| e7fc6ae7 | 67 | extern struct platform_device *mxc_register_gpio(char *name, int id, |
| b78d8e59 | 68 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); |
| 198016e1 | 69 | extern void mxc_set_cpu_type(unsigned int type); |
| be124c94 | 70 | extern void mxc_arch_reset_init(void __iomem *); |
| c2932bf4 | 71 | extern void mx51_efikamx_reset(void); |
| c0abefd3 | 72 | extern int mx53_revision(void); |
| 2d95378b | 73 | extern int mx53_display_revision(void); |
| 41e7daf2 SG |
74 | |
| 75 | enum mxc_cpu_pwr_mode { | |
| 76 | WAIT_CLOCKED, /* wfi only */ | |
| 77 | WAIT_UNCLOCKED, /* WAIT */ | |
| 78 | WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ | |
| 79 | STOP_POWER_ON, /* just STOP */ | |
| 80 | STOP_POWER_OFF, /* STOP + SRPG */ | |
| 81 | }; | |
| 82 | ||
| 83 | extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode); | |
| 84 | extern void (*imx_idle)(void); | |
| 059e58f6 | 85 | extern void imx_print_silicon_rev(const char *cpu, int srev); |
| b6de943b SH |
86 | |
| 87 | void avic_handle_irq(struct pt_regs *); | |
| 58a92600 | 88 | void tzic_handle_irq(struct pt_regs *); |
| 1103643c | 89 | void gic_handle_irq(struct pt_regs *); |
| b6de943b SH |
90 | |
| 91 | #define imx1_handle_irq avic_handle_irq | |
| 92 | #define imx21_handle_irq avic_handle_irq | |
| 93 | #define imx25_handle_irq avic_handle_irq | |
| 94 | #define imx27_handle_irq avic_handle_irq | |
| 95 | #define imx31_handle_irq avic_handle_irq | |
| 96 | #define imx35_handle_irq avic_handle_irq | |
| 58a92600 SH |
97 | #define imx50_handle_irq tzic_handle_irq |
| 98 | #define imx51_handle_irq tzic_handle_irq | |
| 99 | #define imx53_handle_irq tzic_handle_irq | |
| 1103643c | 100 | #define imx6q_handle_irq gic_handle_irq |
| b6de943b | 101 | |
| 52c543f9 | 102 | #endif |