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52c543f9 | 1 | /* |
a09e64fb | 2 | * arch/arm/plat-mxc/include/mach/uncompress.h |
52c543f9 QJ |
3 | * |
4 | * | |
5 | * | |
6 | * Copyright (C) 1999 ARM Limited | |
7 | * Copyright (C) Shane Nay (shane@minirl.com) | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | */ | |
23 | #ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__ | |
24 | #define __ASM_ARCH_MXC_UNCOMPRESS_H__ | |
25 | ||
26 | #define __MXC_BOOT_UNCOMPRESS | |
27 | ||
a09e64fb | 28 | #include <mach/hardware.h> |
d30c74a0 | 29 | #include <asm/mach-types.h> |
52c543f9 | 30 | |
d30c74a0 SH |
31 | static unsigned long uart_base; |
32 | ||
33 | #define UART(x) (*(volatile unsigned long *)(uart_base + (x))) | |
52c543f9 QJ |
34 | |
35 | #define USR2 0x98 | |
36 | #define USR2_TXFE (1<<14) | |
37 | #define TXR 0x40 | |
38 | #define UCR1 0x80 | |
39 | #define UCR1_UARTEN 1 | |
40 | ||
41 | /* | |
42 | * The following code assumes the serial port has already been | |
43 | * initialized by the bootloader. We search for the first enabled | |
44 | * port in the most probable order. If you didn't setup a port in | |
45 | * your bootloader then nothing will appear (which might be desired). | |
46 | * | |
47 | * This does not append a newline | |
48 | */ | |
49 | ||
50 | static void putc(int ch) | |
51 | { | |
d30c74a0 SH |
52 | if (!uart_base) |
53 | return; | |
54 | if (!(UART(UCR1) & UCR1_UARTEN)) | |
55 | return; | |
52c543f9 QJ |
56 | |
57 | while (!(UART(USR2) & USR2_TXFE)) | |
03e5386e | 58 | barrier(); |
52c543f9 QJ |
59 | |
60 | UART(TXR) = ch; | |
61 | } | |
62 | ||
b53e9b5e TL |
63 | static inline void flush(void) |
64 | { | |
65 | } | |
52c543f9 | 66 | |
d30c74a0 | 67 | #define MX1_UART1_BASE_ADDR 0x00206000 |
8c25c36f | 68 | #define MX25_UART1_BASE_ADDR 0x43f90000 |
d30c74a0 SH |
69 | #define MX2X_UART1_BASE_ADDR 0x1000a000 |
70 | #define MX3X_UART1_BASE_ADDR 0x43F90000 | |
fd6ac7bb | 71 | #define MX3X_UART2_BASE_ADDR 0x43F94000 |
d30c74a0 SH |
72 | |
73 | static __inline__ void __arch_decomp_setup(unsigned long arch_id) | |
74 | { | |
75 | switch (arch_id) { | |
76 | case MACH_TYPE_MX1ADS: | |
77 | case MACH_TYPE_SCB9328: | |
78 | uart_base = MX1_UART1_BASE_ADDR; | |
79 | break; | |
635baf6b SH |
80 | case MACH_TYPE_MX25_3DS: |
81 | uart_base = MX25_UART1_BASE_ADDR; | |
82 | break; | |
d30c74a0 SH |
83 | case MACH_TYPE_IMX27LITE: |
84 | case MACH_TYPE_MX27_3DS: | |
85 | case MACH_TYPE_MX27ADS: | |
86 | case MACH_TYPE_PCM038: | |
87 | case MACH_TYPE_MX21ADS: | |
34499a7c | 88 | case MACH_TYPE_PCA100: |
143a179d | 89 | case MACH_TYPE_MXT_TD60: |
d30c74a0 SH |
90 | uart_base = MX2X_UART1_BASE_ADDR; |
91 | break; | |
92 | case MACH_TYPE_MX31LITE: | |
93 | case MACH_TYPE_ARMADILLO5X0: | |
94 | case MACH_TYPE_MX31MOBOARD: | |
95 | case MACH_TYPE_QONG: | |
96 | case MACH_TYPE_MX31_3DS: | |
97 | case MACH_TYPE_PCM037: | |
98 | case MACH_TYPE_MX31ADS: | |
99 | case MACH_TYPE_MX35_3DS: | |
100 | case MACH_TYPE_PCM043: | |
115b40c3 | 101 | case MACH_TYPE_LILLY1131: |
d30c74a0 SH |
102 | uart_base = MX3X_UART1_BASE_ADDR; |
103 | break; | |
fd6ac7bb DT |
104 | case MACH_TYPE_MAGX_ZN5: |
105 | uart_base = MX3X_UART2_BASE_ADDR; | |
106 | break; | |
d30c74a0 SH |
107 | default: |
108 | break; | |
109 | } | |
110 | } | |
52c543f9 | 111 | |
d30c74a0 | 112 | #define arch_decomp_setup() __arch_decomp_setup(arch_id) |
52c543f9 QJ |
113 | #define arch_decomp_wdog() |
114 | ||
115 | #endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */ |