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8777297b KS |
1 | /* |
2 | * MMC definitions for OMAP2 | |
3 | * | |
4 | * Copyright (C) 2006 Nokia Corporation | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #ifndef __OMAP2_MMC_H | |
12 | #define __OMAP2_MMC_H | |
13 | ||
14 | #include <linux/types.h> | |
15 | #include <linux/device.h> | |
16 | #include <linux/mmc/host.h> | |
17 | ||
a09e64fb | 18 | #include <mach/board.h> |
0a4b53a2 | 19 | |
d8874665 TL |
20 | #define OMAP15XX_NR_MMC 1 |
21 | #define OMAP16XX_NR_MMC 2 | |
22 | #define OMAP1_MMC_SIZE 0x080 | |
23 | #define OMAP1_MMC1_BASE 0xfffb7800 | |
24 | #define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */ | |
25 | ||
26 | #define OMAP24XX_NR_MMC 2 | |
27 | #define OMAP34XX_NR_MMC 3 | |
28 | #define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE | |
29 | #define HSMMC_SIZE 0x200 | |
30 | #define OMAP2_MMC1_BASE 0x4809c000 | |
31 | #define OMAP2_MMC2_BASE 0x480b4000 | |
32 | #define OMAP3_MMC3_BASE 0x480ad000 | |
33 | #define HSMMC3 (1 << 2) | |
34 | #define HSMMC2 (1 << 1) | |
35 | #define HSMMC1 (1 << 0) | |
36 | ||
8777297b KS |
37 | #define OMAP_MMC_MAX_SLOTS 2 |
38 | ||
39 | struct omap_mmc_platform_data { | |
abfbe5f7 | 40 | |
d8874665 | 41 | /* number of slots per controller */ |
8777297b | 42 | unsigned nr_slots:2; |
0a4b53a2 | 43 | |
8777297b KS |
44 | /* set if your board has components or wiring that limits the |
45 | * maximum frequency on the MMC bus */ | |
46 | unsigned int max_freq; | |
47 | ||
48 | /* switch the bus to a new slot */ | |
49 | int (* switch_slot)(struct device *dev, int slot); | |
50 | /* initialize board-specific MMC functionality, can be NULL if | |
51 | * not supported */ | |
52 | int (* init)(struct device *dev); | |
53 | void (* cleanup)(struct device *dev); | |
0a4b53a2 TL |
54 | void (* shutdown)(struct device *dev); |
55 | ||
56 | /* To handle board related suspend/resume functionality for MMC */ | |
57 | int (*suspend)(struct device *dev, int slot); | |
58 | int (*resume)(struct device *dev, int slot); | |
8777297b | 59 | |
d8874665 TL |
60 | u64 dma_mask; |
61 | ||
8777297b | 62 | struct omap_mmc_slot_data { |
d8874665 | 63 | |
90c62bf0 TL |
64 | /* 4 wire signaling is optional, and is used for SD/SDIO/HSMMC; |
65 | * 8 wire signaling is also optional, and is used with HSMMC | |
66 | */ | |
67 | u8 wires; | |
68 | ||
d8874665 TL |
69 | /* |
70 | * nomux means "standard" muxing is wrong on this board, and | |
71 | * that board-specific code handled it before common init logic. | |
72 | */ | |
73 | unsigned nomux:1; | |
74 | ||
75 | /* switch pin can be for card detect (default) or card cover */ | |
76 | unsigned cover:1; | |
77 | ||
d8874665 TL |
78 | /* use the internal clock */ |
79 | unsigned internal_clock:1; | |
80 | s16 power_pin; | |
90c62bf0 TL |
81 | |
82 | int switch_pin; /* gpio (card detect) */ | |
83 | int gpio_wp; /* gpio (write protect) */ | |
d8874665 | 84 | |
8777297b KS |
85 | int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); |
86 | int (* set_power)(struct device *dev, int slot, int power_on, int vdd); | |
87 | int (* get_ro)(struct device *dev, int slot); | |
88 | ||
89 | /* return MMC cover switch state, can be NULL if not supported. | |
90 | * | |
91 | * possible return values: | |
d8874665 TL |
92 | * 0 - closed |
93 | * 1 - open | |
8777297b KS |
94 | */ |
95 | int (* get_cover_state)(struct device *dev, int slot); | |
96 | ||
97 | const char *name; | |
98 | u32 ocr_mask; | |
0a4b53a2 TL |
99 | |
100 | /* Card detection IRQs */ | |
101 | int card_detect_irq; | |
102 | int (* card_detect)(int irq); | |
103 | ||
104 | unsigned int ban_openended:1; | |
105 | ||
8777297b KS |
106 | } slots[OMAP_MMC_MAX_SLOTS]; |
107 | }; | |
108 | ||
8777297b | 109 | /* called from board-specific card detection service routine */ |
8777297b KS |
110 | extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); |
111 | ||
d8874665 TL |
112 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ |
113 | defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) | |
114 | void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, | |
115 | int nr_controllers); | |
116 | void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | |
117 | int nr_controllers); | |
0dffb5c5 TL |
118 | int omap_mmc_add(const char *name, int id, unsigned long base, |
119 | unsigned long size, unsigned int irq, | |
120 | struct omap_mmc_platform_data *data); | |
d8874665 TL |
121 | #else |
122 | static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, | |
123 | int nr_controllers) | |
124 | { | |
125 | } | |
126 | static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | |
127 | int nr_controllers) | |
128 | { | |
129 | } | |
0dffb5c5 TL |
130 | static inline int omap_mmc_add(const char *name, int id, unsigned long base, |
131 | unsigned long size, unsigned int irq, | |
132 | struct omap_mmc_platform_data *data) | |
d8874665 TL |
133 | { |
134 | return 0; | |
135 | } | |
136 | ||
137 | #endif | |
8777297b | 138 | #endif |