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1da177e4 1/*
a09e64fb 2 * arch/arm/plat-omap/include/mach/gpio.h
1da177e4
LT
3 *
4 * OMAP GPIO handling defines and functions
5 *
9839c6b8 6 * Copyright (C) 2003-2005 Nokia Corporation
1da177e4 7 *
121e70b6 8 * Written by Juha Yrjölä <juha.yrjola@nokia.com>
1da177e4
LT
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26#ifndef __ASM_ARCH_OMAP_GPIO_H
27#define __ASM_ARCH_OMAP_GPIO_H
28
fced80c7 29#include <linux/io.h>
c95d10bc 30#include <linux/platform_device.h>
a09e64fb 31#include <mach/irqs.h>
1da177e4 32
6175556f 33#define OMAP1_MPUIO_BASE 0xfffb5000
9839c6b8 34
5de62b86
TL
35/*
36 * These are the omap15xx/16xx offsets. The omap7xx offset are
37 * OMAP_MPUIO_ / 2 offsets below.
38 */
1da177e4
LT
39#define OMAP_MPUIO_INPUT_LATCH 0x00
40#define OMAP_MPUIO_OUTPUT 0x04
41#define OMAP_MPUIO_IO_CNTL 0x08
42#define OMAP_MPUIO_KBR_LATCH 0x10
43#define OMAP_MPUIO_KBC 0x14
44#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18
45#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c
46#define OMAP_MPUIO_KBD_INT 0x20
47#define OMAP_MPUIO_GPIO_INT 0x24
48#define OMAP_MPUIO_KBD_MASKIT 0x28
49#define OMAP_MPUIO_GPIO_MASKIT 0x2c
50#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
51#define OMAP_MPUIO_LATCH 0x34
52
5492fb1a
SMK
53#define OMAP34XX_NR_GPIOS 6
54
1da177e4
LT
55#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
56#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
57
58#define OMAP_GPIO_IRQ(nr) (OMAP_GPIO_IS_MPUIO(nr) ? \
59 IH_MPUIO_BASE + ((nr) & 0x0f) : \
9ad5897c 60 IH_GPIO_BASE + (nr))
1da177e4 61
c95d10bc
VC
62#define METHOD_MPUIO 0
63#define METHOD_GPIO_1510 1
64#define METHOD_GPIO_1610 2
65#define METHOD_GPIO_7XX 3
66#define METHOD_GPIO_24XX 5
67#define METHOD_GPIO_44XX 6
68
59c348c3
VC
69struct omap_gpio_dev_attr {
70 int bank_width; /* GPIO bank width */
71 bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
72};
73
c95d10bc
VC
74struct omap_gpio_platform_data {
75 u16 virtual_irq_start;
76 int bank_type;
77 int bank_width; /* GPIO bank width */
5de62b86 78 int bank_stride; /* Only needed for omap1 MPUIO */
c95d10bc
VC
79 bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
80};
81
82/* TODO: Analyze removing gpio_bank_count usage from driver code */
83extern int gpio_bank_count;
84
72e06d08 85extern void omap2_gpio_prepare_for_idle(int off_mode);
43ffcd9a 86extern void omap2_gpio_resume_after_idle(void);
5eb3bb9c
KH
87extern void omap_set_gpio_debounce(int gpio, int enable);
88extern void omap_set_gpio_debounce_time(int gpio, int enable);
40c670f0
RN
89extern void omap_gpio_save_context(void);
90extern void omap_gpio_restore_context(void);
3c729f1e
DB
91/*-------------------------------------------------------------------------*/
92
52e31344
DB
93/* Wrappers for "new style" GPIO calls, using the new infrastructure
94 * which lets us plug in FPGA, I2C, and other implementations.
95 * *
25985edc 96 * The original OMAP-specific calls should eventually be removed.
3c729f1e
DB
97 */
98
52e31344
DB
99#include <linux/errno.h>
100#include <asm-generic/gpio.h>
3c729f1e
DB
101
102static inline int gpio_get_value(unsigned gpio)
103{
52e31344 104 return __gpio_get_value(gpio);
3c729f1e
DB
105}
106
107static inline void gpio_set_value(unsigned gpio, int value)
108{
52e31344 109 __gpio_set_value(gpio, value);
3c729f1e
DB
110}
111
52e31344
DB
112static inline int gpio_cansleep(unsigned gpio)
113{
114 return __gpio_cansleep(gpio);
115}
3c729f1e
DB
116
117static inline int gpio_to_irq(unsigned gpio)
118{
a007b709 119 return __gpio_to_irq(gpio);
3c729f1e
DB
120}
121
122static inline int irq_to_gpio(unsigned irq)
123{
a007b709
DB
124 int tmp;
125
126 /* omap1 SOC mpuio */
3c729f1e
DB
127 if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16)))
128 return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES;
a007b709
DB
129
130 /* SOC gpio */
131 tmp = irq - IH_GPIO_BASE;
132 if (tmp < OMAP_MAX_GPIO_LINES)
133 return tmp;
134
135 /* we don't supply reverse mappings for non-SOC gpios */
136 return -EIO;
3c729f1e
DB
137}
138
1da177e4 139#endif