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8777297b KS |
1 | /* |
2 | * MMC definitions for OMAP2 | |
3 | * | |
4 | * Copyright (C) 2006 Nokia Corporation | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #ifndef __OMAP2_MMC_H | |
12 | #define __OMAP2_MMC_H | |
13 | ||
14 | #include <linux/types.h> | |
15 | #include <linux/device.h> | |
16 | #include <linux/mmc/host.h> | |
17 | ||
ce491cf8 | 18 | #include <plat/board.h> |
0a4b53a2 | 19 | |
d8874665 TL |
20 | #define OMAP15XX_NR_MMC 1 |
21 | #define OMAP16XX_NR_MMC 2 | |
22 | #define OMAP1_MMC_SIZE 0x080 | |
23 | #define OMAP1_MMC1_BASE 0xfffb7800 | |
24 | #define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */ | |
25 | ||
26 | #define OMAP24XX_NR_MMC 2 | |
27 | #define OMAP34XX_NR_MMC 3 | |
82cf818d | 28 | #define OMAP44XX_NR_MMC 5 |
d8874665 | 29 | #define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE |
82cf818d | 30 | #define OMAP3_HSMMC_SIZE 0x200 |
31 | #define OMAP4_HSMMC_SIZE 0x1000 | |
d8874665 TL |
32 | #define OMAP2_MMC1_BASE 0x4809c000 |
33 | #define OMAP2_MMC2_BASE 0x480b4000 | |
34 | #define OMAP3_MMC3_BASE 0x480ad000 | |
82cf818d | 35 | #define OMAP4_MMC4_BASE 0x480d1000 |
36 | #define OMAP4_MMC5_BASE 0x480d5000 | |
37 | #define OMAP4_MMC_REG_OFFSET 0x100 | |
38 | #define HSMMC5 (1 << 4) | |
39 | #define HSMMC4 (1 << 3) | |
d8874665 TL |
40 | #define HSMMC3 (1 << 2) |
41 | #define HSMMC2 (1 << 1) | |
42 | #define HSMMC1 (1 << 0) | |
43 | ||
8777297b KS |
44 | #define OMAP_MMC_MAX_SLOTS 2 |
45 | ||
46 | struct omap_mmc_platform_data { | |
01971f65 DB |
47 | /* back-link to device */ |
48 | struct device *dev; | |
abfbe5f7 | 49 | |
d8874665 | 50 | /* number of slots per controller */ |
8777297b | 51 | unsigned nr_slots:2; |
0a4b53a2 | 52 | |
8777297b KS |
53 | /* set if your board has components or wiring that limits the |
54 | * maximum frequency on the MMC bus */ | |
55 | unsigned int max_freq; | |
56 | ||
57 | /* switch the bus to a new slot */ | |
db0fefc5 | 58 | int (*switch_slot)(struct device *dev, int slot); |
8777297b KS |
59 | /* initialize board-specific MMC functionality, can be NULL if |
60 | * not supported */ | |
db0fefc5 AH |
61 | int (*init)(struct device *dev); |
62 | void (*cleanup)(struct device *dev); | |
63 | void (*shutdown)(struct device *dev); | |
0a4b53a2 TL |
64 | |
65 | /* To handle board related suspend/resume functionality for MMC */ | |
66 | int (*suspend)(struct device *dev, int slot); | |
67 | int (*resume)(struct device *dev, int slot); | |
8777297b | 68 | |
1887bde3 DK |
69 | /* Return context loss count due to PM states changing */ |
70 | int (*get_context_loss_count)(struct device *dev); | |
71 | ||
d8874665 TL |
72 | u64 dma_mask; |
73 | ||
8777297b | 74 | struct omap_mmc_slot_data { |
d8874665 | 75 | |
3a63833e SG |
76 | /* 4/8 wires and any additional host capabilities |
77 | * need to OR'd all capabilities (ref. linux/mmc/host.h) */ | |
78 | u32 caps; | |
90c62bf0 | 79 | |
d8874665 TL |
80 | /* |
81 | * nomux means "standard" muxing is wrong on this board, and | |
82 | * that board-specific code handled it before common init logic. | |
83 | */ | |
84 | unsigned nomux:1; | |
85 | ||
86 | /* switch pin can be for card detect (default) or card cover */ | |
87 | unsigned cover:1; | |
88 | ||
d8874665 TL |
89 | /* use the internal clock */ |
90 | unsigned internal_clock:1; | |
90c62bf0 | 91 | |
23d99bb9 AH |
92 | /* nonremovable e.g. eMMC */ |
93 | unsigned nonremovable:1; | |
94 | ||
dd498eff DK |
95 | /* Try to sleep or power off when possible */ |
96 | unsigned power_saving:1; | |
97 | ||
1df58db8 AH |
98 | /* If using power_saving and the MMC power is not to go off */ |
99 | unsigned no_off:1; | |
100 | ||
e0eb2424 AH |
101 | /* Regulator off remapped to sleep */ |
102 | unsigned vcc_aux_disable_is_sleep:1; | |
103 | ||
03e7e170 | 104 | /* we can put the features above into this variable */ |
105 | #define HSMMC_HAS_PBIAS (1 << 0) | |
106 | unsigned features; | |
107 | ||
90c62bf0 TL |
108 | int switch_pin; /* gpio (card detect) */ |
109 | int gpio_wp; /* gpio (write protect) */ | |
d8874665 | 110 | |
db0fefc5 AH |
111 | int (*set_bus_mode)(struct device *dev, int slot, int bus_mode); |
112 | int (*set_power)(struct device *dev, int slot, | |
113 | int power_on, int vdd); | |
114 | int (*get_ro)(struct device *dev, int slot); | |
9b7c18e0 AH |
115 | int (*set_sleep)(struct device *dev, int slot, int sleep, |
116 | int vdd, int cardsleep); | |
ce6f0016 | 117 | void (*remux)(struct device *dev, int slot, int power_on); |
db0fefc5 AH |
118 | /* Call back before enabling / disabling regulators */ |
119 | void (*before_set_reg)(struct device *dev, int slot, | |
120 | int power_on, int vdd); | |
121 | /* Call back after enabling / disabling regulators */ | |
122 | void (*after_set_reg)(struct device *dev, int slot, | |
123 | int power_on, int vdd); | |
4816858c GI |
124 | /* if we have special card, init it using this callback */ |
125 | void (*init_card)(struct mmc_card *card); | |
8777297b KS |
126 | |
127 | /* return MMC cover switch state, can be NULL if not supported. | |
128 | * | |
129 | * possible return values: | |
d8874665 TL |
130 | * 0 - closed |
131 | * 1 - open | |
8777297b | 132 | */ |
db0fefc5 | 133 | int (*get_cover_state)(struct device *dev, int slot); |
8777297b KS |
134 | |
135 | const char *name; | |
136 | u32 ocr_mask; | |
0a4b53a2 TL |
137 | |
138 | /* Card detection IRQs */ | |
139 | int card_detect_irq; | |
db0fefc5 | 140 | int (*card_detect)(struct device *dev, int slot); |
0a4b53a2 TL |
141 | |
142 | unsigned int ban_openended:1; | |
143 | ||
8777297b KS |
144 | } slots[OMAP_MMC_MAX_SLOTS]; |
145 | }; | |
146 | ||
8777297b | 147 | /* called from board-specific card detection service routine */ |
db0fefc5 AH |
148 | extern void omap_mmc_notify_cover_event(struct device *dev, int slot, |
149 | int is_closed); | |
8777297b | 150 | |
d8874665 TL |
151 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ |
152 | defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) | |
153 | void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, | |
154 | int nr_controllers); | |
155 | void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | |
156 | int nr_controllers); | |
0dffb5c5 TL |
157 | int omap_mmc_add(const char *name, int id, unsigned long base, |
158 | unsigned long size, unsigned int irq, | |
159 | struct omap_mmc_platform_data *data); | |
d8874665 TL |
160 | #else |
161 | static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, | |
162 | int nr_controllers) | |
163 | { | |
164 | } | |
165 | static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | |
166 | int nr_controllers) | |
167 | { | |
168 | } | |
0dffb5c5 TL |
169 | static inline int omap_mmc_add(const char *name, int id, unsigned long base, |
170 | unsigned long size, unsigned int irq, | |
171 | struct omap_mmc_platform_data *data) | |
d8874665 TL |
172 | { |
173 | return 0; | |
174 | } | |
175 | ||
176 | #endif | |
8777297b | 177 | #endif |