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ARM: OMAP2+: UART: Remove old and unused clocks handling funcs
[mirror_ubuntu-artful-kernel.git] / arch / arm / plat-omap / include / plat / omap-serial.h
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1/*
2 * Driver for OMAP-UART controller.
3 * Based on drivers/serial/8250.c
4 *
5 * Copyright (C) 2010 Texas Instruments.
6 *
7 * Authors:
8 * Govindraj R <govindraj.raja@ti.com>
9 * Thara Gopinath <thara@ti.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 */
16
17#ifndef __OMAP_SERIAL_H__
18#define __OMAP_SERIAL_H__
19
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22
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23#include <plat/mux.h>
24
374b8cfd 25#define DRIVER_NAME "omap_uart"
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26
27/*
28 * Use tty device name as ttyO, [O -> OMAP]
29 * in bootargs we specify as console=ttyO0 if uart1
30 * is used as console uart.
31 */
32#define OMAP_SERIAL_NAME "ttyO"
33
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34#define OMAP_MODE13X_SPEED 230400
35
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36#define OMAP_UART_SCR_TX_EMPTY 0x08
37
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38/* WER = 0x7F
39 * Enable module level wakeup in WER reg
40 */
41#define OMAP_UART_WER_MOD_WKUP 0X7F
42
43/* Enable XON/XOFF flow control on output */
44#define OMAP_UART_SW_TX 0x04
45
46/* Enable XON/XOFF flow control on input */
47#define OMAP_UART_SW_RX 0x04
48
49#define OMAP_UART_SYSC_RESET 0X07
50#define OMAP_UART_TCR_TRIG 0X0F
51#define OMAP_UART_SW_CLR 0XF0
52#define OMAP_UART_FIFO_CLR 0X06
53
54#define OMAP_UART_DMA_CH_FREE -1
55
56#define RX_TIMEOUT (3 * HZ)
57#define OMAP_MAX_HSUART_PORTS 4
58
59#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
60
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61#define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
62#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
63
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64struct omap_uart_port_info {
65 bool dma_enabled; /* To specify DMA Mode */
66 unsigned int uartclk; /* UART clock rate */
b612633b 67 upf_t flags; /* UPF_* flags */
94734749 68 u32 errata;
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69
70 int (*get_context_loss_count)(struct device *);
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71 void (*set_forceidle)(struct platform_device *);
72 void (*set_noidle)(struct platform_device *);
62f3ec5f 73 void (*enable_wakeup)(struct platform_device *, bool);
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74};
75
76struct uart_omap_dma {
77 u8 uart_dma_tx;
78 u8 uart_dma_rx;
79 int rx_dma_channel;
80 int tx_dma_channel;
81 dma_addr_t rx_buf_dma_phys;
82 dma_addr_t tx_buf_dma_phys;
83 unsigned int uart_base;
84 /*
85 * Buffer for rx dma.It is not required for tx because the buffer
86 * comes from port structure.
87 */
88 unsigned char *rx_buf;
89 unsigned int prev_rx_dma_pos;
90 int tx_buf_size;
91 int tx_dma_used;
92 int rx_dma_used;
93 spinlock_t tx_lock;
94 spinlock_t rx_lock;
95 /* timer to poll activity on rx dma */
96 struct timer_list rx_timer;
97 int rx_buf_size;
98 int rx_timeout;
99};
100
101struct uart_omap_port {
102 struct uart_port port;
103 struct uart_omap_dma uart_dma;
104 struct platform_device *pdev;
105
106 unsigned char ier;
107 unsigned char lcr;
108 unsigned char mcr;
109 unsigned char fcr;
110 unsigned char efr;
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111 unsigned char dll;
112 unsigned char dlh;
113 unsigned char mdr1;
114 unsigned char scr;
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115
116 int use_dma;
117 /*
118 * Some bits in registers are cleared on a read, so they must
119 * be saved whenever the register is read but the bits will not
120 * be immediately processed.
121 */
122 unsigned int lsr_break_flag;
123 unsigned char msr_saved_flags;
124 char name[20];
125 unsigned long port_activity;
ec3bebc6 126 u32 context_loss_cnt;
94734749 127 u32 errata;
62f3ec5f 128 u8 wakeups_enabled;
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129};
130
131#endif /* __OMAP_SERIAL_H__ */