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1 | # arch/arm/plat-s3c/Kconfig |
2 | # | |
3 | # Copyright 2007 Simtec Electronics | |
4 | # | |
5 | # Licensed under GPLv2 | |
6 | ||
7 | config PLAT_S3C | |
8 | bool | |
a08ab637 | 9 | depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX |
bcae8aeb | 10 | default y |
d58153d8 BD |
11 | select NO_IOPORT |
12 | help | |
13 | Base platform code for any Samsung S3C device | |
14 | ||
b2627588 BD |
15 | # low-level serial option nodes |
16 | ||
17 | config CPU_LLSERIAL_S3C2410_ONLY | |
18 | bool | |
bcae8aeb | 19 | depends on PLAT_S3C |
b2627588 BD |
20 | default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440 |
21 | ||
22 | config CPU_LLSERIAL_S3C2440_ONLY | |
23 | bool | |
bcae8aeb | 24 | depends on PLAT_S3C |
b2627588 BD |
25 | default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410 |
26 | ||
27 | config CPU_LLSERIAL_S3C2410 | |
28 | bool | |
bcae8aeb | 29 | depends on PLAT_S3C |
b2627588 BD |
30 | help |
31 | Selected if there is an S3C2410 (or register compatible) serial | |
32 | low-level implementation needed | |
33 | ||
34 | config CPU_LLSERIAL_S3C2440 | |
35 | bool | |
bcae8aeb | 36 | depends on PLAT_S3C |
b2627588 BD |
37 | help |
38 | Selected if there is an S3C2440 (or register compatible) serial | |
39 | low-level implementation needed | |
40 | ||
41 | # boot configurations | |
42 | ||
d58153d8 BD |
43 | comment "Boot options" |
44 | ||
a45f8261 BD |
45 | config S3C_BOOT_WATCHDOG |
46 | bool "S3C Initialisation watchdog" | |
d58153d8 BD |
47 | depends on PLAT_S3C && S3C2410_WATCHDOG |
48 | help | |
49 | Say y to enable the watchdog during the kernel decompression | |
50 | stage. If the kernel fails to uncompress, then the watchdog | |
51 | will trigger a reset and the system should restart. | |
52 | ||
a45f8261 BD |
53 | config S3C_BOOT_ERROR_RESET |
54 | bool "S3C Reboot on decompression error" | |
d58153d8 BD |
55 | depends on PLAT_S3C |
56 | help | |
57 | Say y here to use the watchdog to reset the system if the | |
58 | kernel decompressor detects an error during decompression. | |
59 | ||
60 | comment "Power management" | |
61 | ||
62 | config S3C2410_PM_DEBUG | |
63 | bool "S3C2410 PM Suspend debug" | |
64 | depends on PLAT_S3C && PM | |
65 | help | |
66 | Say Y here if you want verbose debugging from the PM Suspend and | |
67 | Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
68 | for more information. | |
69 | ||
70 | config S3C2410_PM_CHECK | |
71 | bool "S3C2410 PM Suspend Memory CRC" | |
72 | depends on PLAT_S3C && PM && CRC32 | |
73 | help | |
74 | Enable the PM code's memory area checksum over sleep. This option | |
75 | will generate CRCs of all blocks of memory, and store them before | |
76 | going to sleep. The blocks are then checked on resume for any | |
77 | errors. | |
78 | ||
79 | Note, this can take several seconds depending on memory size | |
80 | and CPU speed. | |
81 | ||
82 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
83 | ||
84 | config S3C2410_PM_CHECK_CHUNKSIZE | |
85 | int "S3C2410 PM Suspend CRC Chunksize (KiB)" | |
86 | depends on PLAT_S3C && PM && S3C2410_PM_CHECK | |
87 | default 64 | |
88 | help | |
89 | Set the chunksize in Kilobytes of the CRC for checking memory | |
90 | corruption over suspend and resume. A smaller value will mean that | |
91 | the CRC data block will take more memory, but wil identify any | |
92 | faults with better precision. | |
93 | ||
94 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
95 | ||
c7657846 BD |
96 | config S3C_LOWLEVEL_UART_PORT |
97 | int "S3C UART to use for low-level messages" | |
d58153d8 BD |
98 | depends on PLAT_S3C |
99 | default 0 | |
100 | help | |
101 | Choice of which UART port to use for the low-level messages, | |
102 | such as the `Uncompressing...` at start time. The value of | |
103 | this configuration should be between zero and two. The port | |
104 | must have been initialised by the boot-loader before use. | |
5b323c7b | 105 | |
efd3a8eb BD |
106 | # options for gpiolib support |
107 | ||
108 | config S3C_GPIO_SPACE | |
109 | int "Space between gpio banks" | |
110 | default 0 | |
111 | help | |
112 | Add a number of spare GPIO entries between each bank for debugging | |
113 | purposes. This allows any problems where an counter overflows from | |
114 | one bank to another to be caught, at the expense of using a little | |
115 | more memory. | |
116 | ||
8a53bdb9 BD |
117 | config S3C_GPIO_TRACK |
118 | bool | |
119 | help | |
120 | Internal configuration option to enable the s3c specific gpio | |
121 | chip tracking if the platform requires it. | |
122 | ||
21b23664 BD |
123 | config S3C_GPIO_PULL_UPDOWN |
124 | bool | |
125 | help | |
126 | Internal configuration to enable the correct GPIO pull helper | |
127 | ||
128 | config S3C_GPIO_PULL_DOWN | |
129 | bool | |
130 | help | |
131 | Internal configuration to enable the correct GPIO pull helper | |
132 | ||
133 | config S3C_GPIO_PULL_UP | |
134 | bool | |
135 | help | |
136 | Internal configuration to enable the correct GPIO pull helper | |
137 | ||
138 | config S3C_GPIO_CFG_S3C24XX | |
139 | bool | |
140 | help | |
141 | Internal configuration to enable S3C24XX style GPIO configuration | |
142 | functions. | |
143 | ||
144 | config S3C_GPIO_CFG_S3C64XX | |
145 | bool | |
146 | help | |
147 | Internal configuration to enable S3C64XX style GPIO configuration | |
148 | functions. | |
149 | ||
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150 | # device definitions to compile in |
151 | ||
152 | config S3C_DEV_HSMMC | |
153 | bool | |
154 | depends on PLAT_S3C | |
155 | help | |
156 | Compile in platform device definitions for HSMMC code |