]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/arm/plat-s3c24xx/Kconfig
ARM: S3C24XX: CPUFREQ: S3C2412/S3C2443 IO timing support
[mirror_ubuntu-artful-kernel.git] / arch / arm / plat-s3c24xx / Kconfig
CommitLineData
a21765a7
BD
1# arch/arm/plat-s3c24xx/Kconfig
2#
3# Copyright 2007 Simtec Electronics
4#
5# Licensed under GPLv2
6
7config PLAT_S3C24XX
8 bool
bcae8aeb
BD
9 depends on ARCH_S3C2410 || ARCH_S3C24A0
10 default y
7d477a04 11 select NO_IOPORT
bb2b180c 12 select ARCH_REQUIRE_GPIOLIB
a21765a7 13 help
d58153d8 14 Base platform code for any Samsung S3C24XX device
a21765a7 15
b8870605
BD
16if PLAT_S3C24XX
17
1b3ba688
BD
18# code that is shared between a number of the s3c24xx implementations
19
20config S3C2410_CLOCK
21 bool
22 help
23 Clock code for the S3C2410, and similar processors which
24 is currently includes the S3C2410, S3C2440, S3C2442.
25
93bc6b63
BD
26config S3C24XX_DCLK
27 bool
28 help
29 Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
30
a21765a7
BD
31config CPU_S3C244X
32 bool
33 depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
34 help
35 Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
36
342e20f1
BD
37config S3C2440_CPUFREQ
38 bool "S3C2440/S3C2442 CPU Frequency scaling support"
39 depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442)
40 select S3C2410_CPUFREQ_UTILS
41 default y
42 help
43 CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs.
44
0345b51c
BD
45config S3C2440_XTAL_12000000
46 bool
47 help
48 Indicate that the build needs to support 12MHz system
49 crystal.
50
51config S3C2440_XTAL_16934400
52 bool
53 help
54 Indicate that the build needs to support 16.9344MHz system
55 crystal.
56
78278d6a
BD
57config S3C2440_PLL_12000000
58 bool
0345b51c 59 depends on S3C2440_CPUFREQ && S3C2440_XTAL_12000000
78278d6a
BD
60 default y if CPU_FREQ_S3C24XX_PLL
61 help
62 PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals.
63
64config S3C2440_PLL_16934400
65 bool
0345b51c 66 depends on S3C2440_CPUFREQ && S3C2440_XTAL_16934400
78278d6a
BD
67 default y if CPU_FREQ_S3C24XX_PLL
68 help
69 PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals.
70
6fc601e3
BD
71config S3C24XX_PWM
72 bool "PWM device support"
73 select HAVE_PWM
74 help
75 Support for exporting the PWM timer blocks via the pwm device
76 system.
77
e2178d43
BD
78
79# gpio configurations
80
81config S3C24XX_GPIO_EXTRA
82 int
83 default 128 if S3C24XX_GPIO_EXTRA128
84 default 64 if S3C24XX_GPIO_EXTRA64
85 default 0
86
87config S3C24XX_GPIO_EXTRA64
88 bool
89 help
90 Add an extra 64 gpio numbers to the available GPIO pool. This is
91 available for boards that need extra gpios for external devices.
92
93config S3C24XX_GPIO_EXTRA128
94 bool
95 help
96 Add an extra 128 gpio numbers to the available GPIO pool. This is
97 available for boards that need extra gpios for external devices.
98
a21765a7
BD
99config PM_SIMTEC
100 bool
101 help
102 Common power management code for systems that are
103 compatible with the Simtec style of power management
104
a21765a7
BD
105config S3C2410_DMA
106 bool "S3C2410 DMA support"
107 depends on ARCH_S3C2410
97c1b145 108 select S3C_DMA
a21765a7
BD
109 help
110 S3C2410 DMA support. This is needed for drivers like sound which
111 use the S3C2410's DMA system to move data to and from the
112 peripheral blocks.
113
114config S3C2410_DMA_DEBUG
115 bool "S3C2410 DMA support debug"
116 depends on ARCH_S3C2410 && S3C2410_DMA
117 help
118 Enable debugging output for the DMA code. This option sends info
119 to the kernel log, at priority KERN_DEBUG.
120
28ab44c5
BD
121config S3C24XX_ADC
122 bool "ADC common driver support"
123 help
124 Core support for the ADC block found in the S3C24XX SoC systems
125 for drivers such as the touchscreen and hwmon to use to share
126 this resource.
127
b2a6cf3b
BD
128# SPI default pin configuration code
129
130config S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13
131 bool
132 help
133 SPI GPIO configuration code for BUS0 when connected to
134 GPE11, GPE12 and GPE13.
135
136config S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7
137 bool
138 help
139 SPI GPIO configuration code for BUS 1 when connected to
140 GPG5, GPG6 and GPG7.
141
142# common code for s3c24xx based machines, such as the SMDKs.
143
831a6fcb
BD
144# cpu frequency items common between s3c2410 and s3c2440/s3c2442
145
146config S3C2410_IOTIMING
147 bool
148 depends on CPU_FREQ_S3C24XX
149 help
150 Internal node to select io timing code that is common to the s3c2410
151 and s3c2440/s3c2442 cpu frequency support.
152
a24c091d
BD
153config S3C2410_CPUFREQ_UTILS
154 bool
155 depends on CPU_FREQ_S3C24XX
156 help
157 Internal node to select timing code that is common to the s3c2410
158 and s3c2440/s3c244 cpu frequency support.
159
140780ab
BD
160# cpu frequency support common to s3c2412, s3c2413 and s3c2442
161
162config S3C2412_IOTIMING
163 bool
164 depends on CPU_FREQ_S3C24XX && (CPU_S3C2412 || CPU_S3C2443)
165 help
166 Intel node to select io timing code that is common to the s3c2412
167 and the s3c2443.
168
a21765a7
BD
169config MACH_SMDK
170 bool
171 help
172 Common machine code for SMDK2410 and SMDK2440
173
b8870605 174endif