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cf383678 BD |
1 | # arch/arm/plat-samsung/Kconfig |
2 | # | |
3 | # Copyright 2009 Simtec Electronics | |
4 | # | |
5 | # Licensed under GPLv2 | |
6 | ||
7 | config PLAT_SAMSUNG | |
8 | bool | |
e245f969 | 9 | depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P || ARCH_EXYNOS |
cf383678 | 10 | default y |
b1b3f49c RK |
11 | select GENERIC_IRQ_CHIP |
12 | select NO_IOPORT | |
cf383678 BD |
13 | help |
14 | Base platform code for all Samsung SoC based systems | |
15 | ||
199642bf KK |
16 | config PLAT_S5P |
17 | bool | |
e245f969 | 18 | depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210) |
199642bf | 19 | default y |
b1b3f49c | 20 | select ARCH_REQUIRE_GPIOLIB |
e245f969 | 21 | select ARM_VIC |
199642bf | 22 | select NO_IOPORT |
b1b3f49c | 23 | select PLAT_SAMSUNG |
199642bf KK |
24 | select S3C_GPIO_TRACK |
25 | select S5P_GPIO_DRVSTR | |
6e6aac75 | 26 | select SAMSUNG_CLKSRC if !COMMON_CLK |
199642bf KK |
27 | help |
28 | Base platform code for Samsung's S5P series SoC. | |
29 | ||
89693016 ADK |
30 | config SAMSUNG_PM |
31 | bool | |
32 | depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || S5P_PM) | |
33 | default y | |
34 | help | |
35 | Base platform power management code for samsung code | |
36 | ||
cf383678 BD |
37 | if PLAT_SAMSUNG |
38 | ||
89f1fa08 BD |
39 | # boot configurations |
40 | ||
41 | comment "Boot options" | |
42 | ||
89f1fa08 BD |
43 | config S3C_BOOT_ERROR_RESET |
44 | bool "S3C Reboot on decompression error" | |
45 | help | |
46 | Say y here to use the watchdog to reset the system if the | |
47 | kernel decompressor detects an error during decompression. | |
48 | ||
49 | config S3C_BOOT_UART_FORCE_FIFO | |
50 | bool "Force UART FIFO on during boot process" | |
51 | default y | |
52 | help | |
53 | Say Y here to force the UART FIFOs on during the kernel | |
54 | uncompressor | |
55 | ||
56 | ||
57 | config S3C_LOWLEVEL_UART_PORT | |
58 | int "S3C UART to use for low-level messages" | |
59 | default 0 | |
60 | help | |
61 | Choice of which UART port to use for the low-level messages, | |
62 | such as the `Uncompressing...` at start time. The value of | |
63 | this configuration should be between zero and two. The port | |
64 | must have been initialised by the boot-loader before use. | |
65 | ||
cd8dc7ae TF |
66 | config SAMSUNG_ATAGS |
67 | def_bool n | |
68 | depends on !ARCH_MULTIPLATFORM | |
69 | depends on ATAGS | |
70 | help | |
71 | This option enables ATAGS based boot support code for | |
72 | Samsung platforms, including static platform devices, legacy | |
73 | clock, timer and interrupt initialization, etc. | |
74 | ||
75 | Platforms that support only DT based boot need not to select | |
76 | this option. | |
77 | ||
78 | if SAMSUNG_ATAGS | |
79 | ||
89f1fa08 BD |
80 | # clock options |
81 | ||
2aa1ecf7 MB |
82 | config SAMSUNG_CLOCK |
83 | bool | |
84 | default y if !COMMON_CLK | |
85 | ||
aa9ad6ad HW |
86 | config SAMSUNG_CLKSRC |
87 | bool | |
88 | help | |
89 | Select the clock code for the clksrc implementation | |
90 | used by newer systems such as the S3C64XX. | |
cf383678 | 91 | |
bf46aaea | 92 | config S5P_CLOCK |
6e6aac75 | 93 | def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210) |
bf46aaea KK |
94 | help |
95 | Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs | |
96 | ||
7162ba03 BD |
97 | # options for IRQ support |
98 | ||
68ae8998 | 99 | config S5P_IRQ |
278c800e | 100 | def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210) |
68ae8998 | 101 | help |
278c800e | 102 | Support common interrupt part for ARCH_S5P SoCs |
68ae8998 KK |
103 | |
104 | config S5P_EXT_INT | |
105 | bool | |
106 | help | |
107 | Use the external interrupts (other than GPIO interrupts.) | |
108 | Note: Do not choose this for S5P6440 and S5P6450. | |
109 | ||
110 | config S5P_GPIO_INT | |
111 | bool | |
112 | help | |
113 | Common code for the GPIO interrupts (other than external interrupts.) | |
114 | ||
4f830db9 BD |
115 | # options for gpio configuration support |
116 | ||
838c6d49 MS |
117 | config S5P_GPIO_DRVSTR |
118 | bool | |
119 | help | |
120 | Internal configuration to get and set correct GPIO driver strength | |
121 | helper | |
122 | ||
85841bce KK |
123 | config SAMSUNG_GPIO_EXTRA |
124 | int "Number of additional GPIO pins" | |
4ff13995 MB |
125 | default 128 if SAMSUNG_GPIO_EXTRA128 |
126 | default 64 if SAMSUNG_GPIO_EXTRA64 | |
85841bce KK |
127 | default 0 |
128 | help | |
129 | Use additional GPIO space in addition to the GPIO's the SOC | |
130 | provides. This allows expanding the GPIO space for use with | |
131 | GPIO expanders. | |
132 | ||
4ff13995 MB |
133 | config SAMSUNG_GPIO_EXTRA64 |
134 | bool | |
135 | ||
136 | config SAMSUNG_GPIO_EXTRA128 | |
137 | bool | |
138 | ||
89f1fa08 BD |
139 | config S3C_GPIO_SPACE |
140 | int "Space between gpio banks" | |
141 | default 0 | |
142 | help | |
143 | Add a number of spare GPIO entries between each bank for debugging | |
144 | purposes. This allows any problems where an counter overflows from | |
145 | one bank to another to be caught, at the expense of using a little | |
146 | more memory. | |
147 | ||
148 | config S3C_GPIO_TRACK | |
149 | bool | |
150 | help | |
151 | Internal configuration option to enable the s3c specific gpio | |
152 | chip tracking if the platform requires it. | |
153 | ||
cfe370f8 KK |
154 | # uart options |
155 | ||
156 | config S5P_DEV_UART | |
157 | def_bool y | |
158 | depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210) | |
159 | ||
3929e1e7 MC |
160 | # ADC driver |
161 | ||
162 | config S3C_ADC | |
163 | bool "ADC common driver support" | |
164 | help | |
165 | Core support for the ADC block found in the Samsung SoC systems | |
166 | for drivers such as the touchscreen and hwmon to use to share | |
167 | this resource. | |
168 | ||
b6a60413 BD |
169 | # device definitions to compile in |
170 | ||
171 | config S3C_DEV_HSMMC | |
172 | bool | |
173 | help | |
174 | Compile in platform device definitions for HSMMC code | |
175 | ||
176 | config S3C_DEV_HSMMC1 | |
177 | bool | |
178 | help | |
179 | Compile in platform device definitions for HSMMC channel 1 | |
180 | ||
181 | config S3C_DEV_HSMMC2 | |
182 | bool | |
183 | help | |
184 | Compile in platform device definitions for HSMMC channel 2 | |
185 | ||
b3c674bc HL |
186 | config S3C_DEV_HSMMC3 |
187 | bool | |
188 | help | |
189 | Compile in platform device definitions for HSMMC channel 3 | |
190 | ||
6cd82ffe MC |
191 | config S3C_DEV_HWMON |
192 | bool | |
193 | help | |
194 | Compile in platform device definitions for HWMON | |
195 | ||
b6a60413 BD |
196 | config S3C_DEV_I2C1 |
197 | bool | |
198 | help | |
199 | Compile in platform device definitions for I2C channel 1 | |
200 | ||
c8d833bf MS |
201 | config S3C_DEV_I2C2 |
202 | bool | |
203 | help | |
204 | Compile in platform device definitions for I2C channel 2 | |
205 | ||
b7a98255 KP |
206 | config S3C_DEV_I2C3 |
207 | bool | |
208 | help | |
209 | Compile in platform device definition for I2C controller 3 | |
210 | ||
211 | config S3C_DEV_I2C4 | |
212 | bool | |
213 | help | |
214 | Compile in platform device definition for I2C controller 4 | |
215 | ||
216 | config S3C_DEV_I2C5 | |
217 | bool | |
218 | help | |
219 | Compile in platform device definition for I2C controller 5 | |
220 | ||
221 | config S3C_DEV_I2C6 | |
222 | bool | |
223 | help | |
224 | Compile in platform device definition for I2C controller 6 | |
225 | ||
226 | config S3C_DEV_I2C7 | |
227 | bool | |
228 | help | |
229 | Compile in platform device definition for I2C controller 7 | |
230 | ||
b6a60413 BD |
231 | config S3C_DEV_FB |
232 | bool | |
233 | help | |
234 | Compile in platform device definition for framebuffer | |
235 | ||
236 | config S3C_DEV_USB_HOST | |
237 | bool | |
238 | help | |
239 | Compile in platform device definition for USB host. | |
240 | ||
241 | config S3C_DEV_USB_HSOTG | |
242 | bool | |
243 | help | |
244 | Compile in platform device definition for USB high-speed OtG | |
245 | ||
e1d5c93e BG |
246 | config S3C_DEV_WDT |
247 | bool | |
b130d5c2 | 248 | default y if ARCH_S3C24XX |
e1d5c93e BG |
249 | help |
250 | Complie in platform device definition for Watchdog Timer | |
251 | ||
b6a60413 BD |
252 | config S3C_DEV_NAND |
253 | bool | |
254 | help | |
255 | Compile in platform device definition for NAND controller | |
256 | ||
999304be MS |
257 | config S3C_DEV_ONENAND |
258 | bool | |
259 | help | |
260 | Compile in platform device definition for OneNAND controller | |
261 | ||
adc0950c AD |
262 | config S3C_DEV_RTC |
263 | bool | |
264 | help | |
265 | Complie in platform device definition for RTC | |
266 | ||
4f7cdc38 NK |
267 | config SAMSUNG_DEV_ADC |
268 | bool | |
269 | help | |
270 | Compile in platform device definition for ADC controller | |
271 | ||
db90005b AK |
272 | config SAMSUNG_DEV_IDE |
273 | bool | |
274 | help | |
275 | Compile in platform device definitions for IDE | |
276 | ||
875a5937 | 277 | config S3C64XX_DEV_SPI0 |
4b4c6625 JB |
278 | bool |
279 | help | |
280 | Compile in platform device definitions for S3C64XX's type | |
875a5937 PV |
281 | SPI controller 0 |
282 | ||
283 | config S3C64XX_DEV_SPI1 | |
284 | bool | |
285 | help | |
286 | Compile in platform device definitions for S3C64XX's type | |
287 | SPI controller 1 | |
288 | ||
289 | config S3C64XX_DEV_SPI2 | |
290 | bool | |
291 | help | |
292 | Compile in platform device definitions for S3C64XX's type | |
293 | SPI controller 2 | |
4b4c6625 | 294 | |
2b6c02ab | 295 | config SAMSUNG_DEV_TS |
909de0d6 MC |
296 | bool |
297 | help | |
2b6c02ab | 298 | Common in platform device definitions for touchscreen device |
909de0d6 | 299 | |
995c48ad JS |
300 | config SAMSUNG_DEV_KEYPAD |
301 | bool | |
302 | help | |
303 | Compile in platform device definitions for keypad | |
304 | ||
2ce30137 BG |
305 | config SAMSUNG_DEV_PWM |
306 | bool | |
b130d5c2 | 307 | default y if ARCH_S3C24XX |
2ce30137 BG |
308 | help |
309 | Compile in platform device definition for PWM Timer | |
310 | ||
f00207b2 BG |
311 | config SAMSUNG_DEV_BACKLIGHT |
312 | bool | |
313 | depends on SAMSUNG_DEV_PWM | |
314 | help | |
315 | Compile in platform device definition LCD backlight with PWM Timer | |
316 | ||
e033ca9b KK |
317 | config S5P_DEV_CSIS0 |
318 | bool | |
319 | help | |
320 | Compile in platform device definitions for MIPI-CSIS channel 0 | |
321 | ||
322 | config S5P_DEV_CSIS1 | |
323 | bool | |
324 | help | |
325 | Compile in platform device definitions for MIPI-CSIS channel 1 | |
326 | ||
327 | config S5P_DEV_FIMC0 | |
328 | bool | |
329 | help | |
330 | Compile in platform device definitions for FIMC controller 0 | |
331 | ||
332 | config S5P_DEV_FIMC1 | |
333 | bool | |
334 | help | |
335 | Compile in platform device definitions for FIMC controller 1 | |
336 | ||
337 | config S5P_DEV_FIMC2 | |
338 | bool | |
339 | help | |
340 | Compile in platform device definitions for FIMC controller 2 | |
341 | ||
342 | config S5P_DEV_FIMC3 | |
343 | bool | |
344 | help | |
345 | Compile in platform device definitions for FIMC controller 3 | |
346 | ||
347 | config S5P_DEV_FIMD0 | |
348 | bool | |
349 | help | |
350 | Compile in platform device definitions for FIMD controller 0 | |
351 | ||
352 | config S5P_DEV_G2D | |
353 | bool | |
354 | help | |
355 | Compile in platform device definitions for G2D device | |
356 | ||
357 | config S5P_DEV_I2C_HDMIPHY | |
358 | bool | |
359 | help | |
360 | Compile in platform device definitions for I2C HDMIPHY controller | |
361 | ||
362 | config S5P_DEV_JPEG | |
363 | bool | |
364 | help | |
365 | Compile in platform device definitions for JPEG codec | |
366 | ||
e033ca9b KK |
367 | config S5P_DEV_ONENAND |
368 | bool | |
369 | help | |
370 | Compile in platform device definition for OneNAND controller | |
371 | ||
372 | config S5P_DEV_TV | |
373 | bool | |
374 | help | |
375 | Compile in platform device definition for TV interface | |
376 | ||
2ce30137 BG |
377 | config S3C24XX_PWM |
378 | bool "PWM device support" | |
35e79061 AB |
379 | select PWM |
380 | select PWM_SAMSUNG | |
2ce30137 BG |
381 | help |
382 | Support for exporting the PWM timer blocks via the pwm device | |
383 | system | |
384 | ||
e51d5486 SN |
385 | config S3C_SETUP_CAMIF |
386 | bool | |
387 | help | |
388 | Compile in common setup code for S3C CAMIF devices | |
389 | ||
89f1fa08 BD |
390 | # DMA |
391 | ||
392 | config S3C_DMA | |
393 | bool | |
394 | help | |
395 | Internal configuration for S3C DMA core | |
396 | ||
105dddbf TF |
397 | config S5P_IRQ_PM |
398 | bool | |
399 | default y if S5P_PM | |
400 | help | |
401 | Legacy IRQ power management for S5P platforms | |
402 | ||
403 | config SAMSUNG_PM_GPIO | |
404 | bool | |
405 | default y if GPIO_SAMSUNG && PM | |
406 | help | |
407 | Include legacy GPIO power management code for platforms not using | |
408 | pinctrl-samsung driver. | |
409 | ||
cd8dc7ae TF |
410 | endif |
411 | ||
aa0de00e | 412 | config SAMSUNG_DMADEV |
d800edeb | 413 | bool |
b1b3f49c | 414 | select ARM_AMBA |
aa0de00e | 415 | select DMADEVICES |
20ef9e08 | 416 | select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \ |
aa0de00e | 417 | CPU_S5P6450 || CPU_S5P6440) |
d800edeb | 418 | help |
aa0de00e | 419 | Use DMA device engine for PL330 DMAC. |
d800edeb | 420 | |
cd8dc7ae TF |
421 | config S5P_DEV_MFC |
422 | bool | |
423 | help | |
424 | Compile in setup memory (init) code for MFC | |
425 | ||
8005745d BD |
426 | comment "Power management" |
427 | ||
428 | config SAMSUNG_PM_DEBUG | |
429 | bool "S3C2410 PM Suspend debug" | |
430 | depends on PM | |
3cd21f61 | 431 | select DEBUG_LL |
8005745d BD |
432 | help |
433 | Say Y here if you want verbose debugging from the PM Suspend and | |
434 | Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
435 | for more information. | |
436 | ||
437 | config S3C_PM_DEBUG_LED_SMDK | |
438 | bool "SMDK LED suspend/resume debugging" | |
439 | depends on PM && (MACH_SMDK6410) | |
440 | help | |
441 | Say Y here to enable the use of the SMDK LEDs on the baseboard | |
442 | for debugging of the state of the suspend and resume process. | |
443 | ||
444 | Note, this currently only works for S3C64XX based SMDK boards. | |
445 | ||
446 | config SAMSUNG_PM_CHECK | |
447 | bool "S3C2410 PM Suspend Memory CRC" | |
448 | depends on PM && CRC32 | |
449 | help | |
450 | Enable the PM code's memory area checksum over sleep. This option | |
451 | will generate CRCs of all blocks of memory, and store them before | |
452 | going to sleep. The blocks are then checked on resume for any | |
453 | errors. | |
454 | ||
455 | Note, this can take several seconds depending on memory size | |
456 | and CPU speed. | |
457 | ||
458 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
459 | ||
460 | config SAMSUNG_PM_CHECK_CHUNKSIZE | |
461 | int "S3C2410 PM Suspend CRC Chunksize (KiB)" | |
462 | depends on PM && SAMSUNG_PM_CHECK | |
463 | default 64 | |
464 | help | |
465 | Set the chunksize in Kilobytes of the CRC for checking memory | |
466 | corruption over suspend and resume. A smaller value will mean that | |
467 | the CRC data block will take more memory, but wil identify any | |
468 | faults with better precision. | |
469 | ||
470 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
471 | ||
0317e52e BD |
472 | config SAMSUNG_WAKEMASK |
473 | bool | |
474 | depends on PM | |
475 | help | |
476 | Compile support for wakeup-mask controls found on the S3C6400 | |
477 | and above. This code allows a set of interrupt to wakeup-mask | |
478 | mappings. See <plat/wakeup-mask.h> | |
479 | ||
a4658e57 TF |
480 | config SAMSUNG_WDT_RESET |
481 | bool | |
482 | help | |
483 | Compile support for system restart by triggering watchdog reset. | |
484 | Used on SoCs that do not provide dedicated reset control. | |
485 | ||
8eadcf74 KK |
486 | config S5P_PM |
487 | bool | |
488 | help | |
489 | Common code for power management support on S5P and newer SoCs | |
490 | Note: Do not select this for S5P6440 and S5P6450. | |
491 | ||
492 | config S5P_SLEEP | |
493 | bool | |
494 | help | |
495 | Internal config node to apply common S5P sleep management code. | |
496 | Can be selected by S5P and newer SoCs with similar sleep procedure. | |
497 | ||
952aeeb2 WD |
498 | config DEBUG_S3C_UART |
499 | depends on PLAT_SAMSUNG | |
500 | int | |
501 | default "0" if DEBUG_S3C_UART0 | |
502 | default "1" if DEBUG_S3C_UART1 | |
503 | default "2" if DEBUG_S3C_UART2 | |
5fa23dde | 504 | default "3" if DEBUG_S3C_UART3 |
952aeeb2 | 505 | |
cf383678 | 506 | endif |