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cf383678 BD |
1 | # arch/arm/plat-samsung/Kconfig |
2 | # | |
3 | # Copyright 2009 Simtec Electronics | |
4 | # | |
5 | # Licensed under GPLv2 | |
6 | ||
7 | config PLAT_SAMSUNG | |
8 | bool | |
2d4a3b76 | 9 | depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P |
ae5fa355 | 10 | select NO_IOPORT |
878ccdc1 | 11 | select GENERIC_IRQ_CHIP |
cf383678 BD |
12 | default y |
13 | help | |
14 | Base platform code for all Samsung SoC based systems | |
15 | ||
16 | if PLAT_SAMSUNG | |
17 | ||
89f1fa08 BD |
18 | # boot configurations |
19 | ||
20 | comment "Boot options" | |
21 | ||
22 | config S3C_BOOT_WATCHDOG | |
23 | bool "S3C Initialisation watchdog" | |
24 | depends on S3C2410_WATCHDOG | |
25 | help | |
26 | Say y to enable the watchdog during the kernel decompression | |
27 | stage. If the kernel fails to uncompress, then the watchdog | |
28 | will trigger a reset and the system should restart. | |
29 | ||
30 | config S3C_BOOT_ERROR_RESET | |
31 | bool "S3C Reboot on decompression error" | |
32 | help | |
33 | Say y here to use the watchdog to reset the system if the | |
34 | kernel decompressor detects an error during decompression. | |
35 | ||
36 | config S3C_BOOT_UART_FORCE_FIFO | |
37 | bool "Force UART FIFO on during boot process" | |
38 | default y | |
39 | help | |
40 | Say Y here to force the UART FIFOs on during the kernel | |
41 | uncompressor | |
42 | ||
43 | ||
44 | config S3C_LOWLEVEL_UART_PORT | |
45 | int "S3C UART to use for low-level messages" | |
46 | default 0 | |
47 | help | |
48 | Choice of which UART port to use for the low-level messages, | |
49 | such as the `Uncompressing...` at start time. The value of | |
50 | this configuration should be between zero and two. The port | |
51 | must have been initialised by the boot-loader before use. | |
52 | ||
53 | # clock options | |
54 | ||
aa9ad6ad HW |
55 | config SAMSUNG_CLKSRC |
56 | bool | |
57 | help | |
58 | Select the clock code for the clksrc implementation | |
59 | used by newer systems such as the S3C64XX. | |
cf383678 | 60 | |
7162ba03 BD |
61 | # options for IRQ support |
62 | ||
63 | config SAMSUNG_IRQ_VIC_TIMER | |
64 | bool | |
65 | help | |
66 | Internal configuration to build the VIC timer interrupt code. | |
67 | ||
4f830db9 BD |
68 | # options for gpio configuration support |
69 | ||
1f323cfd KK |
70 | config SAMSUNG_GPIOLIB_4BIT |
71 | bool | |
72 | help | |
73 | GPIOlib file contains the 4 bit modification functions for gpio | |
74 | configuration. GPIOlib shall be compiled only for S3C64XX and S5P | |
75 | series of processors. | |
76 | ||
4f830db9 BD |
77 | config S3C_GPIO_CFG_S3C64XX |
78 | bool | |
79 | help | |
80 | Internal configuration to enable S3C64XX style GPIO configuration | |
81 | functions. | |
82 | ||
838c6d49 MS |
83 | config S5P_GPIO_DRVSTR |
84 | bool | |
85 | help | |
86 | Internal configuration to get and set correct GPIO driver strength | |
87 | helper | |
88 | ||
85841bce KK |
89 | config SAMSUNG_GPIO_EXTRA |
90 | int "Number of additional GPIO pins" | |
91 | default 0 | |
92 | help | |
93 | Use additional GPIO space in addition to the GPIO's the SOC | |
94 | provides. This allows expanding the GPIO space for use with | |
95 | GPIO expanders. | |
96 | ||
89f1fa08 BD |
97 | config S3C_GPIO_SPACE |
98 | int "Space between gpio banks" | |
99 | default 0 | |
100 | help | |
101 | Add a number of spare GPIO entries between each bank for debugging | |
102 | purposes. This allows any problems where an counter overflows from | |
103 | one bank to another to be caught, at the expense of using a little | |
104 | more memory. | |
105 | ||
106 | config S3C_GPIO_TRACK | |
107 | bool | |
108 | help | |
109 | Internal configuration option to enable the s3c specific gpio | |
110 | chip tracking if the platform requires it. | |
111 | ||
3929e1e7 MC |
112 | # ADC driver |
113 | ||
114 | config S3C_ADC | |
115 | bool "ADC common driver support" | |
116 | help | |
117 | Core support for the ADC block found in the Samsung SoC systems | |
118 | for drivers such as the touchscreen and hwmon to use to share | |
119 | this resource. | |
120 | ||
b6a60413 BD |
121 | # device definitions to compile in |
122 | ||
123 | config S3C_DEV_HSMMC | |
124 | bool | |
125 | help | |
126 | Compile in platform device definitions for HSMMC code | |
127 | ||
128 | config S3C_DEV_HSMMC1 | |
129 | bool | |
130 | help | |
131 | Compile in platform device definitions for HSMMC channel 1 | |
132 | ||
133 | config S3C_DEV_HSMMC2 | |
134 | bool | |
135 | help | |
136 | Compile in platform device definitions for HSMMC channel 2 | |
137 | ||
b3c674bc HL |
138 | config S3C_DEV_HSMMC3 |
139 | bool | |
140 | help | |
141 | Compile in platform device definitions for HSMMC channel 3 | |
142 | ||
6cd82ffe MC |
143 | config S3C_DEV_HWMON |
144 | bool | |
145 | help | |
146 | Compile in platform device definitions for HWMON | |
147 | ||
b6a60413 BD |
148 | config S3C_DEV_I2C1 |
149 | bool | |
150 | help | |
151 | Compile in platform device definitions for I2C channel 1 | |
152 | ||
c8d833bf MS |
153 | config S3C_DEV_I2C2 |
154 | bool | |
155 | help | |
156 | Compile in platform device definitions for I2C channel 2 | |
157 | ||
b7a98255 KP |
158 | config S3C_DEV_I2C3 |
159 | bool | |
160 | help | |
161 | Compile in platform device definition for I2C controller 3 | |
162 | ||
163 | config S3C_DEV_I2C4 | |
164 | bool | |
165 | help | |
166 | Compile in platform device definition for I2C controller 4 | |
167 | ||
168 | config S3C_DEV_I2C5 | |
169 | bool | |
170 | help | |
171 | Compile in platform device definition for I2C controller 5 | |
172 | ||
173 | config S3C_DEV_I2C6 | |
174 | bool | |
175 | help | |
176 | Compile in platform device definition for I2C controller 6 | |
177 | ||
178 | config S3C_DEV_I2C7 | |
179 | bool | |
180 | help | |
181 | Compile in platform device definition for I2C controller 7 | |
182 | ||
b6a60413 BD |
183 | config S3C_DEV_FB |
184 | bool | |
185 | help | |
186 | Compile in platform device definition for framebuffer | |
187 | ||
188 | config S3C_DEV_USB_HOST | |
189 | bool | |
190 | help | |
191 | Compile in platform device definition for USB host. | |
192 | ||
193 | config S3C_DEV_USB_HSOTG | |
194 | bool | |
195 | help | |
196 | Compile in platform device definition for USB high-speed OtG | |
197 | ||
e1d5c93e BG |
198 | config S3C_DEV_WDT |
199 | bool | |
200 | default y if ARCH_S3C2410 | |
201 | help | |
202 | Complie in platform device definition for Watchdog Timer | |
203 | ||
b6a60413 BD |
204 | config S3C_DEV_NAND |
205 | bool | |
206 | help | |
207 | Compile in platform device definition for NAND controller | |
208 | ||
999304be MS |
209 | config S3C_DEV_ONENAND |
210 | bool | |
211 | help | |
212 | Compile in platform device definition for OneNAND controller | |
213 | ||
adc0950c AD |
214 | config S3C_DEV_RTC |
215 | bool | |
216 | help | |
217 | Complie in platform device definition for RTC | |
218 | ||
4f7cdc38 NK |
219 | config SAMSUNG_DEV_ADC |
220 | bool | |
221 | help | |
222 | Compile in platform device definition for ADC controller | |
223 | ||
db90005b AK |
224 | config SAMSUNG_DEV_IDE |
225 | bool | |
226 | help | |
227 | Compile in platform device definitions for IDE | |
228 | ||
4b4c6625 JB |
229 | config S3C64XX_DEV_SPI |
230 | bool | |
231 | help | |
232 | Compile in platform device definitions for S3C64XX's type | |
233 | SPI controllers. | |
234 | ||
2b6c02ab | 235 | config SAMSUNG_DEV_TS |
909de0d6 MC |
236 | bool |
237 | help | |
2b6c02ab | 238 | Common in platform device definitions for touchscreen device |
909de0d6 | 239 | |
995c48ad JS |
240 | config SAMSUNG_DEV_KEYPAD |
241 | bool | |
242 | help | |
243 | Compile in platform device definitions for keypad | |
244 | ||
2ce30137 BG |
245 | config SAMSUNG_DEV_PWM |
246 | bool | |
247 | default y if ARCH_S3C2410 | |
248 | help | |
249 | Compile in platform device definition for PWM Timer | |
250 | ||
f00207b2 BG |
251 | config SAMSUNG_DEV_BACKLIGHT |
252 | bool | |
253 | depends on SAMSUNG_DEV_PWM | |
254 | help | |
255 | Compile in platform device definition LCD backlight with PWM Timer | |
256 | ||
2ce30137 BG |
257 | config S3C24XX_PWM |
258 | bool "PWM device support" | |
259 | select HAVE_PWM | |
260 | help | |
261 | Support for exporting the PWM timer blocks via the pwm device | |
262 | system | |
263 | ||
89f1fa08 BD |
264 | # DMA |
265 | ||
266 | config S3C_DMA | |
267 | bool | |
268 | help | |
269 | Internal configuration for S3C DMA core | |
270 | ||
aa0de00e | 271 | config SAMSUNG_DMADEV |
d800edeb | 272 | bool |
aa0de00e BK |
273 | select DMADEVICES |
274 | select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \ | |
275 | CPU_S5P6450 || CPU_S5P6440) | |
276 | select ARM_AMBA | |
d800edeb | 277 | help |
aa0de00e | 278 | Use DMA device engine for PL330 DMAC. |
d800edeb | 279 | |
8005745d BD |
280 | comment "Power management" |
281 | ||
282 | config SAMSUNG_PM_DEBUG | |
283 | bool "S3C2410 PM Suspend debug" | |
284 | depends on PM | |
285 | help | |
286 | Say Y here if you want verbose debugging from the PM Suspend and | |
287 | Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
288 | for more information. | |
289 | ||
290 | config S3C_PM_DEBUG_LED_SMDK | |
291 | bool "SMDK LED suspend/resume debugging" | |
292 | depends on PM && (MACH_SMDK6410) | |
293 | help | |
294 | Say Y here to enable the use of the SMDK LEDs on the baseboard | |
295 | for debugging of the state of the suspend and resume process. | |
296 | ||
297 | Note, this currently only works for S3C64XX based SMDK boards. | |
298 | ||
299 | config SAMSUNG_PM_CHECK | |
300 | bool "S3C2410 PM Suspend Memory CRC" | |
301 | depends on PM && CRC32 | |
302 | help | |
303 | Enable the PM code's memory area checksum over sleep. This option | |
304 | will generate CRCs of all blocks of memory, and store them before | |
305 | going to sleep. The blocks are then checked on resume for any | |
306 | errors. | |
307 | ||
308 | Note, this can take several seconds depending on memory size | |
309 | and CPU speed. | |
310 | ||
311 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
312 | ||
313 | config SAMSUNG_PM_CHECK_CHUNKSIZE | |
314 | int "S3C2410 PM Suspend CRC Chunksize (KiB)" | |
315 | depends on PM && SAMSUNG_PM_CHECK | |
316 | default 64 | |
317 | help | |
318 | Set the chunksize in Kilobytes of the CRC for checking memory | |
319 | corruption over suspend and resume. A smaller value will mean that | |
320 | the CRC data block will take more memory, but wil identify any | |
321 | faults with better precision. | |
322 | ||
323 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
324 | ||
0317e52e BD |
325 | config SAMSUNG_WAKEMASK |
326 | bool | |
327 | depends on PM | |
328 | help | |
329 | Compile support for wakeup-mask controls found on the S3C6400 | |
330 | and above. This code allows a set of interrupt to wakeup-mask | |
331 | mappings. See <plat/wakeup-mask.h> | |
332 | ||
d930596a CY |
333 | comment "Power Domain" |
334 | ||
335 | config SAMSUNG_PD | |
336 | bool "Samsung Power Domain" | |
337 | depends on PM_RUNTIME | |
338 | help | |
339 | Say Y here if you want to control Power Domain by Runtime PM. | |
340 | ||
952aeeb2 WD |
341 | config DEBUG_S3C_UART |
342 | depends on PLAT_SAMSUNG | |
343 | int | |
344 | default "0" if DEBUG_S3C_UART0 | |
345 | default "1" if DEBUG_S3C_UART1 | |
346 | default "2" if DEBUG_S3C_UART2 | |
347 | ||
cf383678 | 348 | endif |