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[mirror_ubuntu-zesty-kernel.git] / arch / arm / plat-samsung / devs.c
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1/* linux/arch/arm/plat-samsung/devs.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Base SAMSUNG platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
78843727 13#include <linux/amba/pl330.h>
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14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/timer.h>
19#include <linux/init.h>
20#include <linux/serial_core.h>
334a1c70 21#include <linux/serial_s3c.h>
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22#include <linux/platform_device.h>
23#include <linux/io.h>
24#include <linux/slab.h>
25#include <linux/string.h>
26#include <linux/dma-mapping.h>
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27#include <linux/fb.h>
28#include <linux/gfp.h>
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29#include <linux/mtd/mtd.h>
30#include <linux/mtd/onenand.h>
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31#include <linux/mtd/partitions.h>
32#include <linux/mmc/host.h>
57167149 33#include <linux/ioport.h>
2bb1ad17 34#include <linux/sizes.h>
715a3e41 35#include <linux/platform_data/s3c-hsudc.h>
126625e1 36#include <linux/platform_data/s3c-hsotg.h>
7f99ef22 37#include <linux/platform_data/dma-s3c24xx.h>
61c542bf 38
eb4b0ec7 39#include <linux/platform_data/media/s5p_hdmi.h>
ee21ae68 40
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41#include <asm/irq.h>
42#include <asm/mach/arch.h>
43#include <asm/mach/map.h>
44#include <asm/mach/irq.h>
45
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46#include <mach/dma.h>
47#include <mach/irqs.h>
48#include <mach/map.h>
49
50#include <plat/cpu.h>
51#include <plat/devs.h>
bad1e6aa 52#include <plat/adc.h>
436d42c6 53#include <linux/platform_data/ata-samsung_cf.h>
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54#include <plat/fb.h>
55#include <plat/fb-s3c2410.h>
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56#include <linux/platform_data/hwmon-s3c.h>
57#include <linux/platform_data/i2c-s3c2410.h>
bad1e6aa 58#include <plat/keypad.h>
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59#include <linux/platform_data/mmc-s3cmci.h>
60#include <linux/platform_data/mtd-nand-s3c2410.h>
95e43d46 61#include <plat/pwm-core.h>
bad1e6aa 62#include <plat/sdhci.h>
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63#include <linux/platform_data/touchscreen-s3c2410.h>
64#include <linux/platform_data/usb-s3c2410_udc.h>
65#include <linux/platform_data/usb-ohci-s3c2410.h>
57167149 66#include <plat/usb-phy.h>
61c542bf 67#include <plat/regs-spi.h>
b9a1a743 68#include <linux/platform_data/asoc-s3c.h>
436d42c6 69#include <linux/platform_data/spi-s3c64xx.h>
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70
71static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
72
73/* AC97 */
74#ifdef CONFIG_CPU_S3C2440
75static struct resource s3c_ac97_resource[] = {
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76 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
77 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
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78};
79
80static struct s3c_audio_pdata s3c_ac97_pdata = {
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81#ifdef CONFIG_S3C24XX_DMAC
82 .dma_filter = s3c24xx_dma_filter,
83#endif
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84 .dma_playback = (void *)DMACH_PCM_OUT,
85 .dma_capture = (void *)DMACH_PCM_IN,
86 .dma_capture_mic = (void *)DMACH_MIC_IN,
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87};
88
89struct platform_device s3c_device_ac97 = {
90 .name = "samsung-ac97",
91 .id = -1,
92 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
93 .resource = s3c_ac97_resource,
94 .dev = {
95 .dma_mask = &samsung_device_dma_mask,
96 .coherent_dma_mask = DMA_BIT_MASK(32),
b9a1a743 97 .platform_data = &s3c_ac97_pdata,
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98 }
99};
100#endif /* CONFIG_CPU_S3C2440 */
101
102/* ADC */
103
104#ifdef CONFIG_PLAT_S3C24XX
105static struct resource s3c_adc_resource[] = {
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106 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
107 [1] = DEFINE_RES_IRQ(IRQ_TC),
108 [2] = DEFINE_RES_IRQ(IRQ_ADC),
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109};
110
111struct platform_device s3c_device_adc = {
112 .name = "s3c24xx-adc",
113 .id = -1,
114 .num_resources = ARRAY_SIZE(s3c_adc_resource),
115 .resource = s3c_adc_resource,
116};
117#endif /* CONFIG_PLAT_S3C24XX */
118
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119#if defined(CONFIG_SAMSUNG_DEV_ADC)
120static struct resource s3c_adc_resource[] = {
e663cb76 121 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
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122 [1] = DEFINE_RES_IRQ(IRQ_ADC),
123 [2] = DEFINE_RES_IRQ(IRQ_TC),
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124};
125
126struct platform_device s3c_device_adc = {
a829ae57 127 .name = "exynos-adc",
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128 .id = -1,
129 .num_resources = ARRAY_SIZE(s3c_adc_resource),
130 .resource = s3c_adc_resource,
131};
132#endif /* CONFIG_SAMSUNG_DEV_ADC */
133
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134/* Camif Controller */
135
136#ifdef CONFIG_CPU_S3C2440
137static struct resource s3c_camif_resource[] = {
e663cb76 138 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
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139 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
140 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
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141};
142
143struct platform_device s3c_device_camif = {
144 .name = "s3c2440-camif",
145 .id = -1,
146 .num_resources = ARRAY_SIZE(s3c_camif_resource),
147 .resource = s3c_camif_resource,
148 .dev = {
149 .dma_mask = &samsung_device_dma_mask,
150 .coherent_dma_mask = DMA_BIT_MASK(32),
151 }
152};
153#endif /* CONFIG_CPU_S3C2440 */
154
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155/* FB */
156
157#ifdef CONFIG_S3C_DEV_FB
158static struct resource s3c_fb_resource[] = {
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159 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
160 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
161 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
162 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
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163};
164
165struct platform_device s3c_device_fb = {
166 .name = "s3c-fb",
167 .id = -1,
168 .num_resources = ARRAY_SIZE(s3c_fb_resource),
169 .resource = s3c_fb_resource,
170 .dev = {
171 .dma_mask = &samsung_device_dma_mask,
172 .coherent_dma_mask = DMA_BIT_MASK(32),
173 },
174};
175
176void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
177{
178 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
179 &s3c_device_fb);
180}
181#endif /* CONFIG_S3C_DEV_FB */
182
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183/* HWMON */
184
185#ifdef CONFIG_S3C_DEV_HWMON
186struct platform_device s3c_device_hwmon = {
187 .name = "s3c-hwmon",
188 .id = -1,
189 .dev.parent = &s3c_device_adc.dev,
190};
191
192void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
193{
194 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
195 &s3c_device_hwmon);
196}
197#endif /* CONFIG_S3C_DEV_HWMON */
198
199/* HSMMC */
200
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201#ifdef CONFIG_S3C_DEV_HSMMC
202static struct resource s3c_hsmmc_resource[] = {
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203 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
204 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
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205};
206
207struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
208 .max_width = 4,
209 .host_caps = (MMC_CAP_4_BIT_DATA |
210 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
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211};
212
213struct platform_device s3c_device_hsmmc0 = {
214 .name = "s3c-sdhci",
215 .id = 0,
216 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
217 .resource = s3c_hsmmc_resource,
218 .dev = {
219 .dma_mask = &samsung_device_dma_mask,
220 .coherent_dma_mask = DMA_BIT_MASK(32),
221 .platform_data = &s3c_hsmmc0_def_platdata,
222 },
223};
224
225void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
226{
227 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
228}
229#endif /* CONFIG_S3C_DEV_HSMMC */
230
231#ifdef CONFIG_S3C_DEV_HSMMC1
232static struct resource s3c_hsmmc1_resource[] = {
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233 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
234 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
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235};
236
237struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
238 .max_width = 4,
239 .host_caps = (MMC_CAP_4_BIT_DATA |
240 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
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241};
242
243struct platform_device s3c_device_hsmmc1 = {
244 .name = "s3c-sdhci",
245 .id = 1,
246 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
247 .resource = s3c_hsmmc1_resource,
248 .dev = {
249 .dma_mask = &samsung_device_dma_mask,
250 .coherent_dma_mask = DMA_BIT_MASK(32),
251 .platform_data = &s3c_hsmmc1_def_platdata,
252 },
253};
254
255void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
256{
257 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
258}
259#endif /* CONFIG_S3C_DEV_HSMMC1 */
260
261/* HSMMC2 */
262
263#ifdef CONFIG_S3C_DEV_HSMMC2
264static struct resource s3c_hsmmc2_resource[] = {
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265 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
266 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
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267};
268
269struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
270 .max_width = 4,
271 .host_caps = (MMC_CAP_4_BIT_DATA |
272 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
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273};
274
275struct platform_device s3c_device_hsmmc2 = {
276 .name = "s3c-sdhci",
277 .id = 2,
278 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
279 .resource = s3c_hsmmc2_resource,
280 .dev = {
281 .dma_mask = &samsung_device_dma_mask,
282 .coherent_dma_mask = DMA_BIT_MASK(32),
283 .platform_data = &s3c_hsmmc2_def_platdata,
284 },
285};
286
287void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
288{
289 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
290}
291#endif /* CONFIG_S3C_DEV_HSMMC2 */
292
293#ifdef CONFIG_S3C_DEV_HSMMC3
294static struct resource s3c_hsmmc3_resource[] = {
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295 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
296 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
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297};
298
299struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
300 .max_width = 4,
301 .host_caps = (MMC_CAP_4_BIT_DATA |
302 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
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303};
304
305struct platform_device s3c_device_hsmmc3 = {
306 .name = "s3c-sdhci",
307 .id = 3,
308 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
309 .resource = s3c_hsmmc3_resource,
310 .dev = {
311 .dma_mask = &samsung_device_dma_mask,
312 .coherent_dma_mask = DMA_BIT_MASK(32),
313 .platform_data = &s3c_hsmmc3_def_platdata,
314 },
315};
316
317void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
318{
319 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
320}
321#endif /* CONFIG_S3C_DEV_HSMMC3 */
322
323/* I2C */
324
325static struct resource s3c_i2c0_resource[] = {
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326 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
327 [1] = DEFINE_RES_IRQ(IRQ_IIC),
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328};
329
330struct platform_device s3c_device_i2c0 = {
331 .name = "s3c2410-i2c",
bad1e6aa 332 .id = 0,
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333 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
334 .resource = s3c_i2c0_resource,
335};
336
337struct s3c2410_platform_i2c default_i2c_data __initdata = {
338 .flags = 0,
339 .slave_addr = 0x10,
340 .frequency = 100*1000,
341 .sda_delay = 100,
342};
343
344void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
345{
346 struct s3c2410_platform_i2c *npd;
347
693cec97 348 if (!pd) {
bad1e6aa 349 pd = &default_i2c_data;
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350 pd->bus_num = 0;
351 }
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352
353 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
354 &s3c_device_i2c0);
355
356 if (!npd->cfg_gpio)
357 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
358}
359
360#ifdef CONFIG_S3C_DEV_I2C1
361static struct resource s3c_i2c1_resource[] = {
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362 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
363 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
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364};
365
366struct platform_device s3c_device_i2c1 = {
367 .name = "s3c2410-i2c",
368 .id = 1,
369 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
370 .resource = s3c_i2c1_resource,
371};
372
373void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
374{
375 struct s3c2410_platform_i2c *npd;
376
377 if (!pd) {
378 pd = &default_i2c_data;
379 pd->bus_num = 1;
380 }
381
382 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
383 &s3c_device_i2c1);
384
385 if (!npd->cfg_gpio)
386 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
387}
388#endif /* CONFIG_S3C_DEV_I2C1 */
389
390#ifdef CONFIG_S3C_DEV_I2C2
391static struct resource s3c_i2c2_resource[] = {
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392 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
393 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
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394};
395
396struct platform_device s3c_device_i2c2 = {
397 .name = "s3c2410-i2c",
398 .id = 2,
399 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
400 .resource = s3c_i2c2_resource,
401};
402
403void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
404{
405 struct s3c2410_platform_i2c *npd;
406
407 if (!pd) {
408 pd = &default_i2c_data;
409 pd->bus_num = 2;
410 }
411
412 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
413 &s3c_device_i2c2);
414
415 if (!npd->cfg_gpio)
416 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
417}
418#endif /* CONFIG_S3C_DEV_I2C2 */
419
420#ifdef CONFIG_S3C_DEV_I2C3
421static struct resource s3c_i2c3_resource[] = {
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422 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
423 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
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424};
425
426struct platform_device s3c_device_i2c3 = {
427 .name = "s3c2440-i2c",
428 .id = 3,
429 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
430 .resource = s3c_i2c3_resource,
431};
432
433void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
434{
435 struct s3c2410_platform_i2c *npd;
436
437 if (!pd) {
438 pd = &default_i2c_data;
439 pd->bus_num = 3;
440 }
441
442 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
443 &s3c_device_i2c3);
444
445 if (!npd->cfg_gpio)
446 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
447}
448#endif /*CONFIG_S3C_DEV_I2C3 */
449
450#ifdef CONFIG_S3C_DEV_I2C4
451static struct resource s3c_i2c4_resource[] = {
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452 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
453 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
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454};
455
456struct platform_device s3c_device_i2c4 = {
457 .name = "s3c2440-i2c",
458 .id = 4,
459 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
460 .resource = s3c_i2c4_resource,
461};
462
463void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
464{
465 struct s3c2410_platform_i2c *npd;
466
467 if (!pd) {
468 pd = &default_i2c_data;
469 pd->bus_num = 4;
470 }
471
472 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
473 &s3c_device_i2c4);
474
475 if (!npd->cfg_gpio)
476 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
477}
478#endif /*CONFIG_S3C_DEV_I2C4 */
479
480#ifdef CONFIG_S3C_DEV_I2C5
481static struct resource s3c_i2c5_resource[] = {
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482 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
483 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
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484};
485
486struct platform_device s3c_device_i2c5 = {
487 .name = "s3c2440-i2c",
488 .id = 5,
489 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
490 .resource = s3c_i2c5_resource,
491};
492
493void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
494{
495 struct s3c2410_platform_i2c *npd;
496
497 if (!pd) {
498 pd = &default_i2c_data;
499 pd->bus_num = 5;
500 }
501
502 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
503 &s3c_device_i2c5);
504
505 if (!npd->cfg_gpio)
506 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
507}
508#endif /*CONFIG_S3C_DEV_I2C5 */
509
510#ifdef CONFIG_S3C_DEV_I2C6
511static struct resource s3c_i2c6_resource[] = {
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512 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
513 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
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514};
515
516struct platform_device s3c_device_i2c6 = {
517 .name = "s3c2440-i2c",
518 .id = 6,
519 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
520 .resource = s3c_i2c6_resource,
521};
522
523void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
524{
525 struct s3c2410_platform_i2c *npd;
526
527 if (!pd) {
528 pd = &default_i2c_data;
529 pd->bus_num = 6;
530 }
531
532 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
533 &s3c_device_i2c6);
534
535 if (!npd->cfg_gpio)
536 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
537}
538#endif /* CONFIG_S3C_DEV_I2C6 */
539
540#ifdef CONFIG_S3C_DEV_I2C7
541static struct resource s3c_i2c7_resource[] = {
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542 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
543 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
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544};
545
546struct platform_device s3c_device_i2c7 = {
547 .name = "s3c2440-i2c",
548 .id = 7,
549 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
550 .resource = s3c_i2c7_resource,
551};
552
553void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
554{
555 struct s3c2410_platform_i2c *npd;
556
557 if (!pd) {
558 pd = &default_i2c_data;
559 pd->bus_num = 7;
560 }
561
562 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
563 &s3c_device_i2c7);
564
565 if (!npd->cfg_gpio)
566 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
567}
568#endif /* CONFIG_S3C_DEV_I2C7 */
569
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570/* I2S */
571
572#ifdef CONFIG_PLAT_S3C24XX
573static struct resource s3c_iis_resource[] = {
e663cb76 574 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
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575};
576
359fdfa6 577static struct s3c_audio_pdata s3c_iis_platdata = {
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578#ifdef CONFIG_S3C24XX_DMAC
579 .dma_filter = s3c24xx_dma_filter,
580#endif
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581 .dma_playback = (void *)DMACH_I2S_OUT,
582 .dma_capture = (void *)DMACH_I2S_IN,
583};
584
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585struct platform_device s3c_device_iis = {
586 .name = "s3c24xx-iis",
587 .id = -1,
588 .num_resources = ARRAY_SIZE(s3c_iis_resource),
589 .resource = s3c_iis_resource,
590 .dev = {
591 .dma_mask = &samsung_device_dma_mask,
592 .coherent_dma_mask = DMA_BIT_MASK(32),
359fdfa6 593 .platform_data = &s3c_iis_platdata,
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594 }
595};
596#endif /* CONFIG_PLAT_S3C24XX */
597
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598/* IDE CFCON */
599
600#ifdef CONFIG_SAMSUNG_DEV_IDE
601static struct resource s3c_cfcon_resource[] = {
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602 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
603 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
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604};
605
606struct platform_device s3c_device_cfcon = {
607 .id = 0,
608 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
609 .resource = s3c_cfcon_resource,
610};
611
eff4c58d 612void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
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613{
614 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
615 &s3c_device_cfcon);
616}
617#endif /* CONFIG_SAMSUNG_DEV_IDE */
618
619/* KEYPAD */
620
621#ifdef CONFIG_SAMSUNG_DEV_KEYPAD
622static struct resource samsung_keypad_resources[] = {
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623 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
624 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
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625};
626
627struct platform_device samsung_device_keypad = {
628 .name = "samsung-keypad",
629 .id = -1,
630 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
631 .resource = samsung_keypad_resources,
632};
633
634void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
635{
636 struct samsung_keypad_platdata *npd;
637
638 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
639 &samsung_device_keypad);
640
641 if (!npd->cfg_gpio)
642 npd->cfg_gpio = samsung_keypad_cfg_gpio;
643}
644#endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
645
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646/* LCD Controller */
647
648#ifdef CONFIG_PLAT_S3C24XX
649static struct resource s3c_lcd_resource[] = {
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650 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
651 [1] = DEFINE_RES_IRQ(IRQ_LCD),
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652};
653
654struct platform_device s3c_device_lcd = {
655 .name = "s3c2410-lcd",
656 .id = -1,
657 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
658 .resource = s3c_lcd_resource,
659 .dev = {
660 .dma_mask = &samsung_device_dma_mask,
661 .coherent_dma_mask = DMA_BIT_MASK(32),
662 }
663};
664
665void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
666{
667 struct s3c2410fb_mach_info *npd;
668
669 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
670 if (npd) {
671 npd->displays = kmemdup(pd->displays,
672 sizeof(struct s3c2410fb_display) * npd->num_displays,
673 GFP_KERNEL);
674 if (!npd->displays)
675 printk(KERN_ERR "no memory for LCD display data\n");
676 } else {
677 printk(KERN_ERR "no memory for LCD platform data\n");
678 }
679}
680#endif /* CONFIG_PLAT_S3C24XX */
681
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682/* NAND */
683
684#ifdef CONFIG_S3C_DEV_NAND
685static struct resource s3c_nand_resource[] = {
e663cb76 686 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
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687};
688
689struct platform_device s3c_device_nand = {
690 .name = "s3c2410-nand",
691 .id = -1,
692 .num_resources = ARRAY_SIZE(s3c_nand_resource),
693 .resource = s3c_nand_resource,
694};
695
696/*
697 * s3c_nand_copy_set() - copy nand set data
698 * @set: The new structure, directly copied from the old.
699 *
700 * Copy all the fields from the NAND set field from what is probably __initdata
701 * to new kernel memory. The code returns 0 if the copy happened correctly or
702 * an error code for the calling function to display.
703 *
704 * Note, we currently do not try and look to see if we've already copied the
705 * data in a previous set.
706 */
707static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
708{
709 void *ptr;
710 int size;
711
712 size = sizeof(struct mtd_partition) * set->nr_partitions;
713 if (size) {
714 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
715 set->partitions = ptr;
716
717 if (!ptr)
718 return -ENOMEM;
719 }
720
721 if (set->nr_map && set->nr_chips) {
722 size = sizeof(int) * set->nr_chips;
723 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
724 set->nr_map = ptr;
725
726 if (!ptr)
727 return -ENOMEM;
728 }
729
730 if (set->ecc_layout) {
731 ptr = kmemdup(set->ecc_layout,
732 sizeof(struct nand_ecclayout), GFP_KERNEL);
733 set->ecc_layout = ptr;
734
735 if (!ptr)
736 return -ENOMEM;
737 }
738
739 return 0;
740}
741
742void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
743{
744 struct s3c2410_platform_nand *npd;
745 int size;
746 int ret;
747
748 /* note, if we get a failure in allocation, we simply drop out of the
749 * function. If there is so little memory available at initialisation
750 * time then there is little chance the system is going to run.
751 */
752
753 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
754 &s3c_device_nand);
755 if (!npd)
756 return;
757
758 /* now see if we need to copy any of the nand set data */
759
760 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
761 if (size) {
762 struct s3c2410_nand_set *from = npd->sets;
763 struct s3c2410_nand_set *to;
764 int i;
765
766 to = kmemdup(from, size, GFP_KERNEL);
767 npd->sets = to; /* set, even if we failed */
768
769 if (!to) {
770 printk(KERN_ERR "%s: no memory for sets\n", __func__);
771 return;
772 }
773
774 for (i = 0; i < npd->nr_sets; i++) {
775 ret = s3c_nand_copy_set(to);
776 if (ret) {
777 printk(KERN_ERR "%s: failed to copy set %d\n",
778 __func__, i);
779 return;
780 }
781 to++;
782 }
783 }
784}
785#endif /* CONFIG_S3C_DEV_NAND */
786
787/* ONENAND */
788
789#ifdef CONFIG_S3C_DEV_ONENAND
790static struct resource s3c_onenand_resources[] = {
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791 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
792 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
793 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
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794};
795
796struct platform_device s3c_device_onenand = {
797 .name = "samsung-onenand",
798 .id = 0,
799 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
800 .resource = s3c_onenand_resources,
801};
802#endif /* CONFIG_S3C_DEV_ONENAND */
803
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804#ifdef CONFIG_S3C64XX_DEV_ONENAND1
805static struct resource s3c64xx_onenand1_resources[] = {
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806 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
807 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
808 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
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809};
810
811struct platform_device s3c64xx_device_onenand1 = {
812 .name = "samsung-onenand",
813 .id = 1,
814 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
815 .resource = s3c64xx_onenand1_resources,
816};
817
eff4c58d 818void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
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819{
820 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
821 &s3c64xx_device_onenand1);
822}
823#endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
824
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825/* PWM Timer */
826
827#ifdef CONFIG_SAMSUNG_DEV_PWM
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828static struct resource samsung_pwm_resource[] = {
829 DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
830};
831
832struct platform_device samsung_device_pwm = {
833 .name = "samsung-pwm",
834 .id = -1,
835 .num_resources = ARRAY_SIZE(samsung_pwm_resource),
836 .resource = samsung_pwm_resource,
837};
838
839void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
840{
841 samsung_device_pwm.dev.platform_data = pd;
842}
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843#endif /* CONFIG_SAMSUNG_DEV_PWM */
844
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845/* RTC */
846
847#ifdef CONFIG_PLAT_S3C24XX
848static struct resource s3c_rtc_resource[] = {
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849 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
850 [1] = DEFINE_RES_IRQ(IRQ_RTC),
851 [2] = DEFINE_RES_IRQ(IRQ_TICK),
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852};
853
854struct platform_device s3c_device_rtc = {
855 .name = "s3c2410-rtc",
856 .id = -1,
857 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
858 .resource = s3c_rtc_resource,
859};
860#endif /* CONFIG_PLAT_S3C24XX */
861
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862#ifdef CONFIG_S3C_DEV_RTC
863static struct resource s3c_rtc_resource[] = {
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864 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
865 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
866 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
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867};
868
869struct platform_device s3c_device_rtc = {
870 .name = "s3c64xx-rtc",
871 .id = -1,
872 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
873 .resource = s3c_rtc_resource,
874};
875#endif /* CONFIG_S3C_DEV_RTC */
876
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877/* SDI */
878
879#ifdef CONFIG_PLAT_S3C24XX
880static struct resource s3c_sdi_resource[] = {
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881 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
882 [1] = DEFINE_RES_IRQ(IRQ_SDI),
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883};
884
885struct platform_device s3c_device_sdi = {
886 .name = "s3c2410-sdi",
887 .id = -1,
888 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
889 .resource = s3c_sdi_resource,
890};
891
892void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
893{
894 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
895 &s3c_device_sdi);
896}
897#endif /* CONFIG_PLAT_S3C24XX */
898
899/* SPI */
900
901#ifdef CONFIG_PLAT_S3C24XX
902static struct resource s3c_spi0_resource[] = {
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903 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
904 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
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905};
906
907struct platform_device s3c_device_spi0 = {
908 .name = "s3c2410-spi",
909 .id = 0,
910 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
911 .resource = s3c_spi0_resource,
912 .dev = {
913 .dma_mask = &samsung_device_dma_mask,
914 .coherent_dma_mask = DMA_BIT_MASK(32),
915 }
916};
917
918static struct resource s3c_spi1_resource[] = {
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919 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
920 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
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921};
922
923struct platform_device s3c_device_spi1 = {
924 .name = "s3c2410-spi",
925 .id = 1,
926 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
927 .resource = s3c_spi1_resource,
928 .dev = {
929 .dma_mask = &samsung_device_dma_mask,
930 .coherent_dma_mask = DMA_BIT_MASK(32),
931 }
932};
933#endif /* CONFIG_PLAT_S3C24XX */
934
935/* Touchscreen */
936
937#ifdef CONFIG_PLAT_S3C24XX
938static struct resource s3c_ts_resource[] = {
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939 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
940 [1] = DEFINE_RES_IRQ(IRQ_TC),
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941};
942
943struct platform_device s3c_device_ts = {
944 .name = "s3c2410-ts",
945 .id = -1,
946 .dev.parent = &s3c_device_adc.dev,
947 .num_resources = ARRAY_SIZE(s3c_ts_resource),
948 .resource = s3c_ts_resource,
949};
950
951void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
952{
953 s3c_set_platdata(hard_s3c2410ts_info,
954 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
955}
956#endif /* CONFIG_PLAT_S3C24XX */
957
bad1e6aa 958#ifdef CONFIG_SAMSUNG_DEV_TS
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959static struct s3c2410_ts_mach_info default_ts_data __initdata = {
960 .delay = 10000,
961 .presc = 49,
962 .oversampling_shift = 2,
963};
964
a829ae57 965void __init s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
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966{
967 if (!pd)
968 pd = &default_ts_data;
969
970 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
a829ae57 971 &s3c_device_adc);
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972}
973#endif /* CONFIG_SAMSUNG_DEV_TS */
974
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975/* USB */
976
977#ifdef CONFIG_S3C_DEV_USB_HOST
978static struct resource s3c_usb_resource[] = {
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979 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
980 [1] = DEFINE_RES_IRQ(IRQ_USBH),
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981};
982
983struct platform_device s3c_device_ohci = {
984 .name = "s3c2410-ohci",
985 .id = -1,
986 .num_resources = ARRAY_SIZE(s3c_usb_resource),
987 .resource = s3c_usb_resource,
988 .dev = {
989 .dma_mask = &samsung_device_dma_mask,
990 .coherent_dma_mask = DMA_BIT_MASK(32),
991 }
992};
993
994/*
995 * s3c_ohci_set_platdata - initialise OHCI device platform data
996 * @info: The platform data.
997 *
998 * This call copies the @info passed in and sets the device .platform_data
999 * field to that copy. The @info is copied so that the original can be marked
1000 * __initdata.
1001 */
1002
1003void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1004{
1005 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1006 &s3c_device_ohci);
1007}
1008#endif /* CONFIG_S3C_DEV_USB_HOST */
1009
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1010/* USB Device (Gadget) */
1011
1012#ifdef CONFIG_PLAT_S3C24XX
1013static struct resource s3c_usbgadget_resource[] = {
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1014 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1015 [1] = DEFINE_RES_IRQ(IRQ_USBD),
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1016};
1017
1018struct platform_device s3c_device_usbgadget = {
1019 .name = "s3c2410-usbgadget",
1020 .id = -1,
1021 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1022 .resource = s3c_usbgadget_resource,
1023};
1024
1025void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1026{
1027 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1028}
1029#endif /* CONFIG_PLAT_S3C24XX */
1030
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1031/* USB HSOTG */
1032
1033#ifdef CONFIG_S3C_DEV_USB_HSOTG
1034static struct resource s3c_usb_hsotg_resources[] = {
c65d8ef2 1035 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
e663cb76 1036 [1] = DEFINE_RES_IRQ(IRQ_OTG),
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1037};
1038
1039struct platform_device s3c_device_usb_hsotg = {
1040 .name = "s3c-hsotg",
1041 .id = -1,
1042 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1043 .resource = s3c_usb_hsotg_resources,
1044 .dev = {
1045 .dma_mask = &samsung_device_dma_mask,
1046 .coherent_dma_mask = DMA_BIT_MASK(32),
1047 },
1048};
99f6e1f5 1049
1f91b4cc 1050void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd)
99f6e1f5 1051{
1f91b4cc 1052 struct dwc2_hsotg_plat *npd;
99f6e1f5 1053
1f91b4cc 1054 npd = s3c_set_platdata(pd, sizeof(struct dwc2_hsotg_plat),
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1055 &s3c_device_usb_hsotg);
1056
1057 if (!npd->phy_init)
1058 npd->phy_init = s5p_usb_phy_init;
1059 if (!npd->phy_exit)
1060 npd->phy_exit = s5p_usb_phy_exit;
1061}
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1062#endif /* CONFIG_S3C_DEV_USB_HSOTG */
1063
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1064/* USB High Spped 2.0 Device (Gadget) */
1065
1066#ifdef CONFIG_PLAT_S3C24XX
1067static struct resource s3c_hsudc_resource[] = {
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1068 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1069 [1] = DEFINE_RES_IRQ(IRQ_USBD),
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1070};
1071
1072struct platform_device s3c_device_usb_hsudc = {
1073 .name = "s3c-hsudc",
1074 .id = -1,
1075 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1076 .resource = s3c_hsudc_resource,
1077 .dev = {
1078 .dma_mask = &samsung_device_dma_mask,
1079 .coherent_dma_mask = DMA_BIT_MASK(32),
1080 },
1081};
1082
1083void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1084{
1085 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1086}
1087#endif /* CONFIG_PLAT_S3C24XX */
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1088
1089/* WDT */
1090
1091#ifdef CONFIG_S3C_DEV_WDT
1092static struct resource s3c_wdt_resource[] = {
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1093 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1094 [1] = DEFINE_RES_IRQ(IRQ_WDT),
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1095};
1096
1097struct platform_device s3c_device_wdt = {
1098 .name = "s3c2410-wdt",
1099 .id = -1,
1100 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1101 .resource = s3c_wdt_resource,
1102};
1103#endif /* CONFIG_S3C_DEV_WDT */
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1104
1105#ifdef CONFIG_S3C64XX_DEV_SPI0
1106static struct resource s3c64xx_spi0_resource[] = {
1107 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
a0067db3 1108 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
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1109};
1110
1111struct platform_device s3c64xx_device_spi0 = {
4d0efdd5 1112 .name = "s3c6410-spi",
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1113 .id = 0,
1114 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1115 .resource = s3c64xx_spi0_resource,
1116 .dev = {
1117 .dma_mask = &samsung_device_dma_mask,
1118 .coherent_dma_mask = DMA_BIT_MASK(32),
1119 },
1120};
1121
4d0efdd5
TA
1122void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1123 int num_cs)
875a5937 1124{
4d0efdd5 1125 struct s3c64xx_spi_info pd;
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1126
1127 /* Reject invalid configuration */
1128 if (!num_cs || src_clk_nr < 0) {
1129 pr_err("%s: Invalid SPI configuration\n", __func__);
1130 return;
1131 }
1132
4d0efdd5
TA
1133 pd.num_cs = num_cs;
1134 pd.src_clk_nr = src_clk_nr;
1135 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
a0067db3
AB
1136 pd.dma_tx = (void *)DMACH_SPI0_TX;
1137 pd.dma_rx = (void *)DMACH_SPI0_RX;
7f99ef22 1138#if defined(CONFIG_PL330_DMA)
78843727 1139 pd.filter = pl330_filter;
1db0287a
TF
1140#elif defined(CONFIG_S3C64XX_PL080)
1141 pd.filter = pl08x_filter_id;
7f99ef22
HS
1142#elif defined(CONFIG_S3C24XX_DMAC)
1143 pd.filter = s3c24xx_dma_filter;
78843727 1144#endif
4566c7f7 1145
4d0efdd5 1146 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
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1147}
1148#endif /* CONFIG_S3C64XX_DEV_SPI0 */
1149
1150#ifdef CONFIG_S3C64XX_DEV_SPI1
1151static struct resource s3c64xx_spi1_resource[] = {
1152 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
a0067db3 1153 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
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1154};
1155
1156struct platform_device s3c64xx_device_spi1 = {
4d0efdd5 1157 .name = "s3c6410-spi",
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1158 .id = 1,
1159 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1160 .resource = s3c64xx_spi1_resource,
1161 .dev = {
1162 .dma_mask = &samsung_device_dma_mask,
1163 .coherent_dma_mask = DMA_BIT_MASK(32),
1164 },
1165};
1166
4d0efdd5
TA
1167void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1168 int num_cs)
875a5937 1169{
fb997a46
SN
1170 struct s3c64xx_spi_info pd;
1171
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1172 /* Reject invalid configuration */
1173 if (!num_cs || src_clk_nr < 0) {
1174 pr_err("%s: Invalid SPI configuration\n", __func__);
1175 return;
1176 }
1177
4d0efdd5
TA
1178 pd.num_cs = num_cs;
1179 pd.src_clk_nr = src_clk_nr;
1180 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
a0067db3
AB
1181 pd.dma_tx = (void *)DMACH_SPI1_TX;
1182 pd.dma_rx = (void *)DMACH_SPI1_RX;
1db0287a 1183#if defined(CONFIG_PL330_DMA)
78843727 1184 pd.filter = pl330_filter;
1db0287a
TF
1185#elif defined(CONFIG_S3C64XX_PL080)
1186 pd.filter = pl08x_filter_id;
78843727 1187#endif
4566c7f7 1188
a0067db3 1189
4d0efdd5 1190 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
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1191}
1192#endif /* CONFIG_S3C64XX_DEV_SPI1 */
1193
1194#ifdef CONFIG_S3C64XX_DEV_SPI2
1195static struct resource s3c64xx_spi2_resource[] = {
1196 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
a0067db3 1197 [1] = DEFINE_RES_IRQ(IRQ_SPI2),
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1198};
1199
1200struct platform_device s3c64xx_device_spi2 = {
4d0efdd5 1201 .name = "s3c6410-spi",
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1202 .id = 2,
1203 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1204 .resource = s3c64xx_spi2_resource,
1205 .dev = {
1206 .dma_mask = &samsung_device_dma_mask,
1207 .coherent_dma_mask = DMA_BIT_MASK(32),
1208 },
1209};
1210
4d0efdd5
TA
1211void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1212 int num_cs)
875a5937 1213{
4d0efdd5 1214 struct s3c64xx_spi_info pd;
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1215
1216 /* Reject invalid configuration */
1217 if (!num_cs || src_clk_nr < 0) {
1218 pr_err("%s: Invalid SPI configuration\n", __func__);
1219 return;
1220 }
1221
4d0efdd5
TA
1222 pd.num_cs = num_cs;
1223 pd.src_clk_nr = src_clk_nr;
1224 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
a0067db3
AB
1225 pd.dma_tx = (void *)DMACH_SPI2_TX;
1226 pd.dma_rx = (void *)DMACH_SPI2_RX;
1db0287a 1227#if defined(CONFIG_PL330_DMA)
78843727 1228 pd.filter = pl330_filter;
1db0287a
TF
1229#elif defined(CONFIG_S3C64XX_PL080)
1230 pd.filter = pl08x_filter_id;
78843727 1231#endif
323d7717 1232
4d0efdd5 1233 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
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1234}
1235#endif /* CONFIG_S3C64XX_DEV_SPI2 */