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61c542bf KK |
1 | /* linux/arch/arm/plat-samsung/devs.c |
2 | * | |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com | |
5 | * | |
6 | * Base SAMSUNG platform device definitions | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
78843727 | 13 | #include <linux/amba/pl330.h> |
61c542bf KK |
14 | #include <linux/kernel.h> |
15 | #include <linux/types.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/timer.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/serial_core.h> | |
334a1c70 | 21 | #include <linux/serial_s3c.h> |
61c542bf KK |
22 | #include <linux/platform_device.h> |
23 | #include <linux/io.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/string.h> | |
26 | #include <linux/dma-mapping.h> | |
57167149 KK |
27 | #include <linux/fb.h> |
28 | #include <linux/gfp.h> | |
0523ec3a KK |
29 | #include <linux/mtd/mtd.h> |
30 | #include <linux/mtd/onenand.h> | |
bad1e6aa KK |
31 | #include <linux/mtd/partitions.h> |
32 | #include <linux/mmc/host.h> | |
57167149 | 33 | #include <linux/ioport.h> |
2bb1ad17 | 34 | #include <linux/sizes.h> |
715a3e41 | 35 | #include <linux/platform_data/s3c-hsudc.h> |
126625e1 | 36 | #include <linux/platform_data/s3c-hsotg.h> |
7f99ef22 | 37 | #include <linux/platform_data/dma-s3c24xx.h> |
61c542bf | 38 | |
eb4b0ec7 | 39 | #include <linux/platform_data/media/s5p_hdmi.h> |
ee21ae68 | 40 | |
61c542bf KK |
41 | #include <asm/irq.h> |
42 | #include <asm/mach/arch.h> | |
43 | #include <asm/mach/map.h> | |
44 | #include <asm/mach/irq.h> | |
45 | ||
61c542bf KK |
46 | #include <mach/dma.h> |
47 | #include <mach/irqs.h> | |
48 | #include <mach/map.h> | |
49 | ||
50 | #include <plat/cpu.h> | |
51 | #include <plat/devs.h> | |
bad1e6aa | 52 | #include <plat/adc.h> |
436d42c6 | 53 | #include <linux/platform_data/ata-samsung_cf.h> |
61c542bf KK |
54 | #include <plat/fb.h> |
55 | #include <plat/fb-s3c2410.h> | |
436d42c6 AB |
56 | #include <linux/platform_data/hwmon-s3c.h> |
57 | #include <linux/platform_data/i2c-s3c2410.h> | |
bad1e6aa | 58 | #include <plat/keypad.h> |
436d42c6 AB |
59 | #include <linux/platform_data/mmc-s3cmci.h> |
60 | #include <linux/platform_data/mtd-nand-s3c2410.h> | |
95e43d46 | 61 | #include <plat/pwm-core.h> |
bad1e6aa | 62 | #include <plat/sdhci.h> |
436d42c6 AB |
63 | #include <linux/platform_data/touchscreen-s3c2410.h> |
64 | #include <linux/platform_data/usb-s3c2410_udc.h> | |
65 | #include <linux/platform_data/usb-ohci-s3c2410.h> | |
57167149 | 66 | #include <plat/usb-phy.h> |
61c542bf | 67 | #include <plat/regs-spi.h> |
436d42c6 | 68 | #include <linux/platform_data/spi-s3c64xx.h> |
61c542bf KK |
69 | |
70 | static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); | |
71 | ||
72 | /* AC97 */ | |
73 | #ifdef CONFIG_CPU_S3C2440 | |
74 | static struct resource s3c_ac97_resource[] = { | |
e663cb76 KK |
75 | [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97), |
76 | [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97), | |
77 | [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"), | |
78 | [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"), | |
79 | [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"), | |
61c542bf KK |
80 | }; |
81 | ||
82 | struct platform_device s3c_device_ac97 = { | |
83 | .name = "samsung-ac97", | |
84 | .id = -1, | |
85 | .num_resources = ARRAY_SIZE(s3c_ac97_resource), | |
86 | .resource = s3c_ac97_resource, | |
87 | .dev = { | |
88 | .dma_mask = &samsung_device_dma_mask, | |
89 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
90 | } | |
91 | }; | |
92 | #endif /* CONFIG_CPU_S3C2440 */ | |
93 | ||
94 | /* ADC */ | |
95 | ||
96 | #ifdef CONFIG_PLAT_S3C24XX | |
97 | static struct resource s3c_adc_resource[] = { | |
e663cb76 KK |
98 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), |
99 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
100 | [2] = DEFINE_RES_IRQ(IRQ_ADC), | |
61c542bf KK |
101 | }; |
102 | ||
103 | struct platform_device s3c_device_adc = { | |
104 | .name = "s3c24xx-adc", | |
105 | .id = -1, | |
106 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | |
107 | .resource = s3c_adc_resource, | |
108 | }; | |
109 | #endif /* CONFIG_PLAT_S3C24XX */ | |
110 | ||
bad1e6aa KK |
111 | #if defined(CONFIG_SAMSUNG_DEV_ADC) |
112 | static struct resource s3c_adc_resource[] = { | |
e663cb76 KK |
113 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), |
114 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
115 | [2] = DEFINE_RES_IRQ(IRQ_ADC), | |
bad1e6aa KK |
116 | }; |
117 | ||
118 | struct platform_device s3c_device_adc = { | |
119 | .name = "samsung-adc", | |
120 | .id = -1, | |
121 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | |
122 | .resource = s3c_adc_resource, | |
123 | }; | |
124 | #endif /* CONFIG_SAMSUNG_DEV_ADC */ | |
125 | ||
61c542bf KK |
126 | /* Camif Controller */ |
127 | ||
128 | #ifdef CONFIG_CPU_S3C2440 | |
129 | static struct resource s3c_camif_resource[] = { | |
e663cb76 | 130 | [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), |
705c75e3 SN |
131 | [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C), |
132 | [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P), | |
61c542bf KK |
133 | }; |
134 | ||
135 | struct platform_device s3c_device_camif = { | |
136 | .name = "s3c2440-camif", | |
137 | .id = -1, | |
138 | .num_resources = ARRAY_SIZE(s3c_camif_resource), | |
139 | .resource = s3c_camif_resource, | |
140 | .dev = { | |
141 | .dma_mask = &samsung_device_dma_mask, | |
142 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
143 | } | |
144 | }; | |
145 | #endif /* CONFIG_CPU_S3C2440 */ | |
146 | ||
bad1e6aa KK |
147 | /* FB */ |
148 | ||
149 | #ifdef CONFIG_S3C_DEV_FB | |
150 | static struct resource s3c_fb_resource[] = { | |
e663cb76 KK |
151 | [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K), |
152 | [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC), | |
153 | [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO), | |
154 | [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM), | |
bad1e6aa KK |
155 | }; |
156 | ||
157 | struct platform_device s3c_device_fb = { | |
158 | .name = "s3c-fb", | |
159 | .id = -1, | |
160 | .num_resources = ARRAY_SIZE(s3c_fb_resource), | |
161 | .resource = s3c_fb_resource, | |
162 | .dev = { | |
163 | .dma_mask = &samsung_device_dma_mask, | |
164 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
165 | }, | |
166 | }; | |
167 | ||
168 | void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd) | |
169 | { | |
170 | s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), | |
171 | &s3c_device_fb); | |
172 | } | |
173 | #endif /* CONFIG_S3C_DEV_FB */ | |
174 | ||
bad1e6aa KK |
175 | /* HWMON */ |
176 | ||
177 | #ifdef CONFIG_S3C_DEV_HWMON | |
178 | struct platform_device s3c_device_hwmon = { | |
179 | .name = "s3c-hwmon", | |
180 | .id = -1, | |
181 | .dev.parent = &s3c_device_adc.dev, | |
182 | }; | |
183 | ||
184 | void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd) | |
185 | { | |
186 | s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata), | |
187 | &s3c_device_hwmon); | |
188 | } | |
189 | #endif /* CONFIG_S3C_DEV_HWMON */ | |
190 | ||
191 | /* HSMMC */ | |
192 | ||
bad1e6aa KK |
193 | #ifdef CONFIG_S3C_DEV_HSMMC |
194 | static struct resource s3c_hsmmc_resource[] = { | |
e663cb76 KK |
195 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K), |
196 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC0), | |
bad1e6aa KK |
197 | }; |
198 | ||
199 | struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = { | |
200 | .max_width = 4, | |
201 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
202 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
203 | }; |
204 | ||
205 | struct platform_device s3c_device_hsmmc0 = { | |
206 | .name = "s3c-sdhci", | |
207 | .id = 0, | |
208 | .num_resources = ARRAY_SIZE(s3c_hsmmc_resource), | |
209 | .resource = s3c_hsmmc_resource, | |
210 | .dev = { | |
211 | .dma_mask = &samsung_device_dma_mask, | |
212 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
213 | .platform_data = &s3c_hsmmc0_def_platdata, | |
214 | }, | |
215 | }; | |
216 | ||
217 | void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) | |
218 | { | |
219 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata); | |
220 | } | |
221 | #endif /* CONFIG_S3C_DEV_HSMMC */ | |
222 | ||
223 | #ifdef CONFIG_S3C_DEV_HSMMC1 | |
224 | static struct resource s3c_hsmmc1_resource[] = { | |
e663cb76 KK |
225 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K), |
226 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC1), | |
bad1e6aa KK |
227 | }; |
228 | ||
229 | struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = { | |
230 | .max_width = 4, | |
231 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
232 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
233 | }; |
234 | ||
235 | struct platform_device s3c_device_hsmmc1 = { | |
236 | .name = "s3c-sdhci", | |
237 | .id = 1, | |
238 | .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource), | |
239 | .resource = s3c_hsmmc1_resource, | |
240 | .dev = { | |
241 | .dma_mask = &samsung_device_dma_mask, | |
242 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
243 | .platform_data = &s3c_hsmmc1_def_platdata, | |
244 | }, | |
245 | }; | |
246 | ||
247 | void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) | |
248 | { | |
249 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata); | |
250 | } | |
251 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | |
252 | ||
253 | /* HSMMC2 */ | |
254 | ||
255 | #ifdef CONFIG_S3C_DEV_HSMMC2 | |
256 | static struct resource s3c_hsmmc2_resource[] = { | |
e663cb76 KK |
257 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K), |
258 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC2), | |
bad1e6aa KK |
259 | }; |
260 | ||
261 | struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = { | |
262 | .max_width = 4, | |
263 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
264 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
265 | }; |
266 | ||
267 | struct platform_device s3c_device_hsmmc2 = { | |
268 | .name = "s3c-sdhci", | |
269 | .id = 2, | |
270 | .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource), | |
271 | .resource = s3c_hsmmc2_resource, | |
272 | .dev = { | |
273 | .dma_mask = &samsung_device_dma_mask, | |
274 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
275 | .platform_data = &s3c_hsmmc2_def_platdata, | |
276 | }, | |
277 | }; | |
278 | ||
279 | void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) | |
280 | { | |
281 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata); | |
282 | } | |
283 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | |
284 | ||
285 | #ifdef CONFIG_S3C_DEV_HSMMC3 | |
286 | static struct resource s3c_hsmmc3_resource[] = { | |
e663cb76 KK |
287 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K), |
288 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC3), | |
bad1e6aa KK |
289 | }; |
290 | ||
291 | struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = { | |
292 | .max_width = 4, | |
293 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
294 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
295 | }; |
296 | ||
297 | struct platform_device s3c_device_hsmmc3 = { | |
298 | .name = "s3c-sdhci", | |
299 | .id = 3, | |
300 | .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource), | |
301 | .resource = s3c_hsmmc3_resource, | |
302 | .dev = { | |
303 | .dma_mask = &samsung_device_dma_mask, | |
304 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
305 | .platform_data = &s3c_hsmmc3_def_platdata, | |
306 | }, | |
307 | }; | |
308 | ||
309 | void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd) | |
310 | { | |
311 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata); | |
312 | } | |
313 | #endif /* CONFIG_S3C_DEV_HSMMC3 */ | |
314 | ||
315 | /* I2C */ | |
316 | ||
317 | static struct resource s3c_i2c0_resource[] = { | |
e663cb76 KK |
318 | [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K), |
319 | [1] = DEFINE_RES_IRQ(IRQ_IIC), | |
bad1e6aa KK |
320 | }; |
321 | ||
322 | struct platform_device s3c_device_i2c0 = { | |
323 | .name = "s3c2410-i2c", | |
bad1e6aa | 324 | .id = 0, |
bad1e6aa KK |
325 | .num_resources = ARRAY_SIZE(s3c_i2c0_resource), |
326 | .resource = s3c_i2c0_resource, | |
327 | }; | |
328 | ||
329 | struct s3c2410_platform_i2c default_i2c_data __initdata = { | |
330 | .flags = 0, | |
331 | .slave_addr = 0x10, | |
332 | .frequency = 100*1000, | |
333 | .sda_delay = 100, | |
334 | }; | |
335 | ||
336 | void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) | |
337 | { | |
338 | struct s3c2410_platform_i2c *npd; | |
339 | ||
693cec97 | 340 | if (!pd) { |
bad1e6aa | 341 | pd = &default_i2c_data; |
693cec97 SN |
342 | pd->bus_num = 0; |
343 | } | |
bad1e6aa KK |
344 | |
345 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
346 | &s3c_device_i2c0); | |
347 | ||
348 | if (!npd->cfg_gpio) | |
349 | npd->cfg_gpio = s3c_i2c0_cfg_gpio; | |
350 | } | |
351 | ||
352 | #ifdef CONFIG_S3C_DEV_I2C1 | |
353 | static struct resource s3c_i2c1_resource[] = { | |
e663cb76 KK |
354 | [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K), |
355 | [1] = DEFINE_RES_IRQ(IRQ_IIC1), | |
bad1e6aa KK |
356 | }; |
357 | ||
358 | struct platform_device s3c_device_i2c1 = { | |
359 | .name = "s3c2410-i2c", | |
360 | .id = 1, | |
361 | .num_resources = ARRAY_SIZE(s3c_i2c1_resource), | |
362 | .resource = s3c_i2c1_resource, | |
363 | }; | |
364 | ||
365 | void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) | |
366 | { | |
367 | struct s3c2410_platform_i2c *npd; | |
368 | ||
369 | if (!pd) { | |
370 | pd = &default_i2c_data; | |
371 | pd->bus_num = 1; | |
372 | } | |
373 | ||
374 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
375 | &s3c_device_i2c1); | |
376 | ||
377 | if (!npd->cfg_gpio) | |
378 | npd->cfg_gpio = s3c_i2c1_cfg_gpio; | |
379 | } | |
380 | #endif /* CONFIG_S3C_DEV_I2C1 */ | |
381 | ||
382 | #ifdef CONFIG_S3C_DEV_I2C2 | |
383 | static struct resource s3c_i2c2_resource[] = { | |
e663cb76 KK |
384 | [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K), |
385 | [1] = DEFINE_RES_IRQ(IRQ_IIC2), | |
bad1e6aa KK |
386 | }; |
387 | ||
388 | struct platform_device s3c_device_i2c2 = { | |
389 | .name = "s3c2410-i2c", | |
390 | .id = 2, | |
391 | .num_resources = ARRAY_SIZE(s3c_i2c2_resource), | |
392 | .resource = s3c_i2c2_resource, | |
393 | }; | |
394 | ||
395 | void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) | |
396 | { | |
397 | struct s3c2410_platform_i2c *npd; | |
398 | ||
399 | if (!pd) { | |
400 | pd = &default_i2c_data; | |
401 | pd->bus_num = 2; | |
402 | } | |
403 | ||
404 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
405 | &s3c_device_i2c2); | |
406 | ||
407 | if (!npd->cfg_gpio) | |
408 | npd->cfg_gpio = s3c_i2c2_cfg_gpio; | |
409 | } | |
410 | #endif /* CONFIG_S3C_DEV_I2C2 */ | |
411 | ||
412 | #ifdef CONFIG_S3C_DEV_I2C3 | |
413 | static struct resource s3c_i2c3_resource[] = { | |
e663cb76 KK |
414 | [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K), |
415 | [1] = DEFINE_RES_IRQ(IRQ_IIC3), | |
bad1e6aa KK |
416 | }; |
417 | ||
418 | struct platform_device s3c_device_i2c3 = { | |
419 | .name = "s3c2440-i2c", | |
420 | .id = 3, | |
421 | .num_resources = ARRAY_SIZE(s3c_i2c3_resource), | |
422 | .resource = s3c_i2c3_resource, | |
423 | }; | |
424 | ||
425 | void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd) | |
426 | { | |
427 | struct s3c2410_platform_i2c *npd; | |
428 | ||
429 | if (!pd) { | |
430 | pd = &default_i2c_data; | |
431 | pd->bus_num = 3; | |
432 | } | |
433 | ||
434 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
435 | &s3c_device_i2c3); | |
436 | ||
437 | if (!npd->cfg_gpio) | |
438 | npd->cfg_gpio = s3c_i2c3_cfg_gpio; | |
439 | } | |
440 | #endif /*CONFIG_S3C_DEV_I2C3 */ | |
441 | ||
442 | #ifdef CONFIG_S3C_DEV_I2C4 | |
443 | static struct resource s3c_i2c4_resource[] = { | |
e663cb76 KK |
444 | [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K), |
445 | [1] = DEFINE_RES_IRQ(IRQ_IIC4), | |
bad1e6aa KK |
446 | }; |
447 | ||
448 | struct platform_device s3c_device_i2c4 = { | |
449 | .name = "s3c2440-i2c", | |
450 | .id = 4, | |
451 | .num_resources = ARRAY_SIZE(s3c_i2c4_resource), | |
452 | .resource = s3c_i2c4_resource, | |
453 | }; | |
454 | ||
455 | void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd) | |
456 | { | |
457 | struct s3c2410_platform_i2c *npd; | |
458 | ||
459 | if (!pd) { | |
460 | pd = &default_i2c_data; | |
461 | pd->bus_num = 4; | |
462 | } | |
463 | ||
464 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
465 | &s3c_device_i2c4); | |
466 | ||
467 | if (!npd->cfg_gpio) | |
468 | npd->cfg_gpio = s3c_i2c4_cfg_gpio; | |
469 | } | |
470 | #endif /*CONFIG_S3C_DEV_I2C4 */ | |
471 | ||
472 | #ifdef CONFIG_S3C_DEV_I2C5 | |
473 | static struct resource s3c_i2c5_resource[] = { | |
e663cb76 KK |
474 | [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K), |
475 | [1] = DEFINE_RES_IRQ(IRQ_IIC5), | |
bad1e6aa KK |
476 | }; |
477 | ||
478 | struct platform_device s3c_device_i2c5 = { | |
479 | .name = "s3c2440-i2c", | |
480 | .id = 5, | |
481 | .num_resources = ARRAY_SIZE(s3c_i2c5_resource), | |
482 | .resource = s3c_i2c5_resource, | |
483 | }; | |
484 | ||
485 | void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd) | |
486 | { | |
487 | struct s3c2410_platform_i2c *npd; | |
488 | ||
489 | if (!pd) { | |
490 | pd = &default_i2c_data; | |
491 | pd->bus_num = 5; | |
492 | } | |
493 | ||
494 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
495 | &s3c_device_i2c5); | |
496 | ||
497 | if (!npd->cfg_gpio) | |
498 | npd->cfg_gpio = s3c_i2c5_cfg_gpio; | |
499 | } | |
500 | #endif /*CONFIG_S3C_DEV_I2C5 */ | |
501 | ||
502 | #ifdef CONFIG_S3C_DEV_I2C6 | |
503 | static struct resource s3c_i2c6_resource[] = { | |
e663cb76 KK |
504 | [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K), |
505 | [1] = DEFINE_RES_IRQ(IRQ_IIC6), | |
bad1e6aa KK |
506 | }; |
507 | ||
508 | struct platform_device s3c_device_i2c6 = { | |
509 | .name = "s3c2440-i2c", | |
510 | .id = 6, | |
511 | .num_resources = ARRAY_SIZE(s3c_i2c6_resource), | |
512 | .resource = s3c_i2c6_resource, | |
513 | }; | |
514 | ||
515 | void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd) | |
516 | { | |
517 | struct s3c2410_platform_i2c *npd; | |
518 | ||
519 | if (!pd) { | |
520 | pd = &default_i2c_data; | |
521 | pd->bus_num = 6; | |
522 | } | |
523 | ||
524 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
525 | &s3c_device_i2c6); | |
526 | ||
527 | if (!npd->cfg_gpio) | |
528 | npd->cfg_gpio = s3c_i2c6_cfg_gpio; | |
529 | } | |
530 | #endif /* CONFIG_S3C_DEV_I2C6 */ | |
531 | ||
532 | #ifdef CONFIG_S3C_DEV_I2C7 | |
533 | static struct resource s3c_i2c7_resource[] = { | |
e663cb76 KK |
534 | [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K), |
535 | [1] = DEFINE_RES_IRQ(IRQ_IIC7), | |
bad1e6aa KK |
536 | }; |
537 | ||
538 | struct platform_device s3c_device_i2c7 = { | |
539 | .name = "s3c2440-i2c", | |
540 | .id = 7, | |
541 | .num_resources = ARRAY_SIZE(s3c_i2c7_resource), | |
542 | .resource = s3c_i2c7_resource, | |
543 | }; | |
544 | ||
545 | void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd) | |
546 | { | |
547 | struct s3c2410_platform_i2c *npd; | |
548 | ||
549 | if (!pd) { | |
550 | pd = &default_i2c_data; | |
551 | pd->bus_num = 7; | |
552 | } | |
553 | ||
554 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
555 | &s3c_device_i2c7); | |
556 | ||
557 | if (!npd->cfg_gpio) | |
558 | npd->cfg_gpio = s3c_i2c7_cfg_gpio; | |
559 | } | |
560 | #endif /* CONFIG_S3C_DEV_I2C7 */ | |
561 | ||
61c542bf KK |
562 | /* I2S */ |
563 | ||
564 | #ifdef CONFIG_PLAT_S3C24XX | |
565 | static struct resource s3c_iis_resource[] = { | |
e663cb76 | 566 | [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS), |
61c542bf KK |
567 | }; |
568 | ||
569 | struct platform_device s3c_device_iis = { | |
570 | .name = "s3c24xx-iis", | |
571 | .id = -1, | |
572 | .num_resources = ARRAY_SIZE(s3c_iis_resource), | |
573 | .resource = s3c_iis_resource, | |
574 | .dev = { | |
575 | .dma_mask = &samsung_device_dma_mask, | |
576 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
577 | } | |
578 | }; | |
579 | #endif /* CONFIG_PLAT_S3C24XX */ | |
580 | ||
bad1e6aa KK |
581 | /* IDE CFCON */ |
582 | ||
583 | #ifdef CONFIG_SAMSUNG_DEV_IDE | |
584 | static struct resource s3c_cfcon_resource[] = { | |
e663cb76 KK |
585 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K), |
586 | [1] = DEFINE_RES_IRQ(IRQ_CFCON), | |
bad1e6aa KK |
587 | }; |
588 | ||
589 | struct platform_device s3c_device_cfcon = { | |
590 | .id = 0, | |
591 | .num_resources = ARRAY_SIZE(s3c_cfcon_resource), | |
592 | .resource = s3c_cfcon_resource, | |
593 | }; | |
594 | ||
eff4c58d | 595 | void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata) |
bad1e6aa KK |
596 | { |
597 | s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata), | |
598 | &s3c_device_cfcon); | |
599 | } | |
600 | #endif /* CONFIG_SAMSUNG_DEV_IDE */ | |
601 | ||
602 | /* KEYPAD */ | |
603 | ||
604 | #ifdef CONFIG_SAMSUNG_DEV_KEYPAD | |
605 | static struct resource samsung_keypad_resources[] = { | |
e663cb76 KK |
606 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32), |
607 | [1] = DEFINE_RES_IRQ(IRQ_KEYPAD), | |
bad1e6aa KK |
608 | }; |
609 | ||
610 | struct platform_device samsung_device_keypad = { | |
611 | .name = "samsung-keypad", | |
612 | .id = -1, | |
613 | .num_resources = ARRAY_SIZE(samsung_keypad_resources), | |
614 | .resource = samsung_keypad_resources, | |
615 | }; | |
616 | ||
617 | void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd) | |
618 | { | |
619 | struct samsung_keypad_platdata *npd; | |
620 | ||
621 | npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata), | |
622 | &samsung_device_keypad); | |
623 | ||
624 | if (!npd->cfg_gpio) | |
625 | npd->cfg_gpio = samsung_keypad_cfg_gpio; | |
626 | } | |
627 | #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */ | |
628 | ||
61c542bf KK |
629 | /* LCD Controller */ |
630 | ||
631 | #ifdef CONFIG_PLAT_S3C24XX | |
632 | static struct resource s3c_lcd_resource[] = { | |
e663cb76 KK |
633 | [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD), |
634 | [1] = DEFINE_RES_IRQ(IRQ_LCD), | |
61c542bf KK |
635 | }; |
636 | ||
637 | struct platform_device s3c_device_lcd = { | |
638 | .name = "s3c2410-lcd", | |
639 | .id = -1, | |
640 | .num_resources = ARRAY_SIZE(s3c_lcd_resource), | |
641 | .resource = s3c_lcd_resource, | |
642 | .dev = { | |
643 | .dma_mask = &samsung_device_dma_mask, | |
644 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
645 | } | |
646 | }; | |
647 | ||
648 | void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) | |
649 | { | |
650 | struct s3c2410fb_mach_info *npd; | |
651 | ||
652 | npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd); | |
653 | if (npd) { | |
654 | npd->displays = kmemdup(pd->displays, | |
655 | sizeof(struct s3c2410fb_display) * npd->num_displays, | |
656 | GFP_KERNEL); | |
657 | if (!npd->displays) | |
658 | printk(KERN_ERR "no memory for LCD display data\n"); | |
659 | } else { | |
660 | printk(KERN_ERR "no memory for LCD platform data\n"); | |
661 | } | |
662 | } | |
663 | #endif /* CONFIG_PLAT_S3C24XX */ | |
664 | ||
bad1e6aa KK |
665 | /* NAND */ |
666 | ||
667 | #ifdef CONFIG_S3C_DEV_NAND | |
668 | static struct resource s3c_nand_resource[] = { | |
e663cb76 | 669 | [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M), |
bad1e6aa KK |
670 | }; |
671 | ||
672 | struct platform_device s3c_device_nand = { | |
673 | .name = "s3c2410-nand", | |
674 | .id = -1, | |
675 | .num_resources = ARRAY_SIZE(s3c_nand_resource), | |
676 | .resource = s3c_nand_resource, | |
677 | }; | |
678 | ||
679 | /* | |
680 | * s3c_nand_copy_set() - copy nand set data | |
681 | * @set: The new structure, directly copied from the old. | |
682 | * | |
683 | * Copy all the fields from the NAND set field from what is probably __initdata | |
684 | * to new kernel memory. The code returns 0 if the copy happened correctly or | |
685 | * an error code for the calling function to display. | |
686 | * | |
687 | * Note, we currently do not try and look to see if we've already copied the | |
688 | * data in a previous set. | |
689 | */ | |
690 | static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set) | |
691 | { | |
692 | void *ptr; | |
693 | int size; | |
694 | ||
695 | size = sizeof(struct mtd_partition) * set->nr_partitions; | |
696 | if (size) { | |
697 | ptr = kmemdup(set->partitions, size, GFP_KERNEL); | |
698 | set->partitions = ptr; | |
699 | ||
700 | if (!ptr) | |
701 | return -ENOMEM; | |
702 | } | |
703 | ||
704 | if (set->nr_map && set->nr_chips) { | |
705 | size = sizeof(int) * set->nr_chips; | |
706 | ptr = kmemdup(set->nr_map, size, GFP_KERNEL); | |
707 | set->nr_map = ptr; | |
708 | ||
709 | if (!ptr) | |
710 | return -ENOMEM; | |
711 | } | |
712 | ||
713 | if (set->ecc_layout) { | |
714 | ptr = kmemdup(set->ecc_layout, | |
715 | sizeof(struct nand_ecclayout), GFP_KERNEL); | |
716 | set->ecc_layout = ptr; | |
717 | ||
718 | if (!ptr) | |
719 | return -ENOMEM; | |
720 | } | |
721 | ||
722 | return 0; | |
723 | } | |
724 | ||
725 | void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | |
726 | { | |
727 | struct s3c2410_platform_nand *npd; | |
728 | int size; | |
729 | int ret; | |
730 | ||
731 | /* note, if we get a failure in allocation, we simply drop out of the | |
732 | * function. If there is so little memory available at initialisation | |
733 | * time then there is little chance the system is going to run. | |
734 | */ | |
735 | ||
736 | npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand), | |
737 | &s3c_device_nand); | |
738 | if (!npd) | |
739 | return; | |
740 | ||
741 | /* now see if we need to copy any of the nand set data */ | |
742 | ||
743 | size = sizeof(struct s3c2410_nand_set) * npd->nr_sets; | |
744 | if (size) { | |
745 | struct s3c2410_nand_set *from = npd->sets; | |
746 | struct s3c2410_nand_set *to; | |
747 | int i; | |
748 | ||
749 | to = kmemdup(from, size, GFP_KERNEL); | |
750 | npd->sets = to; /* set, even if we failed */ | |
751 | ||
752 | if (!to) { | |
753 | printk(KERN_ERR "%s: no memory for sets\n", __func__); | |
754 | return; | |
755 | } | |
756 | ||
757 | for (i = 0; i < npd->nr_sets; i++) { | |
758 | ret = s3c_nand_copy_set(to); | |
759 | if (ret) { | |
760 | printk(KERN_ERR "%s: failed to copy set %d\n", | |
761 | __func__, i); | |
762 | return; | |
763 | } | |
764 | to++; | |
765 | } | |
766 | } | |
767 | } | |
768 | #endif /* CONFIG_S3C_DEV_NAND */ | |
769 | ||
770 | /* ONENAND */ | |
771 | ||
772 | #ifdef CONFIG_S3C_DEV_ONENAND | |
773 | static struct resource s3c_onenand_resources[] = { | |
e663cb76 KK |
774 | [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K), |
775 | [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF), | |
776 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND), | |
bad1e6aa KK |
777 | }; |
778 | ||
779 | struct platform_device s3c_device_onenand = { | |
780 | .name = "samsung-onenand", | |
781 | .id = 0, | |
782 | .num_resources = ARRAY_SIZE(s3c_onenand_resources), | |
783 | .resource = s3c_onenand_resources, | |
784 | }; | |
785 | #endif /* CONFIG_S3C_DEV_ONENAND */ | |
786 | ||
0523ec3a KK |
787 | #ifdef CONFIG_S3C64XX_DEV_ONENAND1 |
788 | static struct resource s3c64xx_onenand1_resources[] = { | |
e663cb76 KK |
789 | [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K), |
790 | [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF), | |
791 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND1), | |
0523ec3a KK |
792 | }; |
793 | ||
794 | struct platform_device s3c64xx_device_onenand1 = { | |
795 | .name = "samsung-onenand", | |
796 | .id = 1, | |
797 | .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources), | |
798 | .resource = s3c64xx_onenand1_resources, | |
799 | }; | |
800 | ||
eff4c58d | 801 | void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) |
0523ec3a KK |
802 | { |
803 | s3c_set_platdata(pdata, sizeof(struct onenand_platform_data), | |
804 | &s3c64xx_device_onenand1); | |
805 | } | |
806 | #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */ | |
807 | ||
bad1e6aa KK |
808 | /* PWM Timer */ |
809 | ||
810 | #ifdef CONFIG_SAMSUNG_DEV_PWM | |
95e43d46 TF |
811 | static struct resource samsung_pwm_resource[] = { |
812 | DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K), | |
813 | }; | |
814 | ||
815 | struct platform_device samsung_device_pwm = { | |
816 | .name = "samsung-pwm", | |
817 | .id = -1, | |
818 | .num_resources = ARRAY_SIZE(samsung_pwm_resource), | |
819 | .resource = samsung_pwm_resource, | |
820 | }; | |
821 | ||
822 | void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) | |
823 | { | |
824 | samsung_device_pwm.dev.platform_data = pd; | |
825 | } | |
bad1e6aa KK |
826 | #endif /* CONFIG_SAMSUNG_DEV_PWM */ |
827 | ||
61c542bf KK |
828 | /* RTC */ |
829 | ||
830 | #ifdef CONFIG_PLAT_S3C24XX | |
831 | static struct resource s3c_rtc_resource[] = { | |
e663cb76 KK |
832 | [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256), |
833 | [1] = DEFINE_RES_IRQ(IRQ_RTC), | |
834 | [2] = DEFINE_RES_IRQ(IRQ_TICK), | |
61c542bf KK |
835 | }; |
836 | ||
837 | struct platform_device s3c_device_rtc = { | |
838 | .name = "s3c2410-rtc", | |
839 | .id = -1, | |
840 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | |
841 | .resource = s3c_rtc_resource, | |
842 | }; | |
843 | #endif /* CONFIG_PLAT_S3C24XX */ | |
844 | ||
bad1e6aa KK |
845 | #ifdef CONFIG_S3C_DEV_RTC |
846 | static struct resource s3c_rtc_resource[] = { | |
e663cb76 KK |
847 | [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256), |
848 | [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM), | |
849 | [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC), | |
bad1e6aa KK |
850 | }; |
851 | ||
852 | struct platform_device s3c_device_rtc = { | |
853 | .name = "s3c64xx-rtc", | |
854 | .id = -1, | |
855 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | |
856 | .resource = s3c_rtc_resource, | |
857 | }; | |
858 | #endif /* CONFIG_S3C_DEV_RTC */ | |
859 | ||
61c542bf KK |
860 | /* SDI */ |
861 | ||
862 | #ifdef CONFIG_PLAT_S3C24XX | |
863 | static struct resource s3c_sdi_resource[] = { | |
e663cb76 KK |
864 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI), |
865 | [1] = DEFINE_RES_IRQ(IRQ_SDI), | |
61c542bf KK |
866 | }; |
867 | ||
868 | struct platform_device s3c_device_sdi = { | |
869 | .name = "s3c2410-sdi", | |
870 | .id = -1, | |
871 | .num_resources = ARRAY_SIZE(s3c_sdi_resource), | |
872 | .resource = s3c_sdi_resource, | |
873 | }; | |
874 | ||
875 | void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) | |
876 | { | |
877 | s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata), | |
878 | &s3c_device_sdi); | |
879 | } | |
880 | #endif /* CONFIG_PLAT_S3C24XX */ | |
881 | ||
882 | /* SPI */ | |
883 | ||
884 | #ifdef CONFIG_PLAT_S3C24XX | |
885 | static struct resource s3c_spi0_resource[] = { | |
e663cb76 KK |
886 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32), |
887 | [1] = DEFINE_RES_IRQ(IRQ_SPI0), | |
61c542bf KK |
888 | }; |
889 | ||
890 | struct platform_device s3c_device_spi0 = { | |
891 | .name = "s3c2410-spi", | |
892 | .id = 0, | |
893 | .num_resources = ARRAY_SIZE(s3c_spi0_resource), | |
894 | .resource = s3c_spi0_resource, | |
895 | .dev = { | |
896 | .dma_mask = &samsung_device_dma_mask, | |
897 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
898 | } | |
899 | }; | |
900 | ||
901 | static struct resource s3c_spi1_resource[] = { | |
e663cb76 KK |
902 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32), |
903 | [1] = DEFINE_RES_IRQ(IRQ_SPI1), | |
61c542bf KK |
904 | }; |
905 | ||
906 | struct platform_device s3c_device_spi1 = { | |
907 | .name = "s3c2410-spi", | |
908 | .id = 1, | |
909 | .num_resources = ARRAY_SIZE(s3c_spi1_resource), | |
910 | .resource = s3c_spi1_resource, | |
911 | .dev = { | |
912 | .dma_mask = &samsung_device_dma_mask, | |
913 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
914 | } | |
915 | }; | |
916 | #endif /* CONFIG_PLAT_S3C24XX */ | |
917 | ||
918 | /* Touchscreen */ | |
919 | ||
920 | #ifdef CONFIG_PLAT_S3C24XX | |
921 | static struct resource s3c_ts_resource[] = { | |
e663cb76 KK |
922 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), |
923 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
61c542bf KK |
924 | }; |
925 | ||
926 | struct platform_device s3c_device_ts = { | |
927 | .name = "s3c2410-ts", | |
928 | .id = -1, | |
929 | .dev.parent = &s3c_device_adc.dev, | |
930 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | |
931 | .resource = s3c_ts_resource, | |
932 | }; | |
933 | ||
934 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) | |
935 | { | |
936 | s3c_set_platdata(hard_s3c2410ts_info, | |
937 | sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts); | |
938 | } | |
939 | #endif /* CONFIG_PLAT_S3C24XX */ | |
940 | ||
bad1e6aa KK |
941 | #ifdef CONFIG_SAMSUNG_DEV_TS |
942 | static struct resource s3c_ts_resource[] = { | |
e663cb76 KK |
943 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), |
944 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
bad1e6aa KK |
945 | }; |
946 | ||
947 | static struct s3c2410_ts_mach_info default_ts_data __initdata = { | |
948 | .delay = 10000, | |
949 | .presc = 49, | |
950 | .oversampling_shift = 2, | |
951 | }; | |
952 | ||
953 | struct platform_device s3c_device_ts = { | |
954 | .name = "s3c64xx-ts", | |
955 | .id = -1, | |
956 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | |
957 | .resource = s3c_ts_resource, | |
958 | }; | |
959 | ||
960 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) | |
961 | { | |
962 | if (!pd) | |
963 | pd = &default_ts_data; | |
964 | ||
965 | s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info), | |
966 | &s3c_device_ts); | |
967 | } | |
968 | #endif /* CONFIG_SAMSUNG_DEV_TS */ | |
969 | ||
bad1e6aa KK |
970 | /* USB */ |
971 | ||
972 | #ifdef CONFIG_S3C_DEV_USB_HOST | |
973 | static struct resource s3c_usb_resource[] = { | |
e663cb76 KK |
974 | [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256), |
975 | [1] = DEFINE_RES_IRQ(IRQ_USBH), | |
bad1e6aa KK |
976 | }; |
977 | ||
978 | struct platform_device s3c_device_ohci = { | |
979 | .name = "s3c2410-ohci", | |
980 | .id = -1, | |
981 | .num_resources = ARRAY_SIZE(s3c_usb_resource), | |
982 | .resource = s3c_usb_resource, | |
983 | .dev = { | |
984 | .dma_mask = &samsung_device_dma_mask, | |
985 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
986 | } | |
987 | }; | |
988 | ||
989 | /* | |
990 | * s3c_ohci_set_platdata - initialise OHCI device platform data | |
991 | * @info: The platform data. | |
992 | * | |
993 | * This call copies the @info passed in and sets the device .platform_data | |
994 | * field to that copy. The @info is copied so that the original can be marked | |
995 | * __initdata. | |
996 | */ | |
997 | ||
998 | void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info) | |
999 | { | |
1000 | s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info), | |
1001 | &s3c_device_ohci); | |
1002 | } | |
1003 | #endif /* CONFIG_S3C_DEV_USB_HOST */ | |
1004 | ||
61c542bf KK |
1005 | /* USB Device (Gadget) */ |
1006 | ||
1007 | #ifdef CONFIG_PLAT_S3C24XX | |
1008 | static struct resource s3c_usbgadget_resource[] = { | |
e663cb76 KK |
1009 | [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV), |
1010 | [1] = DEFINE_RES_IRQ(IRQ_USBD), | |
61c542bf KK |
1011 | }; |
1012 | ||
1013 | struct platform_device s3c_device_usbgadget = { | |
1014 | .name = "s3c2410-usbgadget", | |
1015 | .id = -1, | |
1016 | .num_resources = ARRAY_SIZE(s3c_usbgadget_resource), | |
1017 | .resource = s3c_usbgadget_resource, | |
1018 | }; | |
1019 | ||
1020 | void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) | |
1021 | { | |
1022 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget); | |
1023 | } | |
1024 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1025 | ||
bad1e6aa KK |
1026 | /* USB HSOTG */ |
1027 | ||
1028 | #ifdef CONFIG_S3C_DEV_USB_HSOTG | |
1029 | static struct resource s3c_usb_hsotg_resources[] = { | |
c65d8ef2 | 1030 | [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K), |
e663cb76 | 1031 | [1] = DEFINE_RES_IRQ(IRQ_OTG), |
bad1e6aa KK |
1032 | }; |
1033 | ||
1034 | struct platform_device s3c_device_usb_hsotg = { | |
1035 | .name = "s3c-hsotg", | |
1036 | .id = -1, | |
1037 | .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources), | |
1038 | .resource = s3c_usb_hsotg_resources, | |
1039 | .dev = { | |
1040 | .dma_mask = &samsung_device_dma_mask, | |
1041 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1042 | }, | |
1043 | }; | |
99f6e1f5 | 1044 | |
1f91b4cc | 1045 | void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd) |
99f6e1f5 | 1046 | { |
1f91b4cc | 1047 | struct dwc2_hsotg_plat *npd; |
99f6e1f5 | 1048 | |
1f91b4cc | 1049 | npd = s3c_set_platdata(pd, sizeof(struct dwc2_hsotg_plat), |
99f6e1f5 JS |
1050 | &s3c_device_usb_hsotg); |
1051 | ||
1052 | if (!npd->phy_init) | |
1053 | npd->phy_init = s5p_usb_phy_init; | |
1054 | if (!npd->phy_exit) | |
1055 | npd->phy_exit = s5p_usb_phy_exit; | |
1056 | } | |
bad1e6aa KK |
1057 | #endif /* CONFIG_S3C_DEV_USB_HSOTG */ |
1058 | ||
61c542bf KK |
1059 | /* USB High Spped 2.0 Device (Gadget) */ |
1060 | ||
1061 | #ifdef CONFIG_PLAT_S3C24XX | |
1062 | static struct resource s3c_hsudc_resource[] = { | |
e663cb76 KK |
1063 | [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC), |
1064 | [1] = DEFINE_RES_IRQ(IRQ_USBD), | |
61c542bf KK |
1065 | }; |
1066 | ||
1067 | struct platform_device s3c_device_usb_hsudc = { | |
1068 | .name = "s3c-hsudc", | |
1069 | .id = -1, | |
1070 | .num_resources = ARRAY_SIZE(s3c_hsudc_resource), | |
1071 | .resource = s3c_hsudc_resource, | |
1072 | .dev = { | |
1073 | .dma_mask = &samsung_device_dma_mask, | |
1074 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1075 | }, | |
1076 | }; | |
1077 | ||
1078 | void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd) | |
1079 | { | |
1080 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc); | |
1081 | } | |
1082 | #endif /* CONFIG_PLAT_S3C24XX */ | |
bad1e6aa KK |
1083 | |
1084 | /* WDT */ | |
1085 | ||
1086 | #ifdef CONFIG_S3C_DEV_WDT | |
1087 | static struct resource s3c_wdt_resource[] = { | |
e663cb76 KK |
1088 | [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K), |
1089 | [1] = DEFINE_RES_IRQ(IRQ_WDT), | |
bad1e6aa KK |
1090 | }; |
1091 | ||
1092 | struct platform_device s3c_device_wdt = { | |
1093 | .name = "s3c2410-wdt", | |
1094 | .id = -1, | |
1095 | .num_resources = ARRAY_SIZE(s3c_wdt_resource), | |
1096 | .resource = s3c_wdt_resource, | |
1097 | }; | |
1098 | #endif /* CONFIG_S3C_DEV_WDT */ | |
875a5937 PV |
1099 | |
1100 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | |
1101 | static struct resource s3c64xx_spi0_resource[] = { | |
1102 | [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256), | |
1103 | [1] = DEFINE_RES_DMA(DMACH_SPI0_TX), | |
1104 | [2] = DEFINE_RES_DMA(DMACH_SPI0_RX), | |
1105 | [3] = DEFINE_RES_IRQ(IRQ_SPI0), | |
1106 | }; | |
1107 | ||
1108 | struct platform_device s3c64xx_device_spi0 = { | |
4d0efdd5 | 1109 | .name = "s3c6410-spi", |
875a5937 PV |
1110 | .id = 0, |
1111 | .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource), | |
1112 | .resource = s3c64xx_spi0_resource, | |
1113 | .dev = { | |
1114 | .dma_mask = &samsung_device_dma_mask, | |
1115 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1116 | }, | |
1117 | }; | |
1118 | ||
4d0efdd5 TA |
1119 | void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1120 | int num_cs) | |
875a5937 | 1121 | { |
4d0efdd5 | 1122 | struct s3c64xx_spi_info pd; |
875a5937 PV |
1123 | |
1124 | /* Reject invalid configuration */ | |
1125 | if (!num_cs || src_clk_nr < 0) { | |
1126 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1127 | return; | |
1128 | } | |
1129 | ||
4d0efdd5 TA |
1130 | pd.num_cs = num_cs; |
1131 | pd.src_clk_nr = src_clk_nr; | |
1132 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio; | |
7f99ef22 | 1133 | #if defined(CONFIG_PL330_DMA) |
78843727 | 1134 | pd.filter = pl330_filter; |
1db0287a TF |
1135 | #elif defined(CONFIG_S3C64XX_PL080) |
1136 | pd.filter = pl08x_filter_id; | |
7f99ef22 HS |
1137 | #elif defined(CONFIG_S3C24XX_DMAC) |
1138 | pd.filter = s3c24xx_dma_filter; | |
78843727 | 1139 | #endif |
4566c7f7 | 1140 | |
4d0efdd5 | 1141 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0); |
875a5937 PV |
1142 | } |
1143 | #endif /* CONFIG_S3C64XX_DEV_SPI0 */ | |
1144 | ||
1145 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | |
1146 | static struct resource s3c64xx_spi1_resource[] = { | |
1147 | [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256), | |
1148 | [1] = DEFINE_RES_DMA(DMACH_SPI1_TX), | |
1149 | [2] = DEFINE_RES_DMA(DMACH_SPI1_RX), | |
1150 | [3] = DEFINE_RES_IRQ(IRQ_SPI1), | |
1151 | }; | |
1152 | ||
1153 | struct platform_device s3c64xx_device_spi1 = { | |
4d0efdd5 | 1154 | .name = "s3c6410-spi", |
875a5937 PV |
1155 | .id = 1, |
1156 | .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource), | |
1157 | .resource = s3c64xx_spi1_resource, | |
1158 | .dev = { | |
1159 | .dma_mask = &samsung_device_dma_mask, | |
1160 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1161 | }, | |
1162 | }; | |
1163 | ||
4d0efdd5 TA |
1164 | void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1165 | int num_cs) | |
875a5937 | 1166 | { |
fb997a46 SN |
1167 | struct s3c64xx_spi_info pd; |
1168 | ||
875a5937 PV |
1169 | /* Reject invalid configuration */ |
1170 | if (!num_cs || src_clk_nr < 0) { | |
1171 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1172 | return; | |
1173 | } | |
1174 | ||
4d0efdd5 TA |
1175 | pd.num_cs = num_cs; |
1176 | pd.src_clk_nr = src_clk_nr; | |
1177 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio; | |
1db0287a | 1178 | #if defined(CONFIG_PL330_DMA) |
78843727 | 1179 | pd.filter = pl330_filter; |
1db0287a TF |
1180 | #elif defined(CONFIG_S3C64XX_PL080) |
1181 | pd.filter = pl08x_filter_id; | |
78843727 | 1182 | #endif |
4566c7f7 | 1183 | |
4d0efdd5 | 1184 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1); |
875a5937 PV |
1185 | } |
1186 | #endif /* CONFIG_S3C64XX_DEV_SPI1 */ | |
1187 | ||
1188 | #ifdef CONFIG_S3C64XX_DEV_SPI2 | |
1189 | static struct resource s3c64xx_spi2_resource[] = { | |
1190 | [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256), | |
1191 | [1] = DEFINE_RES_DMA(DMACH_SPI2_TX), | |
1192 | [2] = DEFINE_RES_DMA(DMACH_SPI2_RX), | |
1193 | [3] = DEFINE_RES_IRQ(IRQ_SPI2), | |
1194 | }; | |
1195 | ||
1196 | struct platform_device s3c64xx_device_spi2 = { | |
4d0efdd5 | 1197 | .name = "s3c6410-spi", |
875a5937 PV |
1198 | .id = 2, |
1199 | .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource), | |
1200 | .resource = s3c64xx_spi2_resource, | |
1201 | .dev = { | |
1202 | .dma_mask = &samsung_device_dma_mask, | |
1203 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1204 | }, | |
1205 | }; | |
1206 | ||
4d0efdd5 TA |
1207 | void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1208 | int num_cs) | |
875a5937 | 1209 | { |
4d0efdd5 | 1210 | struct s3c64xx_spi_info pd; |
875a5937 PV |
1211 | |
1212 | /* Reject invalid configuration */ | |
1213 | if (!num_cs || src_clk_nr < 0) { | |
1214 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1215 | return; | |
1216 | } | |
1217 | ||
4d0efdd5 TA |
1218 | pd.num_cs = num_cs; |
1219 | pd.src_clk_nr = src_clk_nr; | |
1220 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio; | |
1db0287a | 1221 | #if defined(CONFIG_PL330_DMA) |
78843727 | 1222 | pd.filter = pl330_filter; |
1db0287a TF |
1223 | #elif defined(CONFIG_S3C64XX_PL080) |
1224 | pd.filter = pl08x_filter_id; | |
78843727 | 1225 | #endif |
323d7717 | 1226 | |
4d0efdd5 | 1227 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2); |
875a5937 PV |
1228 | } |
1229 | #endif /* CONFIG_S3C64XX_DEV_SPI2 */ |