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1 | /* linux/arch/arm/plat-s3c/init.c |
2 | * | |
3 | * Copyright (c) 2008 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * http://armlinux.simtec.co.uk/ | |
6 | * | |
7 | * S3C series CPU initialisation | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/init.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/ioport.h> | |
18 | #include <linux/serial_core.h> | |
19 | #include <linux/platform_device.h> | |
74b265d4 BD |
20 | |
21 | #include <mach/hardware.h> | |
22 | ||
23 | #include <asm/mach/arch.h> | |
24 | #include <asm/mach/map.h> | |
25 | ||
26 | #include <plat/cpu.h> | |
27 | #include <plat/devs.h> | |
28 | #include <plat/clock.h> | |
29 | ||
30 | #include <plat/regs-serial.h> | |
31 | ||
32 | static struct cpu_table *cpu; | |
33 | ||
34 | static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode, | |
35 | struct cpu_table *tab, | |
36 | unsigned int count) | |
37 | { | |
38 | for (; count != 0; count--, tab++) { | |
9d5fda66 | 39 | if ((idcode & tab->idmask) == (tab->idcode & tab->idmask)) |
74b265d4 BD |
40 | return tab; |
41 | } | |
42 | ||
43 | return NULL; | |
44 | } | |
45 | ||
46 | void __init s3c_init_cpu(unsigned long idcode, | |
47 | struct cpu_table *cputab, unsigned int cputab_size) | |
48 | { | |
49 | cpu = s3c_lookup_cpu(idcode, cputab, cputab_size); | |
50 | ||
51 | if (cpu == NULL) { | |
52 | printk(KERN_ERR "Unknown CPU type 0x%08lx\n", idcode); | |
53 | panic("Unknown S3C24XX CPU"); | |
54 | } | |
55 | ||
56 | printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode); | |
57 | ||
35f8550c | 58 | if (cpu->init == NULL) { |
74b265d4 BD |
59 | printk(KERN_ERR "CPU %s support not enabled\n", cpu->name); |
60 | panic("Unsupported Samsung CPU"); | |
61 | } | |
62 | ||
35f8550c KK |
63 | if (cpu->map_io) |
64 | cpu->map_io(); | |
74b265d4 BD |
65 | } |
66 | ||
67 | /* s3c24xx_init_clocks | |
68 | * | |
69 | * Initialise the clock subsystem and associated information from the | |
70 | * given master crystal value. | |
71 | * | |
72 | * xtal = 0 -> use default PLL crystal value (normally 12MHz) | |
73 | * != 0 -> PLL crystal value in Hz | |
74 | */ | |
75 | ||
76 | void __init s3c24xx_init_clocks(int xtal) | |
77 | { | |
78 | if (xtal == 0) | |
79 | xtal = 12*1000*1000; | |
80 | ||
81 | if (cpu == NULL) | |
82 | panic("s3c24xx_init_clocks: no cpu setup?\n"); | |
83 | ||
84 | if (cpu->init_clocks == NULL) | |
85 | panic("s3c24xx_init_clocks: cpu has no clock init\n"); | |
86 | else | |
87 | (cpu->init_clocks)(xtal); | |
88 | } | |
89 | ||
90 | /* uart management */ | |
1f72e404 | 91 | #if IS_ENABLED(CONFIG_SAMSUNG_ATAGS) |
74b265d4 BD |
92 | static int nr_uarts __initdata = 0; |
93 | ||
bdd4915a | 94 | static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS]; |
74b265d4 BD |
95 | |
96 | /* s3c24xx_init_uartdevs | |
97 | * | |
98 | * copy the specified platform data and configuration into our central | |
99 | * set of devices, before the data is thrown away after the init process. | |
100 | * | |
101 | * This also fills in the array passed to the serial driver for the | |
102 | * early initialisation of the console. | |
103 | */ | |
104 | ||
105 | void __init s3c24xx_init_uartdevs(char *name, | |
106 | struct s3c24xx_uart_resources *res, | |
107 | struct s3c2410_uartcfg *cfg, int no) | |
108 | { | |
109 | struct platform_device *platdev; | |
110 | struct s3c2410_uartcfg *cfgptr = uart_cfgs; | |
111 | struct s3c24xx_uart_resources *resp; | |
112 | int uart; | |
113 | ||
114 | memcpy(cfgptr, cfg, sizeof(struct s3c2410_uartcfg) * no); | |
115 | ||
116 | for (uart = 0; uart < no; uart++, cfg++, cfgptr++) { | |
117 | platdev = s3c24xx_uart_src[cfgptr->hwport]; | |
118 | ||
119 | resp = res + cfgptr->hwport; | |
120 | ||
121 | s3c24xx_uart_devs[uart] = platdev; | |
122 | ||
123 | platdev->name = name; | |
124 | platdev->resource = resp->resources; | |
125 | platdev->num_resources = resp->nr_resources; | |
126 | ||
127 | platdev->dev.platform_data = cfgptr; | |
128 | } | |
129 | ||
130 | nr_uarts = no; | |
131 | } | |
132 | ||
133 | void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |
134 | { | |
135 | if (cpu == NULL) | |
136 | return; | |
137 | ||
1f72e404 | 138 | if (cpu->init_uarts == NULL && IS_ENABLED(CONFIG_SAMSUNG_ATAGS)) { |
74b265d4 BD |
139 | printk(KERN_ERR "s3c24xx_init_uarts: cpu has no uart init\n"); |
140 | } else | |
141 | (cpu->init_uarts)(cfg, no); | |
142 | } | |
1f72e404 | 143 | #endif |
74b265d4 BD |
144 | |
145 | static int __init s3c_arch_init(void) | |
146 | { | |
147 | int ret; | |
148 | ||
149 | // do the correct init for cpu | |
150 | ||
151 | if (cpu == NULL) | |
152 | panic("s3c_arch_init: NULL cpu\n"); | |
153 | ||
154 | ret = (cpu->init)(); | |
155 | if (ret != 0) | |
156 | return ret; | |
1f72e404 | 157 | #if IS_ENABLED(CONFIG_SAMSUNG_ATAGS) |
74b265d4 | 158 | ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts); |
1f72e404 | 159 | #endif |
74b265d4 BD |
160 | return ret; |
161 | } | |
162 | ||
163 | arch_initcall(s3c_arch_init); |