[mirror_ubuntu-bionic-kernel.git] / arch / arm / plat-samsung / pm-gpio.c


/* linux/arch/arm/plat-s3c/pm-gpio.c
 *
 * Copyright 2008 Openmoko, Inc.
 * Copyright 2008 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * S3C series GPIO PM code
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/gpio.h>

#include <plat/gpio-core.h>
#include <plat/pm.h>

/* PM GPIO helpers */

#define OFFS_CON	(0x00)
#define OFFS_DAT	(0x04)
#define OFFS_UP		(0x08)

static void samsung_gpio_pm_1bit_save(struct samsung_gpio_chip *chip)
{
	chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON);
	chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT);
}

static void samsung_gpio_pm_1bit_resume(struct samsung_gpio_chip *chip)
{
	void __iomem *base = chip->base;
	u32 old_gpcon = __raw_readl(base + OFFS_CON);
	u32 old_gpdat = __raw_readl(base + OFFS_DAT);
	u32 gps_gpcon = chip->pm_save[0];
	u32 gps_gpdat = chip->pm_save[1];
	u32 gpcon;

	/* GPACON only has one bit per control / data and no PULLUPs.
	 * GPACON[x] = 0 => Output, 1 => SFN */

	/* first set all SFN bits to SFN */

	gpcon = old_gpcon | gps_gpcon;
	__raw_writel(gpcon, base + OFFS_CON);

	/* now set all the other bits */

	__raw_writel(gps_gpdat, base + OFFS_DAT);
	__raw_writel(gps_gpcon, base + OFFS_CON);

	S3C_PMDBG("%s: CON %08x => %08x, DAT %08x => %08x\n",
		  chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat);
}

struct samsung_gpio_pm samsung_gpio_pm_1bit = {
	.save	= samsung_gpio_pm_1bit_save,
	.resume = samsung_gpio_pm_1bit_resume,
};

static void samsung_gpio_pm_2bit_save(struct samsung_gpio_chip *chip)
{
	chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON);
	chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT);
	chip->pm_save[2] = __raw_readl(chip->base + OFFS_UP);
}

/* Test whether the given masked+shifted bits of an GPIO configuration
 * are one of the SFN (special function) modes. */

static inline int is_sfn(unsigned long con)
{
	return con >= 2;
}

/* Test if the given masked+shifted GPIO configuration is an input */

static inline int is_in(unsigned long con)
{
	return con == 0;
}

/* Test if the given masked+shifted GPIO configuration is an output */

static inline int is_out(unsigned long con)
{
	return con == 1;
}

/**
 * samsung_gpio_pm_2bit_resume() - restore the given GPIO bank
 * @chip: The chip information to resume.
 *
 * Restore one of the GPIO banks that was saved during suspend. This is
 * not as simple as once thought, due to the possibility of glitches
 * from the order that the CON and DAT registers are set in.
 *
 * The three states the pin can be are {IN,OUT,SFN} which gives us 9
 * combinations of changes to check. Three of these, if the pin stays
 * in the same configuration can be discounted. This leaves us with
 * the following:
 *
 * { IN => OUT }  Change DAT first
 * { IN => SFN }  Change CON first
 * { OUT => SFN } Change CON first, so new data will not glitch
 * { OUT => IN }  Change CON first, so new data will not glitch
 * { SFN => IN }  Change CON first
 * { SFN => OUT } Change DAT first, so new data will not glitch [1]
 *
 * We do not currently deal with the UP registers as these control
 * weak resistors, so a small delay in change should not need to bring
 * these into the calculations.
 *
 * [1] this assumes that writing to a pin DAT whilst in SFN will set the
 *     state for when it is next output.
 */
static void samsung_gpio_pm_2bit_resume(struct samsung_gpio_chip *chip)
{
	void __iomem *base = chip->base;
	u32 old_gpcon = __raw_readl(base + OFFS_CON);
	u32 old_gpdat = __raw_readl(base + OFFS_DAT);
	u32 gps_gpcon = chip->pm_save[0];
	u32 gps_gpdat = chip->pm_save[1];
	u32 gpcon, old, new, mask;
	u32 change_mask = 0x0;
	int nr;

	/* restore GPIO pull-up settings */
	__raw_writel(chip->pm_save[2], base + OFFS_UP);

	/* Create a change_mask of all the items that need to have
	 * their CON value changed before their DAT value, so that
	 * we minimise the work between the two settings.
	 */

	for (nr = 0, mask = 0x03; nr < 32; nr += 2, mask <<= 2) {
		old = (old_gpcon & mask) >> nr;
		new = (gps_gpcon & mask) >> nr;

		/* If there is no change, then skip */

		if (old == new)
			continue;

		/* If both are special function, then skip */

		if (is_sfn(old) && is_sfn(new))
			continue;

		/* Change is IN => OUT, do not change now */

		if (is_in(old) && is_out(new))
			continue;

		/* Change is SFN => OUT, do not change now */

		if (is_sfn(old) && is_out(new))
			continue;

		/* We should now be at the case of IN=>SFN,
		 * OUT=>SFN, OUT=>IN, SFN=>IN. */

		change_mask |= mask;
	}


	/* Write the new CON settings */

	gpcon = old_gpcon & ~change_mask;
	gpcon |= gps_gpcon & change_mask;

	__raw_writel(gpcon, base + OFFS_CON);

	/* Now change any items that require DAT,CON */

	__raw_writel(gps_gpdat, base + OFFS_DAT);
	__raw_writel(gps_gpcon, base + OFFS_CON);

	S3C_PMDBG("%s: CON %08x => %08x, DAT %08x => %08x\n",
		  chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat);
}

struct samsung_gpio_pm samsung_gpio_pm_2bit = {
	.save	= samsung_gpio_pm_2bit_save,
	.resume = samsung_gpio_pm_2bit_resume,
};

#if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P) \
	|| defined(CONFIG_ARCH_EXYNOS)
static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip)
{
	chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON);
	chip->pm_save[2] = __raw_readl(chip->base + OFFS_DAT);
	chip->pm_save[3] = __raw_readl(chip->base + OFFS_UP);

	if (chip->chip.ngpio > 8)
		chip->pm_save[0] = __raw_readl(chip->base - 4);
}

static u32 samsung_gpio_pm_4bit_mask(u32 old_gpcon, u32 gps_gpcon)
{
	u32 old, new, mask;
	u32 change_mask = 0x0;
	int nr;

	for (nr = 0, mask = 0x0f; nr < 16; nr += 4, mask <<= 4) {
		old = (old_gpcon & mask) >> nr;
		new = (gps_gpcon & mask) >> nr;

		/* If there is no change, then skip */

		if (old == new)
			continue;

		/* If both are special function, then skip */

		if (is_sfn(old) && is_sfn(new))
			continue;

		/* Change is IN => OUT, do not change now */

		if (is_in(old) && is_out(new))
			continue;

		/* Change is SFN => OUT, do not change now */

		if (is_sfn(old) && is_out(new))
			continue;

		/* We should now be at the case of IN=>SFN,
		 * OUT=>SFN, OUT=>IN, SFN=>IN. */

		change_mask |= mask;
	}

	return change_mask;
}

static void samsung_gpio_pm_4bit_con(struct samsung_gpio_chip *chip, int index)
{
	void __iomem *con = chip->base + (index * 4);
	u32 old_gpcon = __raw_readl(con);
	u32 gps_gpcon = chip->pm_save[index + 1];
	u32 gpcon, mask;

	mask = samsung_gpio_pm_4bit_mask(old_gpcon, gps_gpcon);

	gpcon = old_gpcon & ~mask;
	gpcon |= gps_gpcon & mask;

	__raw_writel(gpcon, con);
}

static void samsung_gpio_pm_4bit_resume(struct samsung_gpio_chip *chip)
{
	void __iomem *base = chip->base;
	u32 old_gpcon[2];
	u32 old_gpdat = __raw_readl(base + OFFS_DAT);
	u32 gps_gpdat = chip->pm_save[2];

	/* First, modify the CON settings */

	old_gpcon[0] = 0;
	old_gpcon[1] = __raw_readl(base + OFFS_CON);

	samsung_gpio_pm_4bit_con(chip, 0);
	if (chip->chip.ngpio > 8) {
		old_gpcon[0] = __raw_readl(base - 4);
		samsung_gpio_pm_4bit_con(chip, -1);
	}

	/* Now change the configurations that require DAT,CON */

	__raw_writel(chip->pm_save[2], base + OFFS_DAT);
	__raw_writel(chip->pm_save[1], base + OFFS_CON);
	if (chip->chip.ngpio > 8)
		__raw_writel(chip->pm_save[0], base - 4);

	__raw_writel(chip->pm_save[2], base + OFFS_DAT);
	__raw_writel(chip->pm_save[3], base + OFFS_UP);

	if (chip->chip.ngpio > 8) {
		S3C_PMDBG("%s: CON4 %08x,%08x => %08x,%08x, DAT %08x => %08x\n",
			  chip->chip.label, old_gpcon[0], old_gpcon[1],
			  __raw_readl(base - 4),
			  __raw_readl(base + OFFS_CON),
			  old_gpdat, gps_gpdat);
	} else
		S3C_PMDBG("%s: CON4 %08x => %08x, DAT %08x => %08x\n",
			  chip->chip.label, old_gpcon[1],
			  __raw_readl(base + OFFS_CON),
			  old_gpdat, gps_gpdat);
}

struct samsung_gpio_pm samsung_gpio_pm_4bit = {
	.save	= samsung_gpio_pm_4bit_save,
	.resume = samsung_gpio_pm_4bit_resume,
};
#endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P || CONFIG_ARCH_EXYNOS */

/**
 * samsung_pm_save_gpio() - save gpio chip data for suspend
 * @ourchip: The chip for suspend.
 */
static void samsung_pm_save_gpio(struct samsung_gpio_chip *ourchip)
{
	struct samsung_gpio_pm *pm = ourchip->pm;

	if (pm == NULL || pm->save == NULL)
		S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label);
	else
		pm->save(ourchip);
}

/**
 * samsung_pm_save_gpios() - Save the state of the GPIO banks.
 *
 * For all the GPIO banks, save the state of each one ready for going
 * into a suspend mode.
 */
void samsung_pm_save_gpios(void)
{
	struct samsung_gpio_chip *ourchip;
	unsigned int gpio_nr;

	for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) {
		ourchip = samsung_gpiolib_getchip(gpio_nr);
		if (!ourchip) {
			gpio_nr++;
			continue;
		}

		samsung_pm_save_gpio(ourchip);

		S3C_PMDBG("%s: save %08x,%08x,%08x,%08x\n",
			  ourchip->chip.label,
			  ourchip->pm_save[0],
			  ourchip->pm_save[1],
			  ourchip->pm_save[2],
			  ourchip->pm_save[3]);

		gpio_nr += ourchip->chip.ngpio;
		gpio_nr += CONFIG_S3C_GPIO_SPACE;
	}
}

/**
 * samsung_pm_resume_gpio() - restore gpio chip data after suspend
 * @ourchip: The suspended chip.
 */
static void samsung_pm_resume_gpio(struct samsung_gpio_chip *ourchip)
{
	struct samsung_gpio_pm *pm = ourchip->pm;

	if (pm == NULL || pm->resume == NULL)
		S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label);
	else
		pm->resume(ourchip);
}

void samsung_pm_restore_gpios(void)
{
	struct samsung_gpio_chip *ourchip;
	unsigned int gpio_nr;

	for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) {
		ourchip = samsung_gpiolib_getchip(gpio_nr);
		if (!ourchip) {
			gpio_nr++;
			continue;
		}

		samsung_pm_resume_gpio(ourchip);

		gpio_nr += ourchip->chip.ngpio;
		gpio_nr += CONFIG_S3C_GPIO_SPACE;
	}
}
Commit	Line	Data
d87964c4 BD	1
	2	/* linux/arch/arm/plat-s3c/pm-gpio.c
	3	*
	4	* Copyright 2008 Openmoko, Inc.
	5	* Copyright 2008 Simtec Electronics
	6	* Ben Dooks <ben@simtec.co.uk>
	7	* http://armlinux.simtec.co.uk/
	8	*
	9	* S3C series GPIO PM code
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License version 2 as
	13	* published by the Free Software Foundation.
	14	*/
	15
	16	#include <linux/kernel.h>
edbaa603	17	#include <linux/device.h>
d87964c4 BD	18	#include <linux/init.h>
	19	#include <linux/io.h>
	20	#include <linux/gpio.h>
	21
e856bb1f	22	#include <plat/gpio-core.h>
d87964c4 BD	23	#include <plat/pm.h>
	24
	25	/* PM GPIO helpers */
	26
	27	#define OFFS_CON (0x00)
	28	#define OFFS_DAT (0x04)
	29	#define OFFS_UP (0x08)
	30
782d8a3c	31	static void samsung_gpio_pm_1bit_save(struct samsung_gpio_chip *chip)
d87964c4 BD	32	{
	33	chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON);
	34	chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT);
	35	}
	36
782d8a3c	37	static void samsung_gpio_pm_1bit_resume(struct samsung_gpio_chip *chip)
d87964c4 BD	38	{
	39	void __iomem *base = chip->base;
	40	u32 old_gpcon = __raw_readl(base + OFFS_CON);
	41	u32 old_gpdat = __raw_readl(base + OFFS_DAT);
	42	u32 gps_gpcon = chip->pm_save[0];
	43	u32 gps_gpdat = chip->pm_save[1];
	44	u32 gpcon;
	45
	46	/* GPACON only has one bit per control / data and no PULLUPs.
	47	* GPACON[x] = 0 => Output, 1 => SFN */
	48
	49	/* first set all SFN bits to SFN */
	50
	51	gpcon = old_gpcon \| gps_gpcon;
	52	__raw_writel(gpcon, base + OFFS_CON);
	53
	54	/* now set all the other bits */
	55
	56	__raw_writel(gps_gpdat, base + OFFS_DAT);
	57	__raw_writel(gps_gpcon, base + OFFS_CON);
	58
	59	S3C_PMDBG("%s: CON %08x => %08x, DAT %08x => %08x\n",
	60	chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat);
	61	}
	62
782d8a3c KK	63	struct samsung_gpio_pm samsung_gpio_pm_1bit = {
	64	.save = samsung_gpio_pm_1bit_save,
	65	.resume = samsung_gpio_pm_1bit_resume,
d87964c4 BD	66	};
d87964c4 BD	67
782d8a3c	68	static void samsung_gpio_pm_2bit_save(struct samsung_gpio_chip *chip)
d87964c4 BD	69	{
	70	chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON);
	71	chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT);
	72	chip->pm_save[2] = __raw_readl(chip->base + OFFS_UP);
	73	}
	74
	75	/* Test whether the given masked+shifted bits of an GPIO configuration
	76	* are one of the SFN (special function) modes. */
	77
	78	static inline int is_sfn(unsigned long con)
	79	{
	80	return con >= 2;
	81	}
	82
	83	/* Test if the given masked+shifted GPIO configuration is an input */
	84
	85	static inline int is_in(unsigned long con)
	86	{
	87	return con == 0;
	88	}
	89
	90	/* Test if the given masked+shifted GPIO configuration is an output */
	91
	92	static inline int is_out(unsigned long con)
	93	{
	94	return con == 1;
	95	}
	96
	97	/**
782d8a3c	98	* samsung_gpio_pm_2bit_resume() - restore the given GPIO bank
d87964c4 BD	99	* @chip: The chip information to resume.
	100	*
	101	* Restore one of the GPIO banks that was saved during suspend. This is
	102	* not as simple as once thought, due to the possibility of glitches
	103	* from the order that the CON and DAT registers are set in.
	104	*
	105	* The three states the pin can be are {IN,OUT,SFN} which gives us 9
	106	* combinations of changes to check. Three of these, if the pin stays
	107	* in the same configuration can be discounted. This leaves us with
	108	* the following:
	109	*
	110	* { IN => OUT } Change DAT first
	111	* { IN => SFN } Change CON first
	112	* { OUT => SFN } Change CON first, so new data will not glitch
	113	* { OUT => IN } Change CON first, so new data will not glitch
	114	* { SFN => IN } Change CON first
	115	* { SFN => OUT } Change DAT first, so new data will not glitch [1]
	116	*
	117	* We do not currently deal with the UP registers as these control
	118	* weak resistors, so a small delay in change should not need to bring
	119	* these into the calculations.
	120	*
	121	* [1] this assumes that writing to a pin DAT whilst in SFN will set the
	122	* state for when it is next output.
	123	*/
782d8a3c	124	static void samsung_gpio_pm_2bit_resume(struct samsung_gpio_chip *chip)
d87964c4 BD	125	{
	126	void __iomem *base = chip->base;
	127	u32 old_gpcon = __raw_readl(base + OFFS_CON);
	128	u32 old_gpdat = __raw_readl(base + OFFS_DAT);
	129	u32 gps_gpcon = chip->pm_save[0];
	130	u32 gps_gpdat = chip->pm_save[1];
	131	u32 gpcon, old, new, mask;
	132	u32 change_mask = 0x0;
	133	int nr;
	134
	135	/* restore GPIO pull-up settings */
	136	__raw_writel(chip->pm_save[2], base + OFFS_UP);
	137
	138	/* Create a change_mask of all the items that need to have
	139	* their CON value changed before their DAT value, so that
	140	* we minimise the work between the two settings.
	141	*/
	142
	143	for (nr = 0, mask = 0x03; nr < 32; nr += 2, mask <<= 2) {
	144	old = (old_gpcon & mask) >> nr;
	145	new = (gps_gpcon & mask) >> nr;
	146
	147	/* If there is no change, then skip */
	148
	149	if (old == new)
	150	continue;
	151
	152	/* If both are special function, then skip */
	153
	154	if (is_sfn(old) && is_sfn(new))
	155	continue;
	156
	157	/* Change is IN => OUT, do not change now */
	158
	159	if (is_in(old) && is_out(new))
	160	continue;
	161
	162	/* Change is SFN => OUT, do not change now */
	163
	164	if (is_sfn(old) && is_out(new))
	165	continue;
	166
	167	/* We should now be at the case of IN=>SFN,
	168	* OUT=>SFN, OUT=>IN, SFN=>IN. */
	169
	170	change_mask \|= mask;
	171	}
	172
	173
	174	/* Write the new CON settings */
	175
	176	gpcon = old_gpcon & ~change_mask;
	177	gpcon \|= gps_gpcon & change_mask;
	178
	179	__raw_writel(gpcon, base + OFFS_CON);
	180
	181	/* Now change any items that require DAT,CON */
	182
	183	__raw_writel(gps_gpdat, base + OFFS_DAT);
	184	__raw_writel(gps_gpcon, base + OFFS_CON);
	185
	186	S3C_PMDBG("%s: CON %08x => %08x, DAT %08x => %08x\n",
	187	chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat);
	188	}
189
782d8a3c KK	190	struct samsung_gpio_pm samsung_gpio_pm_2bit = {
	191	.save = samsung_gpio_pm_2bit_save,
	192	.resume = samsung_gpio_pm_2bit_resume,
d87964c4 BD	193	};
d87964c4 BD	194
e245f969 TF	195	#if defined(CONFIG_ARCH_S3C64XX) \|\| defined(CONFIG_PLAT_S5P) \
e245f969 TF	196	\|\| defined(CONFIG_ARCH_EXYNOS)
782d8a3c	197	static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip)
d87964c4 BD	198	{
	199	chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON);
	200	chip->pm_save[2] = __raw_readl(chip->base + OFFS_DAT);
	201	chip->pm_save[3] = __raw_readl(chip->base + OFFS_UP);
	202
	203	if (chip->chip.ngpio > 8)
	204	chip->pm_save[0] = __raw_readl(chip->base - 4);
	205	}
	206
782d8a3c	207	static u32 samsung_gpio_pm_4bit_mask(u32 old_gpcon, u32 gps_gpcon)
d87964c4 BD	208	{
	209	u32 old, new, mask;
	210	u32 change_mask = 0x0;
	211	int nr;
	212
	213	for (nr = 0, mask = 0x0f; nr < 16; nr += 4, mask <<= 4) {
	214	old = (old_gpcon & mask) >> nr;
	215	new = (gps_gpcon & mask) >> nr;
	216
	217	/* If there is no change, then skip */
	218
	219	if (old == new)
	220	continue;
	221
	222	/* If both are special function, then skip */
	223
	224	if (is_sfn(old) && is_sfn(new))
	225	continue;
	226
	227	/* Change is IN => OUT, do not change now */
	228
	229	if (is_in(old) && is_out(new))
	230	continue;
	231
	232	/* Change is SFN => OUT, do not change now */
	233
	234	if (is_sfn(old) && is_out(new))
	235	continue;
	236
	237	/* We should now be at the case of IN=>SFN,
	238	* OUT=>SFN, OUT=>IN, SFN=>IN. */
	239
	240	change_mask \|= mask;
	241	}
	242
	243	return change_mask;
	244	}
	245
782d8a3c	246	static void samsung_gpio_pm_4bit_con(struct samsung_gpio_chip *chip, int index)
d87964c4 BD	247	{
	248	void __iomem con = chip->base + (index 4);
	249	u32 old_gpcon = __raw_readl(con);
	250	u32 gps_gpcon = chip->pm_save[index + 1];
	251	u32 gpcon, mask;
	252
782d8a3c	253	mask = samsung_gpio_pm_4bit_mask(old_gpcon, gps_gpcon);
d87964c4 BD	254
	255	gpcon = old_gpcon & ~mask;
	256	gpcon \|= gps_gpcon & mask;
	257
	258	__raw_writel(gpcon, con);
	259	}
	260
782d8a3c	261	static void samsung_gpio_pm_4bit_resume(struct samsung_gpio_chip *chip)
d87964c4 BD	262	{
	263	void __iomem *base = chip->base;
	264	u32 old_gpcon[2];
	265	u32 old_gpdat = __raw_readl(base + OFFS_DAT);
	266	u32 gps_gpdat = chip->pm_save[2];
	267
	268	/* First, modify the CON settings */
	269
	270	old_gpcon[0] = 0;
	271	old_gpcon[1] = __raw_readl(base + OFFS_CON);
	272
782d8a3c	273	samsung_gpio_pm_4bit_con(chip, 0);
d87964c4 BD	274	if (chip->chip.ngpio > 8) {
d87964c4 BD	275	old_gpcon[0] = __raw_readl(base - 4);
782d8a3c	276	samsung_gpio_pm_4bit_con(chip, -1);
d87964c4 BD	277	}
	278
	279	/* Now change the configurations that require DAT,CON */
	280
	281	__raw_writel(chip->pm_save[2], base + OFFS_DAT);
	282	__raw_writel(chip->pm_save[1], base + OFFS_CON);
	283	if (chip->chip.ngpio > 8)
	284	__raw_writel(chip->pm_save[0], base - 4);
	285
	286	__raw_writel(chip->pm_save[2], base + OFFS_DAT);
	287	__raw_writel(chip->pm_save[3], base + OFFS_UP);
	288
	289	if (chip->chip.ngpio > 8) {
	290	S3C_PMDBG("%s: CON4 %08x,%08x => %08x,%08x, DAT %08x => %08x\n",
	291	chip->chip.label, old_gpcon[0], old_gpcon[1],
	292	__raw_readl(base - 4),
	293	__raw_readl(base + OFFS_CON),
	294	old_gpdat, gps_gpdat);
	295	} else
	296	S3C_PMDBG("%s: CON4 %08x => %08x, DAT %08x => %08x\n",
	297	chip->chip.label, old_gpcon[1],
	298	__raw_readl(base + OFFS_CON),
	299	old_gpdat, gps_gpdat);
	300	}
	301
782d8a3c KK	302	struct samsung_gpio_pm samsung_gpio_pm_4bit = {
	303	.save = samsung_gpio_pm_4bit_save,
	304	.resume = samsung_gpio_pm_4bit_resume,
d87964c4	305	};
e245f969	306	#endif /* CONFIG_ARCH_S3C64XX \|\| CONFIG_PLAT_S5P \|\| CONFIG_ARCH_EXYNOS */
d87964c4 BD	307
d87964c4 BD	308	/**
782d8a3c	309	* samsung_pm_save_gpio() - save gpio chip data for suspend
d87964c4 BD	310	* @ourchip: The chip for suspend.
d87964c4 BD	311	*/
782d8a3c	312	static void samsung_pm_save_gpio(struct samsung_gpio_chip *ourchip)
d87964c4	313	{
782d8a3c	314	struct samsung_gpio_pm *pm = ourchip->pm;
d87964c4 BD	315
	316	if (pm == NULL \|\| pm->save == NULL)
	317	S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label);
	318	else
	319	pm->save(ourchip);
	320	}
	321
	322	/**
782d8a3c	323	* samsung_pm_save_gpios() - Save the state of the GPIO banks.
d87964c4 BD	324	*
	325	* For all the GPIO banks, save the state of each one ready for going
	326	* into a suspend mode.
	327	*/
782d8a3c	328	void samsung_pm_save_gpios(void)
d87964c4	329	{
782d8a3c	330	struct samsung_gpio_chip *ourchip;
d87964c4 BD	331	unsigned int gpio_nr;
d87964c4 BD	332
32b6cb38	333	for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) {
782d8a3c	334	ourchip = samsung_gpiolib_getchip(gpio_nr);
91dc74e4 P	335	if (!ourchip) {
91dc74e4 P	336	gpio_nr++;
d87964c4	337	continue;
91dc74e4	338	}
d87964c4	339
782d8a3c	340	samsung_pm_save_gpio(ourchip);
d87964c4 BD	341
	342	S3C_PMDBG("%s: save %08x,%08x,%08x,%08x\n",
	343	ourchip->chip.label,
	344	ourchip->pm_save[0],
	345	ourchip->pm_save[1],
	346	ourchip->pm_save[2],
	347	ourchip->pm_save[3]);
	348
	349	gpio_nr += ourchip->chip.ngpio;
	350	gpio_nr += CONFIG_S3C_GPIO_SPACE;
	351	}
	352	}
	353
	354	/**
782d8a3c	355	* samsung_pm_resume_gpio() - restore gpio chip data after suspend
d87964c4 BD	356	* @ourchip: The suspended chip.
d87964c4 BD	357	*/
782d8a3c	358	static void samsung_pm_resume_gpio(struct samsung_gpio_chip *ourchip)
d87964c4	359	{
782d8a3c	360	struct samsung_gpio_pm *pm = ourchip->pm;
d87964c4 BD	361
	362	if (pm == NULL \|\| pm->resume == NULL)
	363	S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label);
	364	else
	365	pm->resume(ourchip);
	366	}
	367
782d8a3c	368	void samsung_pm_restore_gpios(void)
d87964c4	369	{
782d8a3c	370	struct samsung_gpio_chip *ourchip;
d87964c4 BD	371	unsigned int gpio_nr;
d87964c4 BD	372
32b6cb38	373	for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) {
782d8a3c	374	ourchip = samsung_gpiolib_getchip(gpio_nr);
91dc74e4 P	375	if (!ourchip) {
91dc74e4 P	376	gpio_nr++;
d87964c4	377	continue;
91dc74e4	378	}
d87964c4	379
782d8a3c	380	samsung_pm_resume_gpio(ourchip);
d87964c4 BD	381
	382	gpio_nr += ourchip->chip.ngpio;
	383	gpio_nr += CONFIG_S3C_GPIO_SPACE;
	384	}
	385	}