[mirror_ubuntu-bionic-kernel.git] / arch / arm / plat-samsung / setup-mipiphy.c

/*
 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
 *
 * S5P - Helper functions for MIPI-CSIS and MIPI-DSIM D-PHY control
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/spinlock.h>
#include <mach/regs-clock.h>

static int __s5p_mipi_phy_control(int id, bool on, u32 reset)
{
	static DEFINE_SPINLOCK(lock);
	void __iomem *addr;
	unsigned long flags;
	u32 cfg;

	id = max(0, id);
	if (id > 1)
		return -EINVAL;

	addr = S5P_MIPI_DPHY_CONTROL(id);

	spin_lock_irqsave(&lock, flags);

	cfg = __raw_readl(addr);
	cfg = on ? (cfg | reset) : (cfg & ~reset);
	__raw_writel(cfg, addr);

	if (on) {
		cfg |= S5P_MIPI_DPHY_ENABLE;
	} else if (!(cfg & (S5P_MIPI_DPHY_SRESETN |
			    S5P_MIPI_DPHY_MRESETN) & ~reset)) {
		cfg &= ~S5P_MIPI_DPHY_ENABLE;
	}

	__raw_writel(cfg, addr);
	spin_unlock_irqrestore(&lock, flags);

	return 0;
}

int s5p_csis_phy_enable(int id, bool on)
{
	return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN);
}
EXPORT_SYMBOL(s5p_csis_phy_enable);

int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
{
	return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN);
}
EXPORT_SYMBOL(s5p_dsim_phy_enable);
Commit	Line	Data
1d45ac49 SN	1	/*
	2	* Copyright (C) 2011 Samsung Electronics Co., Ltd.
	3	*
	4	* S5P - Helper functions for MIPI-CSIS and MIPI-DSIM D-PHY control
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
30da66ea	11	#include <linux/export.h>
1d45ac49 SN	12	#include <linux/kernel.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/io.h>
	15	#include <linux/spinlock.h>
	16	#include <mach/regs-clock.h>
	17
69a3d4f7	18	static int __s5p_mipi_phy_control(int id, bool on, u32 reset)
1d45ac49 SN	19	{
	20	static DEFINE_SPINLOCK(lock);
	21	void __iomem *addr;
	22	unsigned long flags;
1d45ac49 SN	23	u32 cfg;
1d45ac49 SN	24
69a3d4f7 SN	25	id = max(0, id);
69a3d4f7 SN	26	if (id > 1)
1d45ac49 SN	27	return -EINVAL;
1d45ac49 SN	28
69a3d4f7	29	addr = S5P_MIPI_DPHY_CONTROL(id);
1d45ac49 SN	30
	31	spin_lock_irqsave(&lock, flags);
	32
	33	cfg = __raw_readl(addr);
	34	cfg = on ? (cfg \| reset) : (cfg & ~reset);
	35	__raw_writel(cfg, addr);
	36
	37	if (on) {
	38	cfg \|= S5P_MIPI_DPHY_ENABLE;
	39	} else if (!(cfg & (S5P_MIPI_DPHY_SRESETN \|
	40	S5P_MIPI_DPHY_MRESETN) & ~reset)) {
	41	cfg &= ~S5P_MIPI_DPHY_ENABLE;
	42	}
	43
	44	__raw_writel(cfg, addr);
	45	spin_unlock_irqrestore(&lock, flags);
	46
	47	return 0;
	48	}
	49
69a3d4f7	50	int s5p_csis_phy_enable(int id, bool on)
1d45ac49	51	{
69a3d4f7	52	return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN);
1d45ac49	53	}
30da66ea	54	EXPORT_SYMBOL(s5p_csis_phy_enable);
1d45ac49 SN	55
	56	int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
	57	{
69a3d4f7	58	return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN);
1d45ac49	59	}
30da66ea	60	EXPORT_SYMBOL(s5p_dsim_phy_enable);