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1 | /* |
2 | * linux/arch/arm26/kernel/fiq.c | |
3 | * | |
4 | * Copyright (C) 1998 Russell King | |
5 | * Copyright (C) 1998, 1999 Phil Blundell | |
6 | * Copyright (C) 2003 Ian Molton | |
7 | * | |
8 | * FIQ support written by Philip Blundell <philb@gnu.org>, 1998. | |
9 | * | |
10 | * FIQ support re-written by Russell King to be more generic | |
11 | * | |
12 | * We now properly support a method by which the FIQ handlers can | |
13 | * be stacked onto the vector. We still do not support sharing | |
14 | * the FIQ vector itself. | |
15 | * | |
16 | * Operation is as follows: | |
17 | * 1. Owner A claims FIQ: | |
18 | * - default_fiq relinquishes control. | |
19 | * 2. Owner A: | |
20 | * - inserts code. | |
21 | * - sets any registers, | |
22 | * - enables FIQ. | |
23 | * 3. Owner B claims FIQ: | |
24 | * - if owner A has a relinquish function. | |
25 | * - disable FIQs. | |
26 | * - saves any registers. | |
27 | * - returns zero. | |
28 | * 4. Owner B: | |
29 | * - inserts code. | |
30 | * - sets any registers, | |
31 | * - enables FIQ. | |
32 | * 5. Owner B releases FIQ: | |
33 | * - Owner A is asked to reacquire FIQ: | |
34 | * - inserts code. | |
35 | * - restores saved registers. | |
36 | * - enables FIQ. | |
37 | * 6. Goto 3 | |
38 | */ | |
39 | #include <linux/config.h> | |
40 | #include <linux/module.h> | |
41 | #include <linux/mm.h> | |
42 | #include <linux/mman.h> | |
43 | #include <linux/init.h> | |
44 | #include <linux/seq_file.h> | |
45 | ||
46 | #include <asm/fiq.h> | |
47 | #include <asm/io.h> | |
48 | #include <asm/irq.h> | |
49 | #include <asm/pgalloc.h> | |
50 | #include <asm/system.h> | |
51 | #include <asm/uaccess.h> | |
52 | ||
53 | #define FIQ_VECTOR (vectors_base() + 0x1c) | |
54 | ||
55 | static unsigned long no_fiq_insn; | |
56 | ||
57 | #define unprotect_page_0() | |
58 | #define protect_page_0() | |
59 | ||
60 | /* Default reacquire function | |
61 | * - we always relinquish FIQ control | |
62 | * - we always reacquire FIQ control | |
63 | */ | |
64 | static int fiq_def_op(void *ref, int relinquish) | |
65 | { | |
66 | if (!relinquish) { | |
67 | unprotect_page_0(); | |
68 | *(unsigned long *)FIQ_VECTOR = no_fiq_insn; | |
69 | protect_page_0(); | |
70 | } | |
71 | ||
72 | return 0; | |
73 | } | |
74 | ||
75 | static struct fiq_handler default_owner = { | |
76 | .name = "default", | |
77 | .fiq_op = fiq_def_op, | |
78 | }; | |
79 | ||
80 | static struct fiq_handler *current_fiq = &default_owner; | |
81 | ||
82 | int show_fiq_list(struct seq_file *p, void *v) | |
83 | { | |
84 | if (current_fiq != &default_owner) | |
85 | seq_printf(p, "FIQ: %s\n", current_fiq->name); | |
86 | ||
87 | return 0; | |
88 | } | |
89 | ||
90 | void set_fiq_handler(void *start, unsigned int length) | |
91 | { | |
92 | unprotect_page_0(); | |
93 | ||
94 | memcpy((void *)FIQ_VECTOR, start, length); | |
95 | ||
96 | protect_page_0(); | |
97 | } | |
98 | ||
99 | /* | |
100 | * Taking an interrupt in FIQ mode is death, so both these functions | |
101 | * disable irqs for the duration. | |
102 | */ | |
103 | void set_fiq_regs(struct pt_regs *regs) | |
104 | { | |
105 | register unsigned long tmp, tmp2; | |
106 | __asm__ volatile ( | |
107 | "mov %0, pc | |
108 | bic %1, %0, #0x3 | |
109 | orr %1, %1, %3 | |
110 | teqp %1, #0 @ select FIQ mode | |
111 | mov r0, r0 | |
112 | ldmia %2, {r8 - r14} | |
113 | teqp %0, #0 @ return to SVC mode | |
114 | mov r0, r0" | |
115 | : "=&r" (tmp), "=&r" (tmp2) | |
116 | : "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | MODE_FIQ26) | |
117 | /* These registers aren't modified by the above code in a way | |
118 | visible to the compiler, but we mark them as clobbers anyway | |
119 | so that GCC won't put any of the input or output operands in | |
120 | them. */ | |
121 | : "r8", "r9", "r10", "r11", "r12", "r13", "r14"); | |
122 | } | |
123 | ||
124 | void get_fiq_regs(struct pt_regs *regs) | |
125 | { | |
126 | register unsigned long tmp, tmp2; | |
127 | __asm__ volatile ( | |
128 | "mov %0, pc | |
129 | bic %1, %0, #0x3 | |
130 | orr %1, %1, %3 | |
131 | teqp %1, #0 @ select FIQ mode | |
132 | mov r0, r0 | |
133 | stmia %2, {r8 - r14} | |
134 | teqp %0, #0 @ return to SVC mode | |
135 | mov r0, r0" | |
136 | : "=&r" (tmp), "=&r" (tmp2) | |
137 | : "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | MODE_FIQ26) | |
138 | /* These registers aren't modified by the above code in a way | |
139 | visible to the compiler, but we mark them as clobbers anyway | |
140 | so that GCC won't put any of the input or output operands in | |
141 | them. */ | |
142 | : "r8", "r9", "r10", "r11", "r12", "r13", "r14"); | |
143 | } | |
144 | ||
145 | int claim_fiq(struct fiq_handler *f) | |
146 | { | |
147 | int ret = 0; | |
148 | ||
149 | if (current_fiq) { | |
150 | ret = -EBUSY; | |
151 | ||
152 | if (current_fiq->fiq_op != NULL) | |
153 | ret = current_fiq->fiq_op(current_fiq->dev_id, 1); | |
154 | } | |
155 | ||
156 | if (!ret) { | |
157 | f->next = current_fiq; | |
158 | current_fiq = f; | |
159 | } | |
160 | ||
161 | return ret; | |
162 | } | |
163 | ||
164 | void release_fiq(struct fiq_handler *f) | |
165 | { | |
166 | if (current_fiq != f) { | |
167 | printk(KERN_ERR "%s FIQ trying to release %s FIQ\n", | |
168 | f->name, current_fiq->name); | |
169 | #ifdef CONFIG_DEBUG_ERRORS | |
170 | __backtrace(); | |
171 | #endif | |
172 | return; | |
173 | } | |
174 | ||
175 | do | |
176 | current_fiq = current_fiq->next; | |
177 | while (current_fiq->fiq_op(current_fiq->dev_id, 0)); | |
178 | } | |
179 | ||
180 | void enable_fiq(int fiq) | |
181 | { | |
182 | enable_irq(fiq + FIQ_START); | |
183 | } | |
184 | ||
185 | void disable_fiq(int fiq) | |
186 | { | |
187 | disable_irq(fiq + FIQ_START); | |
188 | } | |
189 | ||
190 | EXPORT_SYMBOL(set_fiq_handler); | |
191 | EXPORT_SYMBOL(set_fiq_regs); | |
192 | EXPORT_SYMBOL(get_fiq_regs); | |
193 | EXPORT_SYMBOL(claim_fiq); | |
194 | EXPORT_SYMBOL(release_fiq); | |
195 | EXPORT_SYMBOL(enable_fiq); | |
196 | EXPORT_SYMBOL(disable_fiq); | |
197 | ||
198 | void __init init_FIQ(void) | |
199 | { | |
200 | no_fiq_insn = *(unsigned long *)FIQ_VECTOR; | |
201 | set_fs(get_fs()); | |
202 | } |