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Commit | Line | Data |
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eed6b3eb OJ |
1 | menu "Platform selection" |
2 | ||
c88cc3ee AF |
3 | config ARCH_ACTIONS |
4 | bool "Actions Semi Platforms" | |
5 | select OWL_TIMER | |
6 | help | |
7 | This enables support for the Actions Semiconductor S900 SoC family. | |
8 | ||
ce3dd55b AP |
9 | config ARCH_SUNXI |
10 | bool "Allwinner sunxi 64-bit SoC Family" | |
900a9020 | 11 | select ARCH_HAS_RESET_CONTROLLER |
23485482 | 12 | select GENERIC_IRQ_CHIP |
d229d205 | 13 | select PINCTRL |
900a9020 | 14 | select RESET_CONTROLLER |
ce3dd55b AP |
15 | help |
16 | This enables support for Allwinner sunxi based SoCs like the A64. | |
17 | ||
e2f0abaf AT |
18 | config ARCH_ALPINE |
19 | bool "Annapurna Labs Alpine platform" | |
5a3f75a4 | 20 | select ALPINE_MSI if PCI |
e2f0abaf AT |
21 | help |
22 | This enables support for the Annapurna Labs Alpine | |
23 | Soc family. | |
24 | ||
628d30d1 EA |
25 | config ARCH_BCM2835 |
26 | bool "Broadcom BCM2835 family" | |
bb0eb050 | 27 | select TIMER_OF |
da9a1c67 | 28 | select GPIOLIB |
628d30d1 EA |
29 | select PINCTRL |
30 | select PINCTRL_BCM2835 | |
31 | select ARM_AMBA | |
32 | select ARM_TIMER_SP804 | |
33 | select HAVE_ARM_ARCH_TIMER | |
34 | help | |
35 | This enables support for the Broadcom BCM2837 SoC. | |
36 | This SoC is used in the Raspberry Pi 3 device. | |
37 | ||
36b7c583 RJ |
38 | config ARCH_BCM_IPROC |
39 | bool "Broadcom iProc SoC Family" | |
382618bb | 40 | select COMMON_CLK_IPROC |
da9a1c67 | 41 | select GPIOLIB |
382618bb | 42 | select PINCTRL |
36b7c583 RJ |
43 | help |
44 | This enables support for Broadcom iProc based SoCs | |
45 | ||
dd40fd92 JZ |
46 | config ARCH_BERLIN |
47 | bool "Marvell Berlin SoC Family" | |
48 | select DW_APB_ICTL | |
da9a1c67 | 49 | select GPIOLIB |
75d8e1ba | 50 | select PINCTRL |
dd40fd92 JZ |
51 | help |
52 | This enables support for Marvell Berlin SoC Family | |
53 | ||
37eb56dc FF |
54 | config ARCH_BRCMSTB |
55 | bool "Broadcom Set-Top-Box SoCs" | |
56 | select BRCMSTB_L2_IRQ | |
57 | select GENERIC_IRQ_CHIP | |
58 | help | |
59 | This enables support for Broadcom's ARMv8 Set Top Box SoCs | |
60 | ||
eed6b3eb | 61 | config ARCH_EXYNOS |
c87b3e97 | 62 | bool "ARMv8 based Samsung Exynos SoC family" |
eed6b3eb | 63 | select COMMON_CLK_SAMSUNG |
caab3df9 KK |
64 | select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS |
65 | select EXYNOS_PMU | |
eed6b3eb OJ |
66 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
67 | select HAVE_S3C_RTC if RTC_CLASS | |
68 | select PINCTRL | |
69 | select PINCTRL_EXYNOS | |
3b3428e3 | 70 | select SOC_SAMSUNG |
eed6b3eb | 71 | help |
c87b3e97 | 72 | This enables support for ARMv8 based Samsung Exynos SoC family. |
eed6b3eb | 73 | |
53a5fde0 BS |
74 | config ARCH_LAYERSCAPE |
75 | bool "ARMv8 based Freescale Layerscape SoC family" | |
eeb3d68b | 76 | select EDAC_SUPPORT |
eed6b3eb | 77 | help |
53a5fde0 | 78 | This enables support for the Freescale Layerscape SoC family. |
eed6b3eb | 79 | |
198ed962 CM |
80 | config ARCH_LG1K |
81 | bool "LG Electronics LG1K SoC Family" | |
82 | help | |
83 | This enables support for LG Electronics LG1K SoC Family | |
84 | ||
eed6b3eb OJ |
85 | config ARCH_HISI |
86 | bool "Hisilicon SoC Family" | |
2b905d3a | 87 | select ARM_TIMER_SP804 |
f9db43bc | 88 | select HISILICON_IRQ_MBIGEN if PCI |
21adc4d7 | 89 | select PINCTRL |
eed6b3eb OJ |
90 | help |
91 | This enables support for Hisilicon ARMv8 SoC family | |
92 | ||
93 | config ARCH_MEDIATEK | |
94 | bool "Mediatek MT65xx & MT81xx ARMv8 SoC" | |
95 | select ARM_GIC | |
96 | select PINCTRL | |
c050b45d | 97 | select MTK_TIMER |
eed6b3eb OJ |
98 | help |
99 | Support for Mediatek MT65xx & MT81xx ARMv8 SoCs | |
100 | ||
451e9e54 AF |
101 | config ARCH_MESON |
102 | bool "Amlogic Platforms" | |
bf56c776 CC |
103 | select PINCTRL |
104 | select PINCTRL_MESON | |
59bdefe9 MT |
105 | select COMMON_CLK_AMLOGIC |
106 | select COMMON_CLK_GXBB | |
451e9e54 AF |
107 | help |
108 | This enables support for the Amlogic S905 SoCs. | |
109 | ||
b4f596b1 GC |
110 | config ARCH_MVEBU |
111 | bool "Marvell EBU SoC Family" | |
ad87c0f6 TP |
112 | select ARMADA_AP806_SYSCON |
113 | select ARMADA_CP110_SYSCON | |
ff60d834 | 114 | select ARMADA_37XX_CLK |
d2718d13 GC |
115 | select GPIOLIB |
116 | select GPIOLIB_IRQCHIP | |
29ad6bd9 TP |
117 | select MVEBU_GICP |
118 | select MVEBU_ICU | |
b3920b2b | 119 | select MVEBU_ODMI |
04208a24 | 120 | select MVEBU_PIC |
d2718d13 GC |
121 | select OF_GPIO |
122 | select PINCTRL | |
123 | select PINCTRL_ARMADA_37XX | |
c4c14365 GC |
124 | select PINCTRL_ARMADA_AP806 |
125 | select PINCTRL_ARMADA_CP110 | |
b4f596b1 | 126 | help |
b3920b2b TP |
127 | This enables support for Marvell EBU familly, including: |
128 | - Armada 3700 SoC Family | |
129 | - Armada 7K SoC Family | |
130 | - Armada 8K SoC Family | |
b4f596b1 | 131 | |
eed6b3eb OJ |
132 | config ARCH_QCOM |
133 | bool "Qualcomm Platforms" | |
e19811a8 | 134 | select GPIOLIB |
eed6b3eb OJ |
135 | select PINCTRL |
136 | help | |
137 | This enables support for the ARMv8 based Qualcomm chipsets. | |
138 | ||
1b0d665e AF |
139 | config ARCH_REALTEK |
140 | bool "Realtek Platforms" | |
141 | help | |
142 | This enables support for the ARMv8 based Realtek chipsets, | |
143 | like the RTD1295. | |
144 | ||
fbac1c81 HS |
145 | config ARCH_ROCKCHIP |
146 | bool "Rockchip Platforms" | |
147 | select ARCH_HAS_RESET_CONTROLLER | |
da9a1c67 | 148 | select GPIOLIB |
fbac1c81 HS |
149 | select PINCTRL |
150 | select PINCTRL_ROCKCHIP | |
c840f28b | 151 | select ROCKCHIP_TIMER |
fbac1c81 HS |
152 | help |
153 | This enables support for the ARMv8 based Rockchip chipsets, | |
154 | like the RK3368. | |
155 | ||
eed6b3eb OJ |
156 | config ARCH_SEATTLE |
157 | bool "AMD Seattle SoC Family" | |
158 | help | |
159 | This enables support for AMD Seattle SOC Family | |
160 | ||
26a7e06d SH |
161 | config ARCH_SHMOBILE |
162 | bool | |
163 | ||
164 | config ARCH_RENESAS | |
165 | bool "Renesas SoC Platforms" | |
166 | select ARCH_SHMOBILE | |
167 | select PINCTRL | |
2ee98234 GU |
168 | select PM |
169 | select PM_GENERIC_DOMAINS | |
f7e02051 | 170 | select RENESAS_IRQC |
8d6799a9 | 171 | select SOC_BUS |
26a7e06d SH |
172 | help |
173 | This enables support for the ARMv8 based Renesas SoCs. | |
174 | ||
175 | config ARCH_R8A7795 | |
176 | bool "Renesas R-Car H3 SoC Platform" | |
177 | depends on ARCH_RENESAS | |
178 | help | |
179 | This enables support for the Renesas R-Car H3 SoC. | |
180 | ||
1561f207 SH |
181 | config ARCH_R8A7796 |
182 | bool "Renesas R-Car M3-W SoC Platform" | |
183 | depends on ARCH_RENESAS | |
184 | help | |
185 | This enables support for the Renesas R-Car M3-W SoC. | |
186 | ||
78cd6a9d DN |
187 | config ARCH_STRATIX10 |
188 | bool "Altera's Stratix 10 SoCFPGA Family" | |
189 | help | |
190 | This enables support for Altera's Stratix 10 SoCFPGA Family. | |
191 | ||
eed6b3eb OJ |
192 | config ARCH_TEGRA |
193 | bool "NVIDIA Tegra SoC Family" | |
194 | select ARCH_HAS_RESET_CONTROLLER | |
eed6b3eb OJ |
195 | select CLKDEV_LOOKUP |
196 | select CLKSRC_MMIO | |
bb0eb050 | 197 | select TIMER_OF |
eed6b3eb | 198 | select GENERIC_CLOCKEVENTS |
da9a1c67 | 199 | select GPIOLIB |
eed6b3eb | 200 | select PINCTRL |
98823241 JH |
201 | select PM |
202 | select PM_GENERIC_DOMAINS | |
eed6b3eb OJ |
203 | select RESET_CONTROLLER |
204 | help | |
205 | This enables support for the NVIDIA Tegra SoC family. | |
206 | ||
eed6b3eb OJ |
207 | config ARCH_SPRD |
208 | bool "Spreadtrum SoC platform" | |
209 | help | |
210 | Support for Spreadtrum ARM based SoCs | |
211 | ||
212 | config ARCH_THUNDER | |
213 | bool "Cavium Inc. Thunder SoC Family" | |
214 | help | |
215 | This enables support for Cavium's Thunder Family of SoCs. | |
216 | ||
03b6fd5d J |
217 | config ARCH_THUNDER2 |
218 | bool "Cavium ThunderX2 Server Processors" | |
219 | select GPIOLIB | |
220 | help | |
221 | This enables support for Cavium's ThunderX2 CN99XX family of | |
222 | server processors. | |
223 | ||
56aaafb6 MY |
224 | config ARCH_UNIPHIER |
225 | bool "Socionext UniPhier SoC Family" | |
75924903 | 226 | select ARCH_HAS_RESET_CONTROLLER |
56aaafb6 MY |
227 | select PINCTRL |
228 | help | |
229 | This enables support for Socionext UniPhier SoC family. | |
230 | ||
eed6b3eb OJ |
231 | config ARCH_VEXPRESS |
232 | bool "ARMv8 software model (Versatile Express)" | |
eed6b3eb | 233 | select COMMON_CLK_VERSATILE |
da9a1c67 | 234 | select GPIOLIB |
8da7cc08 SH |
235 | select PM |
236 | select PM_GENERIC_DOMAINS | |
eed6b3eb OJ |
237 | select POWER_RESET_VEXPRESS |
238 | select VEXPRESS_CONFIG | |
239 | help | |
240 | This enables support for the ARMv8 software model (Versatile | |
241 | Express). | |
242 | ||
5bfb3889 | 243 | config ARCH_VULCAN |
a314520d | 244 | def_bool n |
5bfb3889 | 245 | |
eed6b3eb OJ |
246 | config ARCH_XGENE |
247 | bool "AppliedMicro X-Gene SOC Family" | |
248 | help | |
249 | This enables support for AppliedMicro X-Gene SOC Family | |
250 | ||
12496aea JN |
251 | config ARCH_ZX |
252 | bool "ZTE ZX SoC Family" | |
253 | help | |
254 | This enables support for ZTE ZX SoC Family | |
255 | ||
eed6b3eb OJ |
256 | config ARCH_ZYNQMP |
257 | bool "Xilinx ZynqMP Family" | |
258 | help | |
259 | This enables support for Xilinx ZynqMP Family | |
260 | ||
261 | endmenu |