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Commit | Line | Data |
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4f24eda8 AF |
1 | /* |
2 | * Copyright (c) 2016 Andreas Färber | |
3 | * | |
4 | * This file is dual-licensed: you can use it either under the terms | |
5 | * of the GPL or the X11 license, at your option. Note that this dual | |
6 | * licensing only applies to this file, and not this project as a | |
7 | * whole. | |
8 | * | |
9 | * a) This library is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of the | |
12 | * License, or (at your option) any later version. | |
13 | * | |
14 | * This library is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * Or, alternatively, | |
20 | * | |
21 | * b) Permission is hereby granted, free of charge, to any person | |
22 | * obtaining a copy of this software and associated documentation | |
23 | * files (the "Software"), to deal in the Software without | |
24 | * restriction, including without limitation the rights to use, | |
25 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
26 | * sell copies of the Software, and to permit persons to whom the | |
27 | * Software is furnished to do so, subject to the following | |
28 | * conditions: | |
29 | * | |
30 | * The above copyright notice and this permission notice shall be | |
31 | * included in all copies or substantial portions of the Software. | |
32 | * | |
33 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
34 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
35 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
36 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
37 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
38 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
39 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
40 | * OTHER DEALINGS IN THE SOFTWARE. | |
41 | */ | |
42 | ||
c328666d | 43 | #include "meson-gx.dtsi" |
f40d437f | 44 | #include <dt-bindings/gpio/meson-gxbb-gpio.h> |
6d1a5c93 | 45 | #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> |
c3929b72 | 46 | #include <dt-bindings/clock/gxbb-clkc.h> |
8d298f5b NA |
47 | #include <dt-bindings/clock/gxbb-aoclkc.h> |
48 | #include <dt-bindings/reset/gxbb-aoclkc.h> | |
4f24eda8 AF |
49 | |
50 | / { | |
51 | compatible = "amlogic,meson-gxbb"; | |
4f24eda8 | 52 | |
4f24eda8 | 53 | soc { |
566603e5 MB |
54 | usb0_phy: phy@c0000000 { |
55 | compatible = "amlogic,meson-gxbb-usb2-phy"; | |
56 | #phy-cells = <0>; | |
57 | reg = <0x0 0xc0000000 0x0 0x20>; | |
58 | resets = <&reset RESET_USB_OTG>; | |
59 | clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>; | |
60 | clock-names = "usb_general", "usb"; | |
61 | status = "disabled"; | |
62 | }; | |
63 | ||
64 | usb1_phy: phy@c0000020 { | |
65 | compatible = "amlogic,meson-gxbb-usb2-phy"; | |
66 | #phy-cells = <0>; | |
67 | reg = <0x0 0xc0000020 0x0 0x20>; | |
a5b1ef3c | 68 | resets = <&reset RESET_USB_OTG>; |
566603e5 MB |
69 | clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>; |
70 | clock-names = "usb_general", "usb"; | |
71 | status = "disabled"; | |
72 | }; | |
73 | ||
c328666d NA |
74 | usb0: usb@c9000000 { |
75 | compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; | |
76 | reg = <0x0 0xc9000000 0x0 0x40000>; | |
77 | interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; | |
78 | clocks = <&clkc CLKID_USB0_DDR_BRIDGE>; | |
79 | clock-names = "otg"; | |
80 | phys = <&usb0_phy>; | |
81 | phy-names = "usb2-phy"; | |
82 | dr_mode = "host"; | |
83 | status = "disabled"; | |
84 | }; | |
4f24eda8 | 85 | |
c328666d NA |
86 | usb1: usb@c9100000 { |
87 | compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; | |
88 | reg = <0x0 0xc9100000 0x0 0x40000>; | |
89 | interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; | |
90 | clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; | |
91 | clock-names = "otg"; | |
92 | phys = <&usb1_phy>; | |
93 | phy-names = "usb2-phy"; | |
94 | dr_mode = "host"; | |
95 | status = "disabled"; | |
96 | }; | |
c328666d NA |
97 | }; |
98 | }; | |
99 | ||
c328666d NA |
100 | &aobus { |
101 | pinctrl_aobus: pinctrl@14 { | |
102 | compatible = "amlogic,meson-gxbb-aobus-pinctrl"; | |
103 | #address-cells = <2>; | |
104 | #size-cells = <2>; | |
105 | ranges; | |
8e6320dd | 106 | |
c328666d NA |
107 | gpio_ao: bank@14 { |
108 | reg = <0x0 0x00014 0x0 0x8>, | |
109 | <0x0 0x0002c 0x0 0x4>, | |
110 | <0x0 0x00024 0x0 0x8>; | |
111 | reg-names = "mux", "pull", "gpio"; | |
112 | gpio-controller; | |
113 | #gpio-cells = <2>; | |
18ae17bc | 114 | gpio-ranges = <&pinctrl_aobus 0 0 14>; |
c328666d NA |
115 | }; |
116 | ||
117 | uart_ao_a_pins: uart_ao_a { | |
118 | mux { | |
119 | groups = "uart_tx_ao_a", "uart_rx_ao_a"; | |
120 | function = "uart_ao"; | |
8e6320dd | 121 | }; |
c328666d | 122 | }; |
8e6320dd | 123 | |
261e1d5c MB |
124 | uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts { |
125 | mux { | |
126 | groups = "uart_cts_ao_a", | |
127 | "uart_rts_ao_a"; | |
128 | function = "uart_ao"; | |
129 | }; | |
130 | }; | |
131 | ||
890a96a2 MB |
132 | uart_ao_b_pins: uart_ao_b { |
133 | mux { | |
134 | groups = "uart_tx_ao_b", "uart_rx_ao_b"; | |
135 | function = "uart_ao_b"; | |
136 | }; | |
137 | }; | |
138 | ||
261e1d5c MB |
139 | uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { |
140 | mux { | |
141 | groups = "uart_cts_ao_b", | |
142 | "uart_rts_ao_b"; | |
143 | function = "uart_ao_b"; | |
144 | }; | |
145 | }; | |
146 | ||
c328666d NA |
147 | remote_input_ao_pins: remote_input_ao { |
148 | mux { | |
149 | groups = "remote_input_ao"; | |
150 | function = "remote_input_ao"; | |
8f14a893 | 151 | }; |
c328666d | 152 | }; |
8f14a893 | 153 | |
c328666d NA |
154 | i2c_ao_pins: i2c_ao { |
155 | mux { | |
156 | groups = "i2c_sck_ao", | |
157 | "i2c_sda_ao"; | |
158 | function = "i2c_ao"; | |
8f14a893 | 159 | }; |
c328666d | 160 | }; |
8f14a893 | 161 | |
c328666d NA |
162 | pwm_ao_a_3_pins: pwm_ao_a_3 { |
163 | mux { | |
164 | groups = "pwm_ao_a_3"; | |
165 | function = "pwm_ao_a_3"; | |
8f14a893 | 166 | }; |
c328666d | 167 | }; |
8f14a893 | 168 | |
c328666d NA |
169 | pwm_ao_a_6_pins: pwm_ao_a_6 { |
170 | mux { | |
171 | groups = "pwm_ao_a_6"; | |
172 | function = "pwm_ao_a_6"; | |
8e6320dd | 173 | }; |
c328666d | 174 | }; |
f759b640 | 175 | |
c328666d NA |
176 | pwm_ao_a_12_pins: pwm_ao_a_12 { |
177 | mux { | |
178 | groups = "pwm_ao_a_12"; | |
179 | function = "pwm_ao_a_12"; | |
f759b640 | 180 | }; |
c328666d | 181 | }; |
e9c9b651 | 182 | |
c328666d NA |
183 | pwm_ao_b_pins: pwm_ao_b { |
184 | mux { | |
185 | groups = "pwm_ao_b"; | |
186 | function = "pwm_ao_b"; | |
e9c9b651 | 187 | }; |
c328666d | 188 | }; |
c328666d | 189 | |
552b1e56 | 190 | i2s_am_clk_pins: i2s_am_clk { |
191 | mux { | |
192 | groups = "i2s_am_clk"; | |
193 | function = "i2s_out_ao"; | |
194 | }; | |
195 | }; | |
c328666d | 196 | |
552b1e56 | 197 | i2s_out_ao_clk_pins: i2s_out_ao_clk { |
198 | mux { | |
199 | groups = "i2s_out_ao_clk"; | |
200 | function = "i2s_out_ao"; | |
201 | }; | |
202 | }; | |
c328666d | 203 | |
552b1e56 | 204 | i2s_out_lr_clk_pins: i2s_out_lr_clk { |
205 | mux { | |
206 | groups = "i2s_out_lr_clk"; | |
207 | function = "i2s_out_ao"; | |
208 | }; | |
209 | }; | |
210 | ||
211 | i2s_out_ch01_ao_pins: i2s_out_ch01_ao { | |
212 | mux { | |
213 | groups = "i2s_out_ch01_ao"; | |
214 | function = "i2s_out_ao"; | |
215 | }; | |
216 | }; | |
217 | ||
218 | i2s_out_ch23_ao_pins: i2s_out_ch23_ao { | |
219 | mux { | |
220 | groups = "i2s_out_ch23_ao"; | |
221 | function = "i2s_out_ao"; | |
222 | }; | |
223 | }; | |
224 | ||
225 | i2s_out_ch45_ao_pins: i2s_out_ch45_ao { | |
226 | mux { | |
227 | groups = "i2s_out_ch45_ao"; | |
228 | function = "i2s_out_ao"; | |
229 | }; | |
230 | }; | |
07a4652f | 231 | |
232 | spdif_out_ao_6_pins: spdif_out_ao_6 { | |
233 | mux { | |
234 | groups = "spdif_out_ao_6"; | |
235 | function = "spdif_out_ao"; | |
236 | }; | |
237 | }; | |
238 | ||
239 | spdif_out_ao_13_pins: spdif_out_ao_13 { | |
240 | mux { | |
241 | groups = "spdif_out_ao_13"; | |
242 | function = "spdif_out_ao"; | |
243 | }; | |
244 | }; | |
a679f5d2 NA |
245 | |
246 | ao_cec_pins: ao_cec { | |
247 | mux { | |
248 | groups = "ao_cec"; | |
249 | function = "cec_ao"; | |
250 | }; | |
251 | }; | |
252 | ||
253 | ee_cec_pins: ee_cec { | |
254 | mux { | |
255 | groups = "ee_cec"; | |
256 | function = "cec_ao"; | |
257 | }; | |
258 | }; | |
c328666d NA |
259 | }; |
260 | }; | |
261 | ||
8d7c7711 AF |
262 | &apb { |
263 | mali: gpu@c0000 { | |
264 | compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; | |
265 | reg = <0x0 0xc0000 0x0 0x40000>; | |
266 | interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, | |
267 | <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, | |
268 | <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, | |
269 | <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, | |
270 | <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, | |
271 | <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, | |
272 | <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, | |
273 | <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, | |
274 | <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, | |
275 | <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; | |
276 | interrupt-names = "gp", "gpmmu", "pp", "pmu", | |
277 | "pp0", "ppmmu0", "pp1", "ppmmu1", | |
278 | "pp2", "ppmmu2"; | |
279 | clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; | |
280 | clock-names = "bus", "core"; | |
281 | ||
282 | /* | |
283 | * Mali clocking is provided by two identical clock paths | |
284 | * MALI_0 and MALI_1 muxed to a single clock by a glitch | |
285 | * free mux to safely change frequency while running. | |
286 | */ | |
287 | assigned-clocks = <&clkc CLKID_MALI_0_SEL>, | |
288 | <&clkc CLKID_MALI_0>, | |
289 | <&clkc CLKID_MALI>; /* Glitch free mux */ | |
290 | assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, | |
291 | <0>, /* Do Nothing */ | |
292 | <&clkc CLKID_MALI_0>; | |
293 | assigned-clock-rates = <0>, /* Do Nothing */ | |
294 | <666666666>, | |
295 | <0>; /* Do Nothing */ | |
296 | }; | |
297 | }; | |
298 | ||
299 | &cbus { | |
300 | spifc: spi@8c80 { | |
301 | compatible = "amlogic,meson-gxbb-spifc"; | |
302 | reg = <0x0 0x08c80 0x0 0x80>; | |
303 | #address-cells = <1>; | |
304 | #size-cells = <0>; | |
305 | clocks = <&clkc CLKID_SPI>; | |
306 | status = "disabled"; | |
307 | }; | |
308 | }; | |
309 | ||
b16c71c9 NA |
310 | &cec_AO { |
311 | clocks = <&clkc_AO CLKID_AO_CEC_32K>; | |
312 | clock-names = "core"; | |
313 | }; | |
314 | ||
7fd2c355 NA |
315 | &clkc_AO { |
316 | compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc"; | |
317 | }; | |
318 | ||
8d7c7711 AF |
319 | ðmac { |
320 | clocks = <&clkc CLKID_ETH>, | |
321 | <&clkc CLKID_FCLK_DIV2>, | |
322 | <&clkc CLKID_MPLL2>; | |
323 | clock-names = "stmmaceth", "clkin0", "clkin1"; | |
324 | }; | |
325 | ||
9dbb56ea JB |
326 | &gpio_intc { |
327 | compatible = "amlogic,meson-gpio-intc", | |
328 | "amlogic,meson-gxbb-gpio-intc"; | |
329 | status = "okay"; | |
330 | }; | |
331 | ||
8d7c7711 AF |
332 | &hdmi_tx { |
333 | compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; | |
334 | resets = <&reset RESET_HDMITX_CAPB3>, | |
335 | <&reset RESET_HDMI_SYSTEM_RESET>, | |
336 | <&reset RESET_HDMI_TX>; | |
337 | reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; | |
338 | clocks = <&clkc CLKID_HDMI_PCLK>, | |
339 | <&clkc CLKID_CLK81>, | |
340 | <&clkc CLKID_GCLK_VENCI_INT0>; | |
341 | clock-names = "isfr", "iahb", "venci"; | |
342 | }; | |
343 | ||
344 | &hiubus { | |
345 | clkc: clock-controller@0 { | |
346 | compatible = "amlogic,gxbb-clkc"; | |
347 | #clock-cells = <1>; | |
348 | reg = <0x0 0x0 0x0 0x3db>; | |
349 | }; | |
350 | }; | |
351 | ||
352 | &hwrng { | |
353 | clocks = <&clkc CLKID_RNG0>; | |
354 | clock-names = "core"; | |
355 | }; | |
356 | ||
357 | &i2c_A { | |
358 | clocks = <&clkc CLKID_I2C>; | |
359 | }; | |
360 | ||
361 | &i2c_AO { | |
362 | clocks = <&clkc CLKID_AO_I2C>; | |
363 | }; | |
364 | ||
365 | &i2c_B { | |
366 | clocks = <&clkc CLKID_I2C>; | |
367 | }; | |
368 | ||
369 | &i2c_C { | |
370 | clocks = <&clkc CLKID_I2C>; | |
371 | }; | |
372 | ||
c328666d | 373 | &periphs { |
c328666d NA |
374 | pinctrl_periphs: pinctrl@4b0 { |
375 | compatible = "amlogic,meson-gxbb-periphs-pinctrl"; | |
376 | #address-cells = <2>; | |
377 | #size-cells = <2>; | |
378 | ranges; | |
379 | ||
380 | gpio: bank@4b0 { | |
381 | reg = <0x0 0x004b0 0x0 0x28>, | |
382 | <0x0 0x004e8 0x0 0x14>, | |
9ef366a4 | 383 | <0x0 0x00520 0x0 0x14>, |
c328666d NA |
384 | <0x0 0x00430 0x0 0x40>; |
385 | reg-names = "mux", "pull", "pull-enable", "gpio"; | |
386 | gpio-controller; | |
387 | #gpio-cells = <2>; | |
7dbe78e5 | 388 | gpio-ranges = <&pinctrl_periphs 0 0 119>; |
c328666d | 389 | }; |
1befc626 | 390 | |
c328666d NA |
391 | emmc_pins: emmc { |
392 | mux { | |
393 | groups = "emmc_nand_d07", | |
394 | "emmc_cmd", | |
ab36be66 NA |
395 | "emmc_clk"; |
396 | function = "emmc"; | |
397 | }; | |
398 | }; | |
399 | ||
400 | emmc_ds_pins: emmc-ds { | |
401 | mux { | |
402 | groups = "emmc_ds"; | |
c328666d | 403 | function = "emmc"; |
1befc626 | 404 | }; |
c328666d | 405 | }; |
1befc626 | 406 | |
67e7607f JB |
407 | emmc_clk_gate_pins: emmc_clk_gate { |
408 | mux { | |
409 | groups = "BOOT_8"; | |
410 | function = "gpio_periphs"; | |
411 | }; | |
412 | cfg-pull-down { | |
413 | pins = "BOOT_8"; | |
414 | bias-pull-down; | |
415 | }; | |
416 | }; | |
417 | ||
c328666d NA |
418 | nor_pins: nor { |
419 | mux { | |
420 | groups = "nor_d", | |
421 | "nor_q", | |
422 | "nor_c", | |
423 | "nor_cs"; | |
424 | function = "nor"; | |
1befc626 | 425 | }; |
c328666d | 426 | }; |
1befc626 | 427 | |
ec0a8260 NA |
428 | spi_pins: spi { |
429 | mux { | |
430 | groups = "spi_miso", | |
431 | "spi_mosi", | |
432 | "spi_sclk"; | |
433 | function = "spi"; | |
434 | }; | |
435 | }; | |
436 | ||
437 | spi_ss0_pins: spi-ss0 { | |
438 | mux { | |
439 | groups = "spi_ss0"; | |
440 | function = "spi"; | |
441 | }; | |
442 | }; | |
443 | ||
c328666d NA |
444 | sdcard_pins: sdcard { |
445 | mux { | |
446 | groups = "sdcard_d0", | |
447 | "sdcard_d1", | |
448 | "sdcard_d2", | |
449 | "sdcard_d3", | |
450 | "sdcard_cmd", | |
451 | "sdcard_clk"; | |
452 | function = "sdcard"; | |
1befc626 | 453 | }; |
4f24eda8 AF |
454 | }; |
455 | ||
67e7607f JB |
456 | sdcard_clk_gate_pins: sdcard_clk_gate { |
457 | mux { | |
458 | groups = "CARD_2"; | |
459 | function = "gpio_periphs"; | |
460 | }; | |
461 | cfg-pull-down { | |
462 | pins = "CARD_2"; | |
463 | bias-pull-down; | |
464 | }; | |
465 | }; | |
466 | ||
c328666d NA |
467 | sdio_pins: sdio { |
468 | mux { | |
469 | groups = "sdio_d0", | |
470 | "sdio_d1", | |
471 | "sdio_d2", | |
472 | "sdio_d3", | |
473 | "sdio_cmd", | |
474 | "sdio_clk"; | |
475 | function = "sdio"; | |
f40d437f | 476 | }; |
c328666d | 477 | }; |
f40d437f | 478 | |
67e7607f JB |
479 | sdio_clk_gate_pins: sdio_clk_gate { |
480 | mux { | |
481 | groups = "GPIOX_4"; | |
482 | function = "gpio_periphs"; | |
483 | }; | |
484 | cfg-pull-down { | |
485 | pins = "GPIOX_4"; | |
486 | bias-pull-down; | |
487 | }; | |
488 | }; | |
489 | ||
c328666d NA |
490 | sdio_irq_pins: sdio_irq { |
491 | mux { | |
492 | groups = "sdio_irq"; | |
493 | function = "sdio"; | |
f40d437f | 494 | }; |
c328666d | 495 | }; |
f40d437f | 496 | |
c328666d NA |
497 | uart_a_pins: uart_a { |
498 | mux { | |
499 | groups = "uart_tx_a", | |
500 | "uart_rx_a"; | |
501 | function = "uart_a"; | |
4f24eda8 | 502 | }; |
c328666d | 503 | }; |
c58d7785 | 504 | |
261e1d5c MB |
505 | uart_a_cts_rts_pins: uart_a_cts_rts { |
506 | mux { | |
507 | groups = "uart_cts_a", | |
508 | "uart_rts_a"; | |
509 | function = "uart_a"; | |
510 | }; | |
511 | }; | |
512 | ||
c328666d NA |
513 | uart_b_pins: uart_b { |
514 | mux { | |
515 | groups = "uart_tx_b", | |
516 | "uart_rx_b"; | |
517 | function = "uart_b"; | |
c58d7785 | 518 | }; |
c328666d | 519 | }; |
8f14a893 | 520 | |
261e1d5c MB |
521 | uart_b_cts_rts_pins: uart_b_cts_rts { |
522 | mux { | |
523 | groups = "uart_cts_b", | |
524 | "uart_rts_b"; | |
525 | function = "uart_b"; | |
526 | }; | |
527 | }; | |
528 | ||
c328666d NA |
529 | uart_c_pins: uart_c { |
530 | mux { | |
531 | groups = "uart_tx_c", | |
532 | "uart_rx_c"; | |
533 | function = "uart_c"; | |
8f14a893 | 534 | }; |
c328666d | 535 | }; |
1befc626 | 536 | |
261e1d5c MB |
537 | uart_c_cts_rts_pins: uart_c_cts_rts { |
538 | mux { | |
539 | groups = "uart_cts_c", | |
540 | "uart_rts_c"; | |
541 | function = "uart_c"; | |
542 | }; | |
543 | }; | |
544 | ||
c328666d NA |
545 | i2c_a_pins: i2c_a { |
546 | mux { | |
547 | groups = "i2c_sck_a", | |
548 | "i2c_sda_a"; | |
549 | function = "i2c_a"; | |
1befc626 | 550 | }; |
4f24eda8 AF |
551 | }; |
552 | ||
c328666d NA |
553 | i2c_b_pins: i2c_b { |
554 | mux { | |
555 | groups = "i2c_sck_b", | |
556 | "i2c_sda_b"; | |
557 | function = "i2c_b"; | |
558 | }; | |
559 | }; | |
f40d437f | 560 | |
c328666d NA |
561 | i2c_c_pins: i2c_c { |
562 | mux { | |
563 | groups = "i2c_sck_c", | |
564 | "i2c_sda_c"; | |
565 | function = "i2c_c"; | |
4b7bed38 | 566 | }; |
c328666d | 567 | }; |
4b7bed38 | 568 | |
3be2d9cf | 569 | eth_rgmii_pins: eth-rgmii { |
c328666d NA |
570 | mux { |
571 | groups = "eth_mdio", | |
572 | "eth_mdc", | |
573 | "eth_clk_rx_clk", | |
574 | "eth_rx_dv", | |
575 | "eth_rxd0", | |
576 | "eth_rxd1", | |
577 | "eth_rxd2", | |
578 | "eth_rxd3", | |
579 | "eth_rgmii_tx_clk", | |
580 | "eth_tx_en", | |
581 | "eth_txd0", | |
582 | "eth_txd1", | |
583 | "eth_txd2", | |
584 | "eth_txd3"; | |
585 | function = "eth"; | |
f40d437f | 586 | }; |
fab6b48c CC |
587 | }; |
588 | ||
3be2d9cf NA |
589 | eth_rmii_pins: eth-rmii { |
590 | mux { | |
591 | groups = "eth_mdio", | |
592 | "eth_mdc", | |
593 | "eth_clk_rx_clk", | |
594 | "eth_rx_dv", | |
595 | "eth_rxd0", | |
596 | "eth_rxd1", | |
597 | "eth_tx_en", | |
598 | "eth_txd0", | |
599 | "eth_txd1"; | |
600 | function = "eth"; | |
601 | }; | |
602 | }; | |
603 | ||
c328666d NA |
604 | pwm_a_x_pins: pwm_a_x { |
605 | mux { | |
606 | groups = "pwm_a_x"; | |
607 | function = "pwm_a_x"; | |
608 | }; | |
609 | }; | |
ba6a6c7f | 610 | |
c328666d NA |
611 | pwm_a_y_pins: pwm_a_y { |
612 | mux { | |
613 | groups = "pwm_a_y"; | |
614 | function = "pwm_a_y"; | |
ba6a6c7f | 615 | }; |
c328666d | 616 | }; |
7b5682c6 | 617 | |
c328666d NA |
618 | pwm_b_pins: pwm_b { |
619 | mux { | |
620 | groups = "pwm_b"; | |
621 | function = "pwm_b"; | |
7b5682c6 | 622 | }; |
fab6b48c CC |
623 | }; |
624 | ||
c328666d NA |
625 | pwm_d_pins: pwm_d { |
626 | mux { | |
627 | groups = "pwm_d"; | |
628 | function = "pwm_d"; | |
629 | }; | |
4f24eda8 | 630 | }; |
8c5509f0 | 631 | |
c328666d NA |
632 | pwm_e_pins: pwm_e { |
633 | mux { | |
634 | groups = "pwm_e"; | |
635 | function = "pwm_e"; | |
636 | }; | |
566603e5 MB |
637 | }; |
638 | ||
c328666d NA |
639 | pwm_f_x_pins: pwm_f_x { |
640 | mux { | |
641 | groups = "pwm_f_x"; | |
642 | function = "pwm_f_x"; | |
643 | }; | |
566603e5 MB |
644 | }; |
645 | ||
c328666d NA |
646 | pwm_f_y_pins: pwm_f_y { |
647 | mux { | |
648 | groups = "pwm_f_y"; | |
649 | function = "pwm_f_y"; | |
650 | }; | |
8c5509f0 | 651 | }; |
b949165c NA |
652 | |
653 | hdmi_hpd_pins: hdmi_hpd { | |
654 | mux { | |
655 | groups = "hdmi_hpd"; | |
656 | function = "hdmi_hpd"; | |
657 | }; | |
658 | }; | |
659 | ||
660 | hdmi_i2c_pins: hdmi_i2c { | |
661 | mux { | |
662 | groups = "hdmi_sda", "hdmi_scl"; | |
663 | function = "hdmi_i2c"; | |
664 | }; | |
665 | }; | |
552b1e56 | 666 | |
667 | i2sout_ch23_y_pins: i2sout_ch23_y { | |
668 | mux { | |
669 | groups = "i2sout_ch23_y"; | |
670 | function = "i2s_out"; | |
671 | }; | |
672 | }; | |
673 | ||
674 | i2sout_ch45_y_pins: i2sout_ch45_y { | |
675 | mux { | |
676 | groups = "i2sout_ch45_y"; | |
677 | function = "i2s_out"; | |
678 | }; | |
679 | }; | |
680 | ||
681 | i2sout_ch67_y_pins: i2sout_ch67_y { | |
682 | mux { | |
683 | groups = "i2sout_ch67_y"; | |
684 | function = "i2s_out"; | |
685 | }; | |
686 | }; | |
07a4652f | 687 | |
688 | spdif_out_y_pins: spdif_out_y { | |
689 | mux { | |
690 | groups = "spdif_out_y"; | |
691 | function = "spdif_out"; | |
692 | }; | |
693 | }; | |
4f24eda8 AF |
694 | }; |
695 | }; | |
c328666d | 696 | |
bd80ef5e MB |
697 | &saradc { |
698 | compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc"; | |
699 | clocks = <&xtal>, | |
700 | <&clkc CLKID_SAR_ADC>, | |
701 | <&clkc CLKID_SANA>, | |
702 | <&clkc CLKID_SAR_ADC_CLK>, | |
703 | <&clkc CLKID_SAR_ADC_SEL>; | |
704 | clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel"; | |
705 | }; | |
706 | ||
ef8d2ffe KH |
707 | &sd_emmc_a { |
708 | clocks = <&clkc CLKID_SD_EMMC_A>, | |
50662499 | 709 | <&clkc CLKID_SD_EMMC_A_CLK0>, |
ef8d2ffe KH |
710 | <&clkc CLKID_FCLK_DIV2>; |
711 | clock-names = "core", "clkin0", "clkin1"; | |
712 | }; | |
713 | ||
714 | &sd_emmc_b { | |
715 | clocks = <&clkc CLKID_SD_EMMC_B>, | |
50662499 | 716 | <&clkc CLKID_SD_EMMC_B_CLK0>, |
ef8d2ffe KH |
717 | <&clkc CLKID_FCLK_DIV2>; |
718 | clock-names = "core", "clkin0", "clkin1"; | |
719 | }; | |
720 | ||
721 | &sd_emmc_c { | |
722 | clocks = <&clkc CLKID_SD_EMMC_C>, | |
50662499 | 723 | <&clkc CLKID_SD_EMMC_C_CLK0>, |
ef8d2ffe KH |
724 | <&clkc CLKID_FCLK_DIV2>; |
725 | clock-names = "core", "clkin0", "clkin1"; | |
726 | }; | |
fafdbdf7 | 727 | |
fa808631 NA |
728 | &spicc { |
729 | clocks = <&clkc CLKID_SPICC>; | |
730 | clock-names = "core"; | |
731 | resets = <&reset RESET_PERIPHS_SPICC>; | |
732 | num-cs = <1>; | |
733 | }; | |
734 | ||
04b36df4 NA |
735 | &spifc { |
736 | clocks = <&clkc CLKID_SPI>; | |
737 | }; | |
738 | ||
f72d6f60 HK |
739 | &uart_A { |
740 | clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; | |
741 | clock-names = "xtal", "pclk", "baud"; | |
742 | }; | |
743 | ||
744 | &uart_AO { | |
745 | clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; | |
746 | clock-names = "xtal", "pclk", "baud"; | |
747 | }; | |
748 | ||
749 | &uart_AO_B { | |
750 | clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; | |
751 | clock-names = "xtal", "pclk", "baud"; | |
752 | }; | |
753 | ||
754 | &uart_B { | |
755 | clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; | |
39005e56 | 756 | clock-names = "xtal", "pclk", "baud"; |
f72d6f60 HK |
757 | }; |
758 | ||
759 | &uart_C { | |
760 | clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>; | |
39005e56 | 761 | clock-names = "xtal", "pclk", "baud"; |
f72d6f60 HK |
762 | }; |
763 | ||
fafdbdf7 NA |
764 | &vpu { |
765 | compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; | |
766 | }; |