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Merge tag 'efi-urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi into...
[mirror_ubuntu-artful-kernel.git] / arch / arm64 / boot / dts / exynos / exynos5433-tm2-common.dtsi
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83089bb9
AS		 1/*
2 * SAMSUNG Exynos5433 TM2 board device tree source
3 *
4 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
5 *
6 * Common device tree source file for Samsung's TM2 and TM2E boards
7 * which are based on Samsung Exynos5433 SoC.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14/dts-v1/;
15#include "exynos5433.dtsi"
16#include <dt-bindings/clock/samsung,s2mps11.h>
17#include <dt-bindings/gpio/gpio.h>
18#include <dt-bindings/input/input.h>
19#include <dt-bindings/interrupt-controller/irq.h>
20
21/ {
22 aliases {
23 gsc0 = &gsc_0;
24 gsc1 = &gsc_1;
25 gsc2 = &gsc_2;
26 pinctrl0 = &pinctrl_alive;
27 pinctrl1 = &pinctrl_aud;
28 pinctrl2 = &pinctrl_cpif;
29 pinctrl3 = &pinctrl_ese;
30 pinctrl4 = &pinctrl_finger;
31 pinctrl5 = &pinctrl_fsys;
32 pinctrl6 = &pinctrl_imem;
33 pinctrl7 = &pinctrl_nfc;
34 pinctrl8 = &pinctrl_peric;
35 pinctrl9 = &pinctrl_touch;
36 serial0 = &serial_0;
37 serial1 = &serial_1;
38 serial2 = &serial_2;
39 serial3 = &serial_3;
40 spi0 = &spi_0;
41 spi1 = &spi_1;
42 spi2 = &spi_2;
43 spi3 = &spi_3;
44 spi4 = &spi_4;
45 mshc0 = &mshc_0;
46 mshc2 = &mshc_2;
47 };
48
49 chosen {
50 stdout-path = &serial_1;
51 };
52
53 memory@20000000 {
54 device_type = "memory";
55 reg = <0x0 0x20000000 0x0 0xc0000000>;
56 };
57
58 gpio-keys {
59 compatible = "gpio-keys";
60
61 power-key {
62 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
63 linux,code = <KEY_POWER>;
64 label = "power key";
65 debounce-interval = <10>;
66 };
67
68 volume-up-key {
69 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
70 linux,code = <KEY_VOLUMEUP>;
71 label = "volume-up key";
72 debounce-interval = <10>;
73 };
74
75 volume-down-key {
76 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
77 linux,code = <KEY_VOLUMEDOWN>;
78 label = "volume-down key";
79 debounce-interval = <10>;
80 };
81
82 homepage-key {
83 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
84 linux,code = <KEY_MENU>;
85 label = "homepage key";
86 debounce-interval = <10>;
87 };
88 };
89
90 i2c_max98504: i2c-gpio-0 {
91 compatible = "i2c-gpio";
92 gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
93 &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
94 i2c-gpio,delay-us = <2>;
95 #address-cells = <1>;
96 #size-cells = <0>;
97 status = "okay";
98
99 max98504: max98504@31 {
100 compatible = "maxim,max98504";
101 reg = <0x31>;
102 maxim,rx-path = <1>;
103 maxim,tx-path = <1>;
104 maxim,tx-channel-mask = <3>;
105 maxim,tx-channel-source = <2>;
106 };
107 };
108
109 sound {
110 compatible = "samsung,tm2-audio";
111 audio-codec = <&wm5110>;
112 i2s-controller = <&i2s0>;
113 audio-amplifier = <&max98504>;
114 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
115 model = "wm5110";
116 samsung,audio-routing =
117 /* Headphone */
118 "HP", "HPOUT1L",
119 "HP", "HPOUT1R",
120
121 /* Speaker */
122 "SPK", "SPKOUT",
123 "SPKOUT", "HPOUT2L",
124 "SPKOUT", "HPOUT2R",
125
126 /* Receiver */
127 "RCV", "HPOUT3L",
128 "RCV", "HPOUT3R";
129 status = "okay";
130 };
131};
132
133&adc {
134 vdd-supply = <&ldo3_reg>;
135 status = "okay";
136
137 thermistor-ap {
138 compatible = "murata,ncp03wf104";
139 pullup-uv = <1800000>;
140 pullup-ohm = <100000>;
141 pulldown-ohm = <0>;
142 io-channels = <&adc 0>;
143 };
144
145 thermistor-battery {
146 compatible = "murata,ncp03wf104";
147 pullup-uv = <1800000>;
148 pullup-ohm = <100000>;
149 pulldown-ohm = <0>;
150 io-channels = <&adc 1>;
151 #thermal-sensor-cells = <0>;
152 };
153
154 thermistor-charger {
155 compatible = "murata,ncp03wf104";
156 pullup-uv = <1800000>;
157 pullup-ohm = <100000>;
158 pulldown-ohm = <0>;
159 io-channels = <&adc 2>;
160 };
161};
162
163&bus_g2d_400 {
164 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
165 vdd-supply = <&buck4_reg>;
166 exynos,saturation-ratio = <10>;
167 status = "okay";
168};
169
170&bus_g2d_266 {
171 devfreq = <&bus_g2d_400>;
172 status = "okay";
173};
174
175&bus_gscl {
176 devfreq = <&bus_g2d_400>;
177 status = "okay";
178};
179
180&bus_hevc {
181 devfreq = <&bus_g2d_400>;
182 status = "okay";
183};
184
185&bus_jpeg {
186 devfreq = <&bus_g2d_400>;
187 status = "okay";
188};
189
190&bus_mfc {
191 devfreq = <&bus_g2d_400>;
192 status = "okay";
193};
194
195&bus_mscl {
196 devfreq = <&bus_g2d_400>;
197 status = "okay";
198};
199
200&bus_noc0 {
201 devfreq = <&bus_g2d_400>;
202 status = "okay";
203};
204
205&bus_noc1 {
206 devfreq = <&bus_g2d_400>;
207 status = "okay";
208};
209
210&bus_noc2 {
211 devfreq = <&bus_g2d_400>;
212 status = "okay";
213};
214
215&cmu_aud {
216 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
217 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
218};
219
220&cmu_fsys {
221 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
222 <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
223 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
224 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
225 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
226 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
227 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
228 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
229 <&cmu_top CLK_DIV_SCLK_USBDRD30>,
230 <&cmu_top CLK_DIV_SCLK_USBHOST30>;
231 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
232 <&cmu_top CLK_MOUT_BUS_PLL_USER>,
233 <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
234 <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
235 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
236 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
237 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
238 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
239 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
240 <66700000>, <66700000>;
241};
242
243&cmu_gscl {
244 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
245 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
246 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
247 <&cmu_top CLK_ACLK_GSCL_333>;
248};
249
250&cmu_mfc {
251 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
252 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
253};
254
255&cmu_mscl {
256 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
257 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
258 <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
259 <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
260 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
261 <&cmu_top CLK_SCLK_JPEG_MSCL>,
262 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
263 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
264};
265
266&cpu0 {
267 cpu-supply = <&buck3_reg>;
268};
269
270&cpu4 {
271 cpu-supply = <&buck2_reg>;
272};
273
274&decon {
275 status = "okay";
276
277 i80-if-timings {
278 };
279};
280
e4e38113
AH		 281&decon_tv {
282 status = "okay";
283
284 ports {
285 #address-cells = <1>;
286 #size-cells = <0>;
287
288 port@0 {
289 reg = <0>;
290 tv_to_hdmi: endpoint {
291 remote-endpoint = <&hdmi_to_tv>;
292 };
293 };
294 };
295};
296
83089bb9
AS		 297&dsi {
298 status = "okay";
299 vddcore-supply = <&ldo6_reg>;
300 vddio-supply = <&ldo7_reg>;
301 samsung,pll-clock-frequency = <24000000>;
302 pinctrl-names = "default";
303 pinctrl-0 = <&te_irq>;
304
305 ports {
306 #address-cells = <1>;
307 #size-cells = <0>;
308
309 port@1 {
310 reg = <1>;
311
312 dsi_out: endpoint {
313 samsung,burst-clock-frequency = <512000000>;
314 samsung,esc-clock-frequency = <16000000>;
315 };
316 };
317 };
318};
319
e4e38113
AH		 320&hdmi {
321 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
322 status = "okay";
323 vdd-supply = <&ldo6_reg>;
324 vdd_osc-supply = <&ldo7_reg>;
325 vdd_pll-supply = <&ldo6_reg>;
326
327 ports {
328 #address-cells = <1>;
329 #size-cells = <0>;
330
331 port@0 {
332 reg = <0>;
333 hdmi_to_tv: endpoint {
334 remote-endpoint = <&tv_to_hdmi>;
335 };
336 };
337
338 port@1 {
339 reg = <1>;
340 hdmi_to_mhl: endpoint {
341 remote-endpoint = <&mhl_to_hdmi>;
342 };
343 };
344 };
345};
346
83089bb9
AS		 347&hsi2c_0 {
348 status = "okay";
349 clock-frequency = <2500000>;
350
351 s2mps13-pmic@66 {
352 compatible = "samsung,s2mps13-pmic";
353 interrupt-parent = <&gpa0>;
354 interrupts = <7 IRQ_TYPE_NONE>;
355 reg = <0x66>;
356 samsung,s2mps11-wrstbi-ground;
357
358 s2mps13_osc: clocks {
359 compatible = "samsung,s2mps13-clk";
360 #clock-cells = <1>;
361 clock-output-names = "s2mps13_ap", "s2mps13_cp",
362 "s2mps13_bt";
363 };
364
365 regulators {
366 ldo1_reg: LDO1 {
367 regulator-name = "VDD_ALIVE_0.9V_AP";
368 regulator-min-microvolt = <900000>;
369 regulator-max-microvolt = <900000>;
370 regulator-always-on;
371 };
372
373 ldo2_reg: LDO2 {
374 regulator-name = "VDDQ_MMC2_2.8V_AP";
375 regulator-min-microvolt = <2800000>;
376 regulator-max-microvolt = <2800000>;
377 regulator-always-on;
378 regulator-state-mem {
379 regulator-off-in-suspend;
380 };
381 };
382
383 ldo3_reg: LDO3 {
384 regulator-name = "VDD1_E_1.8V_AP";
385 regulator-min-microvolt = <1800000>;
386 regulator-max-microvolt = <1800000>;
387 regulator-always-on;
388 };
389
390 ldo4_reg: LDO4 {
391 regulator-name = "VDD10_MIF_PLL_1.0V_AP";
392 regulator-min-microvolt = <1300000>;
393 regulator-max-microvolt = <1300000>;
394 regulator-always-on;
395 regulator-state-mem {
396 regulator-off-in-suspend;
397 };
398 };
399
400 ldo5_reg: LDO5 {
401 regulator-name = "VDD10_DPLL_1.0V_AP";
402 regulator-min-microvolt = <1000000>;
403 regulator-max-microvolt = <1000000>;
404 regulator-always-on;
405 regulator-state-mem {
406 regulator-off-in-suspend;
407 };
408 };
409
410 ldo6_reg: LDO6 {
411 regulator-name = "VDD10_MIPI2L_1.0V_AP";
412 regulator-min-microvolt = <1000000>;
413 regulator-max-microvolt = <1000000>;
414 regulator-state-mem {
415 regulator-off-in-suspend;
416 };
417 };
418
419 ldo7_reg: LDO7 {
420 regulator-name = "VDD18_MIPI2L_1.8V_AP";
421 regulator-min-microvolt = <1800000>;
422 regulator-max-microvolt = <1800000>;
6c992d35
AH		 423 regulator-always-on;
424 regulator-state-mem {
425 regulator-off-in-suspend;
426 };
83089bb9
AS		 427 };
428
429 ldo8_reg: LDO8 {
430 regulator-name = "VDD18_LLI_1.8V_AP";
431 regulator-min-microvolt = <1800000>;
432 regulator-max-microvolt = <1800000>;
433 regulator-always-on;
434 regulator-state-mem {
435 regulator-off-in-suspend;
436 };
437 };
438
439 ldo9_reg: LDO9 {
440 regulator-name = "VDD18_ABB_ETC_1.8V_AP";
441 regulator-min-microvolt = <1800000>;
442 regulator-max-microvolt = <1800000>;
443 regulator-always-on;
444 regulator-state-mem {
445 regulator-off-in-suspend;
446 };
447 };
448
449 ldo10_reg: LDO10 {
450 regulator-name = "VDD33_USB30_3.0V_AP";
451 regulator-min-microvolt = <3000000>;
452 regulator-max-microvolt = <3000000>;
453 regulator-state-mem {
454 regulator-off-in-suspend;
455 };
456 };
457
458 ldo11_reg: LDO11 {
459 regulator-name = "VDD_INT_M_1.0V_AP";
460 regulator-min-microvolt = <1000000>;
461 regulator-max-microvolt = <1000000>;
462 regulator-always-on;
463 regulator-state-mem {
464 regulator-off-in-suspend;
465 };
466 };
467
468 ldo12_reg: LDO12 {
469 regulator-name = "VDD_KFC_M_1.1V_AP";
470 regulator-min-microvolt = <800000>;
471 regulator-max-microvolt = <1350000>;
472 regulator-always-on;
473 };
474
475 ldo13_reg: LDO13 {
476 regulator-name = "VDD_G3D_M_0.95V_AP";
477 regulator-min-microvolt = <950000>;
478 regulator-max-microvolt = <950000>;
479 regulator-always-on;
480 regulator-state-mem {
481 regulator-off-in-suspend;
482 };
483 };
484
485 ldo14_reg: LDO14 {
486 regulator-name = "VDDQ_M1_LDO_1.2V_AP";
487 regulator-min-microvolt = <1200000>;
488 regulator-max-microvolt = <1200000>;
489 regulator-always-on;
490 regulator-state-mem {
491 regulator-off-in-suspend;
492 };
493 };
494
495 ldo15_reg: LDO15 {
496 regulator-name = "VDDQ_M2_LDO_1.2V_AP";
497 regulator-min-microvolt = <1200000>;
498 regulator-max-microvolt = <1200000>;
499 regulator-always-on;
500 regulator-state-mem {
501 regulator-off-in-suspend;
502 };
503 };
504
505 ldo16_reg: LDO16 {
506 regulator-name = "VDDQ_EFUSE";
507 regulator-min-microvolt = <1400000>;
508 regulator-max-microvolt = <3400000>;
509 regulator-always-on;
510 };
511
512 ldo17_reg: LDO17 {
513 regulator-name = "V_TFLASH_2.8V_AP";
514 regulator-min-microvolt = <2800000>;
515 regulator-max-microvolt = <2800000>;
516 };
517
518 ldo18_reg: LDO18 {
519 regulator-name = "V_CODEC_1.8V_AP";
520 regulator-min-microvolt = <1800000>;
521 regulator-max-microvolt = <1800000>;
522 };
523
524 ldo19_reg: LDO19 {
525 regulator-name = "VDDA_1.8V_COMP";
526 regulator-min-microvolt = <1800000>;
527 regulator-max-microvolt = <1800000>;
528 regulator-always-on;
529 };
530
531 ldo20_reg: LDO20 {
532 regulator-name = "VCC_2.8V_AP";
533 regulator-min-microvolt = <2800000>;
534 regulator-max-microvolt = <2800000>;
535 regulator-always-on;
536 };
537
538 ldo21_reg: LDO21 {
539 regulator-name = "VT_CAM_1.8V";
540 regulator-min-microvolt = <1800000>;
541 regulator-max-microvolt = <1800000>;
542 };
543
544 ldo22_reg: LDO22 {
545 regulator-name = "CAM_IO_1.8V_AP";
546 regulator-min-microvolt = <1800000>;
547 regulator-max-microvolt = <1800000>;
548 };
549
550 ldo23_reg: LDO23 {
551 regulator-name = "CAM_SEN_CORE_1.05V_AP";
552 regulator-min-microvolt = <1050000>;
553 regulator-max-microvolt = <1050000>;
554 };
555
556 ldo24_reg: LDO24 {
557 regulator-name = "VT_CAM_1.2V";
558 regulator-min-microvolt = <1200000>;
559 regulator-max-microvolt = <1200000>;
560 };
561
562 ldo25_reg: LDO25 {
563 regulator-name = "UNUSED_LDO25";
564 regulator-min-microvolt = <2800000>;
565 regulator-max-microvolt = <2800000>;
566 };
567
568 ldo26_reg: LDO26 {
569 regulator-name = "CAM_AF_2.8V_AP";
570 regulator-min-microvolt = <2800000>;
571 regulator-max-microvolt = <2800000>;
572 };
573
574 ldo27_reg: LDO27 {
575 regulator-name = "VCC_3.0V_LCD_AP";
576 regulator-min-microvolt = <3000000>;
577 regulator-max-microvolt = <3000000>;
578 };
579
580 ldo28_reg: LDO28 {
581 regulator-name = "VCC_1.8V_LCD_AP";
582 regulator-min-microvolt = <1800000>;
583 regulator-max-microvolt = <1800000>;
584 };
585
586 ldo29_reg: LDO29 {
587 regulator-name = "VT_CAM_2.8V";
588 regulator-min-microvolt = <3000000>;
589 regulator-max-microvolt = <3000000>;
590 };
591
592 ldo30_reg: LDO30 {
593 regulator-name = "TSP_AVDD_3.3V_AP";
594 regulator-min-microvolt = <3300000>;
595 regulator-max-microvolt = <3300000>;
596 };
597
598 ldo31_reg: LDO31 {
599 /*
600 * LDO31 differs from target to target,
601 * its definition is in the .dts
602 */
603 };
604
605 ldo32_reg: LDO32 {
606 regulator-name = "VTOUCH_1.8V_AP";
607 regulator-min-microvolt = <1800000>;
608 regulator-max-microvolt = <1800000>;
609 };
610
611 ldo33_reg: LDO33 {
612 regulator-name = "VTOUCH_LED_3.3V";
613 regulator-min-microvolt = <2500000>;
614 regulator-max-microvolt = <3300000>;
615 regulator-ramp-delay = <12500>;
616 };
617
618 ldo34_reg: LDO34 {
619 regulator-name = "VCC_1.8V_MHL_AP";
620 regulator-min-microvolt = <1000000>;
621 regulator-max-microvolt = <2100000>;
622 };
623
624 ldo35_reg: LDO35 {
625 regulator-name = "OIS_VM_2.8V";
626 regulator-min-microvolt = <1800000>;
627 regulator-max-microvolt = <2800000>;
628 };
629
630 ldo36_reg: LDO36 {
631 regulator-name = "VSIL_1.0V";
632 regulator-min-microvolt = <1000000>;
633 regulator-max-microvolt = <1000000>;
634 };
635
636 ldo37_reg: LDO37 {
637 regulator-name = "VF_1.8V";
638 regulator-min-microvolt = <1800000>;
639 regulator-max-microvolt = <1800000>;
640 };
641
642 ldo38_reg: LDO38 {
643 /*
644 * LDO38 differs from target to target,
645 * its definition is in the .dts
646 */
647 };
648
649 ldo39_reg: LDO39 {
650 regulator-name = "V_HRM_1.8V";
651 regulator-min-microvolt = <1800000>;
652 regulator-max-microvolt = <1800000>;
653 };
654
655 ldo40_reg: LDO40 {
656 regulator-name = "V_HRM_3.3V";
657 regulator-min-microvolt = <3300000>;
658 regulator-max-microvolt = <3300000>;
659 };
660
661 buck1_reg: BUCK1 {
662 regulator-name = "VDD_MIF_0.9V_AP";
663 regulator-min-microvolt = <600000>;
664 regulator-max-microvolt = <1500000>;
665 regulator-always-on;
666 regulator-state-mem {
667 regulator-off-in-suspend;
668 };
669 };
670
671 buck2_reg: BUCK2 {
672 regulator-name = "VDD_EGL_1.0V_AP";
673 regulator-min-microvolt = <900000>;
674 regulator-max-microvolt = <1300000>;
675 regulator-always-on;
676 regulator-state-mem {
677 regulator-off-in-suspend;
678 };
679 };
680
681 buck3_reg: BUCK3 {
682 regulator-name = "VDD_KFC_1.0V_AP";
683 regulator-min-microvolt = <800000>;
684 regulator-max-microvolt = <1200000>;
685 regulator-always-on;
686 regulator-state-mem {
687 regulator-off-in-suspend;
688 };
689 };
690
691 buck4_reg: BUCK4 {
692 regulator-name = "VDD_INT_0.95V_AP";
693 regulator-min-microvolt = <600000>;
694 regulator-max-microvolt = <1500000>;
695 regulator-always-on;
696 regulator-state-mem {
697 regulator-off-in-suspend;
698 };
699 };
700
701 buck5_reg: BUCK5 {
702 regulator-name = "VDD_DISP_CAM0_0.9V_AP";
703 regulator-min-microvolt = <600000>;
704 regulator-max-microvolt = <1500000>;
705 regulator-always-on;
706 regulator-state-mem {
707 regulator-off-in-suspend;
708 };
709 };
710
711 buck6_reg: BUCK6 {
712 regulator-name = "VDD_G3D_0.9V_AP";
713 regulator-min-microvolt = <600000>;
714 regulator-max-microvolt = <1500000>;
715 regulator-always-on;
716 regulator-state-mem {
717 regulator-off-in-suspend;
718 };
719 };
720
721 buck7_reg: BUCK7 {
722 regulator-name = "VDD_MEM1_1.2V_AP";
723 regulator-min-microvolt = <1200000>;
724 regulator-max-microvolt = <1200000>;
725 regulator-always-on;
726 };
727
728 buck8_reg: BUCK8 {
729 regulator-name = "VDD_LLDO_1.35V_AP";
730 regulator-min-microvolt = <1350000>;
731 regulator-max-microvolt = <3300000>;
732 regulator-always-on;
733 };
734
735 buck9_reg: BUCK9 {
736 regulator-name = "VDD_MLDO_2.0V_AP";
737 regulator-min-microvolt = <1350000>;
738 regulator-max-microvolt = <3300000>;
739 regulator-always-on;
740 };
741
742 buck10_reg: BUCK10 {
743 regulator-name = "vdd_mem2";
744 regulator-min-microvolt = <550000>;
745 regulator-max-microvolt = <1500000>;
746 regulator-always-on;
747 };
748 };
749 };
750};
751
e4e38113
AH		 752&hsi2c_7 {
753 status = "okay";
754
755 sii8620@39 {
756 reg = <0x39>;
757 compatible = "sil,sii8620";
758 cvcc10-supply = <&ldo36_reg>;
759 iovcc18-supply = <&ldo34_reg>;
760 interrupt-parent = <&gpf0>;
761 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
762 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
763 clocks = <&pmu_system_controller 0>;
764 clock-names = "xtal";
765
766 port {
767 mhl_to_hdmi: endpoint {
768 remote-endpoint = <&hdmi_to_mhl>;
769 };
770 };
771 };
772};
773
83089bb9
AS		 774&hsi2c_8 {
775 status = "okay";
776
777 max77843@66 {
778 compatible = "maxim,max77843";
779 interrupt-parent = <&gpa1>;
780 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
781 reg = <0x66>;
782
783 muic: max77843-muic {
784 compatible = "maxim,max77843-muic";
785 };
786
787 regulators {
788 compatible = "maxim,max77843-regulator";
789 safeout1_reg: SAFEOUT1 {
790 regulator-name = "SAFEOUT1";
791 regulator-min-microvolt = <3300000>;
792 regulator-max-microvolt = <4950000>;
793 };
794
795 safeout2_reg: SAFEOUT2 {
796 regulator-name = "SAFEOUT2";
797 regulator-min-microvolt = <3300000>;
798 regulator-max-microvolt = <4950000>;
799 };
800
801 charger_reg: CHARGER {
802 regulator-name = "CHARGER";
803 regulator-min-microamp = <100000>;
804 regulator-max-microamp = <3150000>;
805 };
806 };
807
808 haptic: max77843-haptic {
809 compatible = "maxim,max77843-haptic";
810 haptic-supply = <&ldo38_reg>;
811 pwms = <&pwm 0 33670 0>;
812 pwm-names = "haptic";
813 };
814 };
815};
816
e4e38113
AH		 817&hsi2c_11 {
818 status = "okay";
819};
820
83089bb9
AS		 821&i2s0 {
822 status = "okay";
823};
824
825&mshc_0 {
826 status = "okay";
827 num-slots = <1>;
828 mmc-hs200-1_8v;
829 mmc-hs400-1_8v;
830 cap-mmc-highspeed;
831 non-removable;
832 card-detect-delay = <200>;
833 samsung,dw-mshc-ciu-div = <3>;
834 samsung,dw-mshc-sdr-timing = <0 4>;
835 samsung,dw-mshc-ddr-timing = <0 2>;
836 samsung,dw-mshc-hs400-timing = <0 3>;
837 samsung,read-strobe-delay = <90>;
838 fifo-depth = <0x80>;
839 pinctrl-names = "default";
840 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
841 &sd0_bus8 &sd0_rdqs>;
842 bus-width = <8>;
843 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
844 assigned-clock-rates = <800000000>;
845};
846
847&mshc_2 {
848 status = "okay";
849 num-slots = <1>;
850 cap-sd-highspeed;
851 disable-wp;
852 cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;
853 cd-inverted;
854 card-detect-delay = <200>;
855 samsung,dw-mshc-ciu-div = <3>;
856 samsung,dw-mshc-sdr-timing = <0 4>;
857 samsung,dw-mshc-ddr-timing = <0 2>;
858 fifo-depth = <0x80>;
859 pinctrl-names = "default";
860 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
861 bus-width = <4>;
862};
863
864&ppmu_d0_general {
865 status = "okay";
866 events {
867 ppmu_event0_d0_general: ppmu-event0-d0-general {
868 event-name = "ppmu-event0-d0-general";
869 };
870 };
871};
872
873&ppmu_d1_general {
874 status = "okay";
875 events {
876 ppmu_event0_d1_general: ppmu-event0-d1-general {
877 event-name = "ppmu-event0-d1-general";
878 };
879 };
880};
881
882&pinctrl_alive {
883 pinctrl-names = "default";
884 pinctrl-0 = <&initial_alive>;
885
886 initial_alive: initial-state {
887 PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
888 PIN(INPUT, gpa0-1, NONE, FAST_SR1);
889 PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
890 PIN(INPUT, gpa0-3, NONE, FAST_SR1);
891 PIN(INPUT, gpa0-4, NONE, FAST_SR1);
892 PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
893 PIN(INPUT, gpa0-6, NONE, FAST_SR1);
894 PIN(INPUT, gpa0-7, NONE, FAST_SR1);
895
896 PIN(INPUT, gpa1-0, UP, FAST_SR1);
897 PIN(INPUT, gpa1-1, NONE, FAST_SR1);
898 PIN(INPUT, gpa1-2, NONE, FAST_SR1);
899 PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
900 PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
901 PIN(INPUT, gpa1-5, NONE, FAST_SR1);
902 PIN(INPUT, gpa1-6, NONE, FAST_SR1);
903 PIN(INPUT, gpa1-7, NONE, FAST_SR1);
904
905 PIN(INPUT, gpa2-0, NONE, FAST_SR1);
906 PIN(INPUT, gpa2-1, NONE, FAST_SR1);
907 PIN(INPUT, gpa2-2, NONE, FAST_SR1);
908 PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
909 PIN(INPUT, gpa2-4, NONE, FAST_SR1);
910 PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
911 PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
912 PIN(INPUT, gpa2-7, NONE, FAST_SR1);
913
914 PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
915 PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
916 PIN(INPUT, gpa3-2, NONE, FAST_SR1);
917 PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
918 PIN(INPUT, gpa3-4, NONE, FAST_SR1);
919 PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
920 PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
921 PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
922
923 PIN(INPUT, gpf1-0, NONE, FAST_SR1);
924 PIN(INPUT, gpf1-1, NONE, FAST_SR1);
925 PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
926 PIN(INPUT, gpf1-4, UP, FAST_SR1);
927 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
928 PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
929 PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
930
931 PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
932 PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
933 PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
934 PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
935
936 PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
937 PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
938 PIN(INPUT, gpf3-2, NONE, FAST_SR1);
939 PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
940
941 PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
942 PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
943 PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
944 PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
945 PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
946 PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
947 PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
948 PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
949
950 PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
951 PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
952 PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
953 PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
954 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
955 PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
956 PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
957 PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
958 };
959
960 te_irq: te_irq {
961 samsung,pins = "gpf1-3";
962 samsung,pin-function = <0xf>;
963 };
964};
965
966&pinctrl_cpif {
967 pinctrl-names = "default";
968 pinctrl-0 = <&initial_cpif>;
969
970 initial_cpif: initial-state {
971 PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
972 PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
973 };
974};
975
976&pinctrl_ese {
977 pinctrl-names = "default";
978 pinctrl-0 = <&initial_ese>;
979
980 initial_ese: initial-state {
981 PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
982 PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
983 PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
984 };
985};
986
987&pinctrl_fsys {
988 pinctrl-names = "default";
989 pinctrl-0 = <&initial_fsys>;
990
991 initial_fsys: initial-state {
992 PIN(INPUT, gpr3-0, NONE, FAST_SR1);
993 PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
994 PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
995 PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
996 PIN(INPUT, gpr3-7, NONE, FAST_SR1);
997 };
998};
999
1000&pinctrl_imem {
1001 pinctrl-names = "default";
1002 pinctrl-0 = <&initial_imem>;
1003
1004 initial_imem: initial-state {
1005 PIN(INPUT, gpf0-0, UP, FAST_SR1);
1006 PIN(INPUT, gpf0-1, UP, FAST_SR1);
1007 PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
1008 PIN(INPUT, gpf0-3, UP, FAST_SR1);
1009 PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
1010 PIN(INPUT, gpf0-5, NONE, FAST_SR1);
1011 PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
1012 PIN(INPUT, gpf0-7, UP, FAST_SR1);
1013 };
1014};
1015
1016&pinctrl_nfc {
1017 pinctrl-names = "default";
1018 pinctrl-0 = <&initial_nfc>;
1019
1020 initial_nfc: initial-state {
1021 PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
1022 };
1023};
1024
1025&pinctrl_peric {
1026 pinctrl-names = "default";
1027 pinctrl-0 = <&initial_peric>;
1028
1029 initial_peric: initial-state {
1030 PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
1031 PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
1032 PIN(INPUT, gpv7-2, NONE, FAST_SR1);
1033 PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
1034 PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
1035 PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
1036
1037 PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
1038
1039 PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
1040 PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
1041 PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
1042
1043 PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
1044
1045 PIN(INPUT, gpc3-4, NONE, FAST_SR1);
1046 PIN(INPUT, gpc3-5, NONE, FAST_SR1);
1047 PIN(INPUT, gpc3-6, NONE, FAST_SR1);
1048 PIN(INPUT, gpc3-7, NONE, FAST_SR1);
1049
1050 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
1051 PIN(2, gpg0-1, DOWN, FAST_SR1);
1052
1053 PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
1054
1055 PIN(INPUT, gpd4-0, NONE, FAST_SR1);
1056 PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
1057 PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
1058 PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
1059 PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
1060
1061 PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
1062
1063 PIN(INPUT, gpd8-1, UP, FAST_SR1);
1064
1065 PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
1066 PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
1067 PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
1068 PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
1069 PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
1070
1071 PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
1072 PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
1073
1074 PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
1075 PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
1076 PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
1077 PIN(INPUT, gpg3-7, DOWN, FAST_SR1);
1078 };
1079};
1080
1081&pinctrl_touch {
1082 pinctrl-names = "default";
1083 pinctrl-0 = <&initial_touch>;
1084
1085 initial_touch: initial-state {
1086 PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
1087 };
1088};
1089
1090&pwm {
1091 pinctrl-0 = <&pwm0_out>;
1092 pinctrl-names = "default";
1093 status = "okay";
1094};
1095
1096&mic {
1097 status = "okay";
1098
1099 i80-if-timings {
1100 };
1101};
1102
1103&pmu_system_controller {
1104 assigned-clocks = <&pmu_system_controller 0>;
1105 assigned-clock-parents = <&xxti>;
1106};
1107
1108&serial_1 {
1109 status = "okay";
1110};
1111
1112&spi_1 {
1113 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
1114 status = "okay";
1115
1116 wm5110: wm5110-codec@0 {
1117 compatible = "wlf,wm5110";
1118 reg = <0x0>;
1119 spi-max-frequency = <20000000>;
1120 interrupt-parent = <&gpa0>;
1121 interrupts = <4 IRQ_TYPE_NONE>;
1122 clocks = <&pmu_system_controller 0>,
1123 <&s2mps13_osc S2MPS11_CLK_BT>;
1124 clock-names = "mclk1", "mclk2";
1125
1126 gpio-controller;
1127 #gpio-cells = <2>;
1128
1129 wlf,micd-detect-debounce = <300>;
1130 wlf,micd-bias-start-time = <0x1>;
1131 wlf,micd-rate = <0x7>;
1132 wlf,micd-dbtime = <0x1>;
1133 wlf,micd-force-micbias;
1134 wlf,micd-configs = <0x0 1 0>;
1135 wlf,hpdet-channel = <1>;
1136 wlf,gpsw = <0x1>;
1137 wlf,inmode = <2 0 2 0>;
1138
1139 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
1140 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
1141
1142 /* core supplies */
1143 AVDD-supply = <&ldo18_reg>;
1144 DBVDD1-supply = <&ldo18_reg>;
1145 CPVDD-supply = <&ldo18_reg>;
1146 DBVDD2-supply = <&ldo18_reg>;
1147 DBVDD3-supply = <&ldo18_reg>;
1148
1149 controller-data {
1150 samsung,spi-feedback-delay = <0>;
1151 };
1152 };
1153};
1154
1155&timer {
1156 clock-frequency = <24000000>;
1157};
1158
1159&tmu_atlas0 {
1160 vtmu-supply = <&ldo3_reg>;
1161 status = "okay";
1162};
1163
1164&tmu_apollo {
1165 vtmu-supply = <&ldo3_reg>;
1166 status = "okay";
1167};
1168
1169&tmu_g3d {
1170 vtmu-supply = <&ldo3_reg>;
1171 status = "okay";
1172};
1173
1174&usbdrd30 {
1175 vdd33-supply = <&ldo10_reg>;
1176 vdd10-supply = <&ldo6_reg>;
1177 status = "okay";
1178};
1179
1180&usbdrd_dwc3_0 {
1181 dr_mode = "otg";
1182};
1183
1184&usbdrd30_phy {
1185 vbus-supply = <&safeout1_reg>;
1186 status = "okay";
1187};
1188
1189&xxti {
1190 clock-frequency = <24000000>;
1191};
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