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1 | /* |
2 | * SAMSUNG Exynos5433 TM2 board device tree source | |
3 | * | |
4 | * Copyright (c) 2016 Samsung Electronics Co., Ltd. | |
5 | * | |
6 | * Device tree source file for Samsung's TM2 board which is based on | |
7 | * Samsung Exynos5433 SoC. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | /dts-v1/; | |
15 | #include "exynos5433.dtsi" | |
16 | #include <dt-bindings/clock/samsung,s2mps11.h> | |
17 | #include <dt-bindings/gpio/gpio.h> | |
18 | #include <dt-bindings/input/input.h> | |
19 | #include <dt-bindings/interrupt-controller/irq.h> | |
20 | ||
21 | / { | |
22 | model = "Samsung TM2 board"; | |
23 | compatible = "samsung,tm2", "samsung,exynos5433"; | |
24 | ||
25 | aliases { | |
26 | pinctrl0 = &pinctrl_alive; | |
27 | pinctrl1 = &pinctrl_aud; | |
28 | pinctrl2 = &pinctrl_cpif; | |
29 | pinctrl3 = &pinctrl_ese; | |
30 | pinctrl4 = &pinctrl_finger; | |
31 | pinctrl5 = &pinctrl_fsys; | |
32 | pinctrl6 = &pinctrl_imem; | |
33 | pinctrl7 = &pinctrl_nfc; | |
34 | pinctrl8 = &pinctrl_peric; | |
35 | pinctrl9 = &pinctrl_touch; | |
36 | serial0 = &serial_0; | |
37 | serial1 = &serial_1; | |
38 | serial2 = &serial_2; | |
39 | serial3 = &serial_3; | |
40 | spi0 = &spi_0; | |
41 | spi1 = &spi_1; | |
42 | spi2 = &spi_2; | |
43 | spi3 = &spi_3; | |
44 | spi4 = &spi_4; | |
45 | }; | |
46 | ||
47 | chosen { | |
48 | stdout-path = &serial_1; | |
49 | }; | |
50 | ||
51 | memory@20000000 { | |
52 | device_type = "memory"; | |
53 | reg = <0x0 0x20000000 0x0 0xc0000000>; | |
54 | }; | |
55 | ||
56 | gpio-keys { | |
57 | compatible = "gpio-keys"; | |
58 | ||
59 | power-key { | |
60 | gpios = <&gpa2 7 GPIO_ACTIVE_LOW>; | |
61 | linux,code = <KEY_POWER>; | |
62 | label = "power key"; | |
63 | debounce-interval = <10>; | |
64 | }; | |
65 | ||
66 | volume-up-key { | |
67 | gpios = <&gpa2 0 GPIO_ACTIVE_LOW>; | |
68 | linux,code = <KEY_VOLUMEUP>; | |
69 | label = "volume-up key"; | |
70 | debounce-interval = <10>; | |
71 | }; | |
72 | ||
73 | volume-down-key { | |
74 | gpios = <&gpa2 1 GPIO_ACTIVE_LOW>; | |
75 | linux,code = <KEY_VOLUMEDOWN>; | |
76 | label = "volume-down key"; | |
77 | debounce-interval = <10>; | |
78 | }; | |
79 | ||
80 | homepage-key { | |
81 | gpios = <&gpa0 3 GPIO_ACTIVE_LOW>; | |
82 | linux,code = <KEY_MENU>; | |
83 | label = "homepage key"; | |
84 | debounce-interval = <10>; | |
85 | }; | |
86 | }; | |
87 | ||
88 | i2c_max98504: i2c-gpio-0 { | |
89 | compatible = "i2c-gpio"; | |
90 | gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */ | |
91 | &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >; | |
92 | i2c-gpio,delay-us = <2>; | |
93 | #address-cells = <1>; | |
94 | #size-cells = <0>; | |
95 | status = "okay"; | |
96 | ||
97 | max98504: max98504@31 { | |
98 | compatible = "maxim,max98504"; | |
99 | reg = <0x31>; | |
100 | maxim,rx-path = <1>; | |
101 | maxim,tx-path = <1>; | |
102 | maxim,tx-channel-mask = <3>; | |
103 | maxim,tx-channel-source = <2>; | |
104 | }; | |
105 | }; | |
106 | ||
107 | sound { | |
108 | compatible = "samsung,tm2-audio"; | |
109 | audio-codec = <&wm5110>; | |
110 | i2s-controller = <&i2s0>; | |
111 | audio-amplifier = <&max98504>; | |
112 | mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>; | |
113 | model = "wm5110"; | |
114 | samsung,audio-routing = | |
115 | /* Headphone */ | |
116 | "HP", "HPOUT1L", | |
117 | "HP", "HPOUT1R", | |
118 | ||
119 | /* Speaker */ | |
120 | "SPK", "SPKOUT", | |
121 | "SPKOUT", "HPOUT2L", | |
122 | "SPKOUT", "HPOUT2R", | |
123 | ||
124 | /* Receiver */ | |
125 | "RCV", "HPOUT3L", | |
126 | "RCV", "HPOUT3R"; | |
127 | status = "okay"; | |
128 | }; | |
129 | }; | |
130 | ||
131 | &adc { | |
132 | vdd-supply = <&ldo3_reg>; | |
133 | status = "okay"; | |
134 | ||
135 | thermistor-ap { | |
136 | compatible = "murata,ncp03wf104"; | |
137 | pullup-uv = <1800000>; | |
138 | pullup-ohm = <100000>; | |
139 | pulldown-ohm = <0>; | |
140 | io-channels = <&adc 0>; | |
141 | }; | |
142 | ||
143 | thermistor-battery { | |
144 | compatible = "murata,ncp03wf104"; | |
145 | pullup-uv = <1800000>; | |
146 | pullup-ohm = <100000>; | |
147 | pulldown-ohm = <0>; | |
148 | io-channels = <&adc 1>; | |
149 | #thermal-sensor-cells = <0>; | |
150 | }; | |
151 | ||
152 | thermistor-charger { | |
153 | compatible = "murata,ncp03wf104"; | |
154 | pullup-uv = <1800000>; | |
155 | pullup-ohm = <100000>; | |
156 | pulldown-ohm = <0>; | |
157 | io-channels = <&adc 2>; | |
158 | }; | |
159 | }; | |
160 | ||
4c9eec94 MS |
161 | &cmu_fsys { |
162 | assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>, | |
163 | <&cmu_top CLK_MOUT_SCLK_USBHOST30>, | |
164 | <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>, | |
165 | <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>, | |
166 | <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>, | |
167 | <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>, | |
168 | <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>, | |
169 | <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>, | |
170 | <&cmu_top CLK_DIV_SCLK_USBDRD30>, | |
171 | <&cmu_top CLK_DIV_SCLK_USBHOST30>; | |
172 | assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>, | |
173 | <&cmu_top CLK_MOUT_BUS_PLL_USER>, | |
174 | <&cmu_top CLK_SCLK_USBDRD30_FSYS>, | |
175 | <&cmu_top CLK_SCLK_USBHOST30_FSYS>, | |
176 | <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>, | |
177 | <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>, | |
178 | <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>, | |
179 | <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>; | |
180 | assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, | |
181 | <66700000>, <66700000>; | |
182 | }; | |
183 | ||
01e5d235 CC |
184 | &cpu0 { |
185 | cpu-supply = <&buck3_reg>; | |
186 | }; | |
187 | ||
188 | &cpu4 { | |
189 | cpu-supply = <&buck2_reg>; | |
190 | }; | |
191 | ||
192 | &decon { | |
193 | status = "okay"; | |
194 | ||
195 | i80-if-timings { | |
196 | }; | |
197 | }; | |
198 | ||
199 | &dsi { | |
200 | status = "okay"; | |
201 | vddcore-supply = <&ldo6_reg>; | |
202 | vddio-supply = <&ldo7_reg>; | |
203 | samsung,pll-clock-frequency = <24000000>; | |
204 | pinctrl-names = "default"; | |
205 | pinctrl-0 = <&te_irq>; | |
206 | ||
207 | ports { | |
208 | #address-cells = <1>; | |
209 | #size-cells = <0>; | |
210 | ||
211 | port@1 { | |
212 | reg = <1>; | |
213 | ||
214 | dsi_out: endpoint { | |
215 | samsung,burst-clock-frequency = <512000000>; | |
216 | samsung,esc-clock-frequency = <16000000>; | |
217 | }; | |
218 | }; | |
219 | }; | |
220 | }; | |
221 | ||
222 | &hsi2c_0 { | |
223 | status = "okay"; | |
224 | clock-frequency = <2500000>; | |
225 | ||
226 | s2mps13-pmic@66 { | |
227 | compatible = "samsung,s2mps13-pmic"; | |
228 | interrupt-parent = <&gpa0>; | |
229 | interrupts = <7 IRQ_TYPE_NONE>; | |
230 | reg = <0x66>; | |
231 | samsung,s2mps11-wrstbi-ground; | |
232 | ||
233 | s2mps13_osc: clocks { | |
234 | compatible = "samsung,s2mps13-clk"; | |
235 | #clock-cells = <1>; | |
236 | clock-output-names = "s2mps13_ap", "s2mps13_cp", | |
237 | "s2mps13_bt"; | |
238 | }; | |
239 | ||
240 | regulators { | |
241 | ldo1_reg: LDO1 { | |
242 | regulator-name = "VDD_ALIVE_0.9V_AP"; | |
243 | regulator-min-microvolt = <900000>; | |
244 | regulator-max-microvolt = <900000>; | |
245 | regulator-always-on; | |
246 | }; | |
247 | ||
248 | ldo2_reg: LDO2 { | |
249 | regulator-name = "VDDQ_MMC2_2.8V_AP"; | |
250 | regulator-min-microvolt = <2800000>; | |
251 | regulator-max-microvolt = <2800000>; | |
252 | regulator-always-on; | |
253 | regulator-state-mem { | |
254 | regulator-off-in-suspend; | |
255 | }; | |
256 | }; | |
257 | ||
258 | ldo3_reg: LDO3 { | |
259 | regulator-name = "VDD1_E_1.8V_AP"; | |
260 | regulator-min-microvolt = <1800000>; | |
261 | regulator-max-microvolt = <1800000>; | |
262 | regulator-always-on; | |
263 | }; | |
264 | ||
265 | ldo4_reg: LDO4 { | |
266 | regulator-name = "VDD10_MIF_PLL_1.0V_AP"; | |
267 | regulator-min-microvolt = <1300000>; | |
268 | regulator-max-microvolt = <1300000>; | |
269 | regulator-always-on; | |
270 | regulator-state-mem { | |
271 | regulator-off-in-suspend; | |
272 | }; | |
273 | }; | |
274 | ||
275 | ldo5_reg: LDO5 { | |
276 | regulator-name = "VDD10_DPLL_1.0V_AP"; | |
277 | regulator-min-microvolt = <1000000>; | |
278 | regulator-max-microvolt = <1000000>; | |
279 | regulator-always-on; | |
280 | regulator-state-mem { | |
281 | regulator-off-in-suspend; | |
282 | }; | |
283 | }; | |
284 | ||
285 | ldo6_reg: LDO6 { | |
286 | regulator-name = "VDD10_MIPI2L_1.0V_AP"; | |
287 | regulator-min-microvolt = <1000000>; | |
288 | regulator-max-microvolt = <1000000>; | |
289 | regulator-state-mem { | |
290 | regulator-off-in-suspend; | |
291 | }; | |
292 | }; | |
293 | ||
294 | ldo7_reg: LDO7 { | |
295 | regulator-name = "VDD18_MIPI2L_1.8V_AP"; | |
296 | regulator-min-microvolt = <1800000>; | |
297 | regulator-max-microvolt = <1800000>; | |
298 | }; | |
299 | ||
300 | ldo8_reg: LDO8 { | |
301 | regulator-name = "VDD18_LLI_1.8V_AP"; | |
302 | regulator-min-microvolt = <1800000>; | |
303 | regulator-max-microvolt = <1800000>; | |
304 | regulator-always-on; | |
305 | regulator-state-mem { | |
306 | regulator-off-in-suspend; | |
307 | }; | |
308 | }; | |
309 | ||
310 | ldo9_reg: LDO9 { | |
311 | regulator-name = "VDD18_ABB_ETC_1.8V_AP"; | |
312 | regulator-min-microvolt = <1800000>; | |
313 | regulator-max-microvolt = <1800000>; | |
314 | regulator-always-on; | |
315 | regulator-state-mem { | |
316 | regulator-off-in-suspend; | |
317 | }; | |
318 | }; | |
319 | ||
320 | ldo10_reg: LDO10 { | |
321 | regulator-name = "VDD33_USB30_3.0V_AP"; | |
322 | regulator-min-microvolt = <3000000>; | |
323 | regulator-max-microvolt = <3000000>; | |
324 | regulator-state-mem { | |
325 | regulator-off-in-suspend; | |
326 | }; | |
327 | }; | |
328 | ||
329 | ldo11_reg: LDO11 { | |
330 | regulator-name = "VDD_INT_M_1.0V_AP"; | |
331 | regulator-min-microvolt = <1000000>; | |
332 | regulator-max-microvolt = <1000000>; | |
333 | regulator-always-on; | |
334 | regulator-state-mem { | |
335 | regulator-off-in-suspend; | |
336 | }; | |
337 | }; | |
338 | ||
339 | ldo12_reg: LDO12 { | |
340 | regulator-name = "VDD_KFC_M_1.1V_AP"; | |
341 | regulator-min-microvolt = <800000>; | |
342 | regulator-max-microvolt = <1350000>; | |
343 | regulator-always-on; | |
344 | }; | |
345 | ||
346 | ldo13_reg: LDO13 { | |
347 | regulator-name = "VDD_G3D_M_0.95V_AP"; | |
348 | regulator-min-microvolt = <950000>; | |
349 | regulator-max-microvolt = <950000>; | |
350 | regulator-always-on; | |
351 | regulator-state-mem { | |
352 | regulator-off-in-suspend; | |
353 | }; | |
354 | }; | |
355 | ||
356 | ldo14_reg: LDO14 { | |
357 | regulator-name = "VDDQ_M1_LDO_1.2V_AP"; | |
358 | regulator-min-microvolt = <1200000>; | |
359 | regulator-max-microvolt = <1200000>; | |
360 | regulator-always-on; | |
361 | regulator-state-mem { | |
362 | regulator-off-in-suspend; | |
363 | }; | |
364 | }; | |
365 | ||
366 | ldo15_reg: LDO15 { | |
367 | regulator-name = "VDDQ_M2_LDO_1.2V_AP"; | |
368 | regulator-min-microvolt = <1200000>; | |
369 | regulator-max-microvolt = <1200000>; | |
370 | regulator-always-on; | |
371 | regulator-state-mem { | |
372 | regulator-off-in-suspend; | |
373 | }; | |
374 | }; | |
375 | ||
376 | ldo16_reg: LDO16 { | |
377 | regulator-name = "VDDQ_EFUSE"; | |
378 | regulator-min-microvolt = <1400000>; | |
379 | regulator-max-microvolt = <3400000>; | |
380 | regulator-always-on; | |
381 | }; | |
382 | ||
383 | ldo17_reg: LDO17 { | |
384 | regulator-name = "V_TFLASH_2.8V_AP"; | |
385 | regulator-min-microvolt = <2800000>; | |
386 | regulator-max-microvolt = <2800000>; | |
387 | }; | |
388 | ||
389 | ldo18_reg: LDO18 { | |
390 | regulator-name = "V_CODEC_1.8V_AP"; | |
391 | regulator-min-microvolt = <1800000>; | |
392 | regulator-max-microvolt = <1800000>; | |
393 | }; | |
394 | ||
395 | ldo19_reg: LDO19 { | |
396 | regulator-name = "VDDA_1.8V_COMP"; | |
397 | regulator-min-microvolt = <1800000>; | |
398 | regulator-max-microvolt = <1800000>; | |
399 | regulator-always-on; | |
400 | }; | |
401 | ||
402 | ldo20_reg: LDO20 { | |
403 | regulator-name = "VCC_2.8V_AP"; | |
404 | regulator-min-microvolt = <2800000>; | |
405 | regulator-max-microvolt = <2800000>; | |
406 | regulator-always-on; | |
407 | }; | |
408 | ||
409 | ldo21_reg: LDO21 { | |
410 | regulator-name = "VT_CAM_1.8V"; | |
411 | regulator-min-microvolt = <1800000>; | |
412 | regulator-max-microvolt = <1800000>; | |
413 | }; | |
414 | ||
415 | ldo22_reg: LDO22 { | |
416 | regulator-name = "CAM_IO_1.8V_AP"; | |
417 | regulator-min-microvolt = <1800000>; | |
418 | regulator-max-microvolt = <1800000>; | |
419 | }; | |
420 | ||
421 | ldo23_reg: LDO23 { | |
422 | regulator-name = "CAM_SEN_CORE_1.2V_AP"; | |
423 | regulator-min-microvolt = <1050000>; | |
424 | regulator-max-microvolt = <1200000>; | |
425 | }; | |
426 | ||
427 | ldo24_reg: LDO24 { | |
428 | regulator-name = "VT_CAM_1.2V"; | |
429 | regulator-min-microvolt = <1200000>; | |
430 | regulator-max-microvolt = <1200000>; | |
431 | }; | |
432 | ||
433 | ldo25_reg: LDO25 { | |
434 | regulator-name = "CAM_SEN_A2.8V_AP"; | |
435 | regulator-min-microvolt = <2800000>; | |
436 | regulator-max-microvolt = <2800000>; | |
437 | }; | |
438 | ||
439 | ldo26_reg: LDO26 { | |
440 | regulator-name = "CAM_AF_2.8V_AP"; | |
441 | regulator-min-microvolt = <2800000>; | |
442 | regulator-max-microvolt = <2800000>; | |
443 | }; | |
444 | ||
445 | ldo27_reg: LDO27 { | |
446 | regulator-name = "VCC_3.0V_LCD_AP"; | |
447 | regulator-min-microvolt = <3000000>; | |
448 | regulator-max-microvolt = <3000000>; | |
449 | }; | |
450 | ||
451 | ldo28_reg: LDO28 { | |
452 | regulator-name = "VCC_1.8V_LCD_AP"; | |
453 | regulator-min-microvolt = <1800000>; | |
454 | regulator-max-microvolt = <1800000>; | |
455 | }; | |
456 | ||
457 | ldo29_reg: LDO29 { | |
458 | regulator-name = "VT_CAM_2.8V"; | |
459 | regulator-min-microvolt = <3000000>; | |
460 | regulator-max-microvolt = <3000000>; | |
461 | }; | |
462 | ||
463 | ldo30_reg: LDO30 { | |
464 | regulator-name = "TSP_AVDD_3.3V_AP"; | |
465 | regulator-min-microvolt = <3300000>; | |
466 | regulator-max-microvolt = <3300000>; | |
467 | }; | |
468 | ||
469 | ldo31_reg: LDO31 { | |
470 | regulator-name = "TSP_VDD_1.85V_AP"; | |
471 | regulator-min-microvolt = <1850000>; | |
472 | regulator-max-microvolt = <1850000>; | |
473 | }; | |
474 | ||
475 | ldo32_reg: LDO32 { | |
476 | regulator-name = "VTOUCH_1.8V_AP"; | |
477 | regulator-min-microvolt = <1800000>; | |
478 | regulator-max-microvolt = <1800000>; | |
479 | }; | |
480 | ||
481 | ldo33_reg: LDO33 { | |
482 | regulator-name = "VTOUCH_LED_3.3V"; | |
483 | regulator-min-microvolt = <2500000>; | |
484 | regulator-max-microvolt = <3300000>; | |
485 | regulator-ramp-delay = <12500>; | |
486 | }; | |
487 | ||
488 | ldo34_reg: LDO34 { | |
489 | regulator-name = "VCC_1.8V_MHL_AP"; | |
490 | regulator-min-microvolt = <1000000>; | |
491 | regulator-max-microvolt = <2100000>; | |
492 | }; | |
493 | ||
494 | ldo35_reg: LDO35 { | |
495 | regulator-name = "OIS_VM_2.8V"; | |
496 | regulator-min-microvolt = <1800000>; | |
497 | regulator-max-microvolt = <2800000>; | |
498 | }; | |
499 | ||
500 | ldo36_reg: LDO36 { | |
501 | regulator-name = "VSIL_1.0V"; | |
502 | regulator-min-microvolt = <1000000>; | |
503 | regulator-max-microvolt = <1000000>; | |
504 | }; | |
505 | ||
506 | ldo37_reg: LDO37 { | |
507 | regulator-name = "VF_1.8V"; | |
508 | regulator-min-microvolt = <1800000>; | |
509 | regulator-max-microvolt = <1800000>; | |
510 | }; | |
511 | ||
512 | ldo38_reg: LDO38 { | |
513 | regulator-name = "VCC_3.0V_MOTOR_AP"; | |
514 | regulator-min-microvolt = <3000000>; | |
515 | regulator-max-microvolt = <3000000>; | |
516 | }; | |
517 | ||
518 | ldo39_reg: LDO39 { | |
519 | regulator-name = "V_HRM_1.8V"; | |
520 | regulator-min-microvolt = <1800000>; | |
521 | regulator-max-microvolt = <1800000>; | |
522 | }; | |
523 | ||
524 | ldo40_reg: LDO40 { | |
525 | regulator-name = "V_HRM_3.3V"; | |
526 | regulator-min-microvolt = <3300000>; | |
527 | regulator-max-microvolt = <3300000>; | |
528 | }; | |
529 | ||
530 | buck1_reg: BUCK1 { | |
531 | regulator-name = "VDD_MIF_0.9V_AP"; | |
532 | regulator-min-microvolt = <600000>; | |
533 | regulator-max-microvolt = <1500000>; | |
534 | regulator-always-on; | |
535 | regulator-state-mem { | |
536 | regulator-off-in-suspend; | |
537 | }; | |
538 | }; | |
539 | ||
540 | buck2_reg: BUCK2 { | |
541 | regulator-name = "VDD_EGL_1.0V_AP"; | |
542 | regulator-min-microvolt = <900000>; | |
543 | regulator-max-microvolt = <1300000>; | |
544 | regulator-always-on; | |
545 | regulator-state-mem { | |
546 | regulator-off-in-suspend; | |
547 | }; | |
548 | }; | |
549 | ||
550 | buck3_reg: BUCK3 { | |
551 | regulator-name = "VDD_KFC_1.0V_AP"; | |
552 | regulator-min-microvolt = <800000>; | |
553 | regulator-max-microvolt = <1200000>; | |
554 | regulator-always-on; | |
555 | regulator-state-mem { | |
556 | regulator-off-in-suspend; | |
557 | }; | |
558 | }; | |
559 | ||
560 | buck4_reg: BUCK4 { | |
561 | regulator-name = "VDD_INT_0.95V_AP"; | |
562 | regulator-min-microvolt = <600000>; | |
563 | regulator-max-microvolt = <1500000>; | |
564 | regulator-always-on; | |
565 | regulator-state-mem { | |
566 | regulator-off-in-suspend; | |
567 | }; | |
568 | }; | |
569 | ||
570 | buck5_reg: BUCK5 { | |
571 | regulator-name = "VDD_DISP_CAM0_0.9V_AP"; | |
572 | regulator-min-microvolt = <600000>; | |
573 | regulator-max-microvolt = <1500000>; | |
574 | regulator-always-on; | |
575 | regulator-state-mem { | |
576 | regulator-off-in-suspend; | |
577 | }; | |
578 | }; | |
579 | ||
580 | buck6_reg: BUCK6 { | |
581 | regulator-name = "VDD_G3D_0.9V_AP"; | |
582 | regulator-min-microvolt = <600000>; | |
583 | regulator-max-microvolt = <1500000>; | |
584 | regulator-always-on; | |
585 | regulator-state-mem { | |
586 | regulator-off-in-suspend; | |
587 | }; | |
588 | }; | |
589 | ||
590 | buck7_reg: BUCK7 { | |
591 | regulator-name = "VDD_MEM1_1.2V_AP"; | |
592 | regulator-min-microvolt = <1200000>; | |
593 | regulator-max-microvolt = <1200000>; | |
594 | regulator-always-on; | |
595 | }; | |
596 | ||
597 | buck8_reg: BUCK8 { | |
598 | regulator-name = "VDD_LLDO_1.35V_AP"; | |
599 | regulator-min-microvolt = <1350000>; | |
600 | regulator-max-microvolt = <3300000>; | |
601 | regulator-always-on; | |
602 | }; | |
603 | ||
604 | buck9_reg: BUCK9 { | |
605 | regulator-name = "VDD_MLDO_2.0V_AP"; | |
606 | regulator-min-microvolt = <1350000>; | |
607 | regulator-max-microvolt = <3300000>; | |
608 | regulator-always-on; | |
609 | }; | |
610 | ||
611 | buck10_reg: BUCK10 { | |
612 | regulator-name = "vdd_mem2"; | |
613 | regulator-min-microvolt = <550000>; | |
614 | regulator-max-microvolt = <1500000>; | |
615 | regulator-always-on; | |
616 | }; | |
617 | }; | |
618 | }; | |
619 | }; | |
620 | ||
621 | &hsi2c_8 { | |
622 | status = "okay"; | |
623 | ||
624 | max77843@66 { | |
625 | compatible = "maxim,max77843"; | |
626 | interrupt-parent = <&gpa1>; | |
627 | interrupts = <5 IRQ_TYPE_EDGE_FALLING>; | |
628 | reg = <0x66>; | |
629 | ||
630 | muic: max77843-muic { | |
631 | compatible = "maxim,max77843-muic"; | |
632 | }; | |
633 | ||
634 | regulators { | |
635 | compatible = "maxim,max77843-regulator"; | |
636 | safeout1_reg: SAFEOUT1 { | |
637 | regulator-name = "SAFEOUT1"; | |
638 | regulator-min-microvolt = <3300000>; | |
639 | regulator-max-microvolt = <4950000>; | |
640 | }; | |
641 | ||
642 | safeout2_reg: SAFEOUT2 { | |
643 | regulator-name = "SAFEOUT2"; | |
644 | regulator-min-microvolt = <3300000>; | |
645 | regulator-max-microvolt = <4950000>; | |
646 | }; | |
647 | ||
648 | charger_reg: CHARGER { | |
649 | regulator-name = "CHARGER"; | |
650 | regulator-min-microamp = <100000>; | |
651 | regulator-max-microamp = <3150000>; | |
652 | }; | |
653 | }; | |
654 | ||
655 | haptic: max77843-haptic { | |
656 | compatible = "maxim,max77843-haptic"; | |
657 | haptic-supply = <&ldo38_reg>; | |
658 | pwms = <&pwm 0 33670 0>; | |
659 | pwm-names = "haptic"; | |
660 | }; | |
661 | }; | |
662 | }; | |
663 | ||
664 | &i2s0 { | |
665 | status = "okay"; | |
666 | }; | |
667 | ||
668 | &mshc_0 { | |
669 | status = "okay"; | |
670 | num-slots = <1>; | |
671 | non-removable; | |
672 | card-detect-delay = <200>; | |
673 | samsung,dw-mshc-ciu-div = <3>; | |
674 | samsung,dw-mshc-sdr-timing = <0 4>; | |
675 | samsung,dw-mshc-ddr-timing = <0 2>; | |
676 | samsung,dw-mshc-hs400-timing = <0 3>; | |
677 | samsung,read-strobe-delay = <90>; | |
678 | fifo-depth = <0x80>; | |
679 | pinctrl-names = "default"; | |
680 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 | |
681 | &sd0_bus8 &sd0_rdqs>; | |
682 | bus-width = <8>; | |
683 | assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>; | |
684 | assigned-clock-rates = <800000000>; | |
685 | }; | |
686 | ||
687 | &pinctrl_alive { | |
688 | pinctrl-names = "default"; | |
689 | pinctrl-0 = <&initial_alive>; | |
690 | ||
691 | initial_alive: initial-state { | |
692 | PIN(IN, gpa0-0, DOWN, LV1); | |
693 | PIN(IN, gpa0-1, NONE, LV1); | |
694 | PIN(IN, gpa0-2, DOWN, LV1); | |
695 | PIN(IN, gpa0-3, NONE, LV1); | |
696 | PIN(IN, gpa0-4, NONE, LV1); | |
697 | PIN(IN, gpa0-5, DOWN, LV1); | |
698 | PIN(IN, gpa0-6, NONE, LV1); | |
699 | PIN(IN, gpa0-7, NONE, LV1); | |
700 | ||
701 | PIN(IN, gpa1-0, UP, LV1); | |
702 | PIN(IN, gpa1-1, NONE, LV1); | |
703 | PIN(IN, gpa1-2, NONE, LV1); | |
704 | PIN(IN, gpa1-3, DOWN, LV1); | |
705 | PIN(IN, gpa1-4, DOWN, LV1); | |
706 | PIN(IN, gpa1-5, NONE, LV1); | |
707 | PIN(IN, gpa1-6, NONE, LV1); | |
708 | PIN(IN, gpa1-7, NONE, LV1); | |
709 | ||
710 | PIN(IN, gpa2-0, NONE, LV1); | |
711 | PIN(IN, gpa2-1, NONE, LV1); | |
712 | PIN(IN, gpa2-2, NONE, LV1); | |
713 | PIN(IN, gpa2-3, DOWN, LV1); | |
714 | PIN(IN, gpa2-4, NONE, LV1); | |
715 | PIN(IN, gpa2-5, DOWN, LV1); | |
716 | PIN(IN, gpa2-6, DOWN, LV1); | |
717 | PIN(IN, gpa2-7, NONE, LV1); | |
718 | ||
719 | PIN(IN, gpa3-0, DOWN, LV1); | |
720 | PIN(IN, gpa3-1, DOWN, LV1); | |
721 | PIN(IN, gpa3-2, NONE, LV1); | |
722 | PIN(IN, gpa3-3, DOWN, LV1); | |
723 | PIN(IN, gpa3-4, NONE, LV1); | |
724 | PIN(IN, gpa3-5, DOWN, LV1); | |
725 | PIN(IN, gpa3-6, DOWN, LV1); | |
726 | PIN(IN, gpa3-7, DOWN, LV1); | |
727 | ||
728 | PIN(IN, gpf1-0, NONE, LV1); | |
729 | PIN(IN, gpf1-1, NONE, LV1); | |
730 | PIN(IN, gpf1-2, DOWN, LV1); | |
731 | PIN(IN, gpf1-4, UP, LV1); | |
732 | PIN(OUT, gpf1-5, NONE, LV1); | |
733 | PIN(IN, gpf1-6, DOWN, LV1); | |
734 | PIN(IN, gpf1-7, DOWN, LV1); | |
735 | ||
736 | PIN(IN, gpf2-0, DOWN, LV1); | |
737 | PIN(IN, gpf2-1, DOWN, LV1); | |
738 | PIN(IN, gpf2-2, DOWN, LV1); | |
739 | PIN(IN, gpf2-3, DOWN, LV1); | |
740 | ||
741 | PIN(IN, gpf3-0, DOWN, LV1); | |
742 | PIN(IN, gpf3-1, DOWN, LV1); | |
743 | PIN(IN, gpf3-2, NONE, LV1); | |
744 | PIN(IN, gpf3-3, DOWN, LV1); | |
745 | ||
746 | PIN(IN, gpf4-0, DOWN, LV1); | |
747 | PIN(IN, gpf4-1, DOWN, LV1); | |
748 | PIN(IN, gpf4-2, DOWN, LV1); | |
749 | PIN(IN, gpf4-3, DOWN, LV1); | |
750 | PIN(IN, gpf4-4, DOWN, LV1); | |
751 | PIN(IN, gpf4-5, DOWN, LV1); | |
752 | PIN(IN, gpf4-6, DOWN, LV1); | |
753 | PIN(IN, gpf4-7, DOWN, LV1); | |
754 | ||
755 | PIN(IN, gpf5-0, DOWN, LV1); | |
756 | PIN(IN, gpf5-1, DOWN, LV1); | |
757 | PIN(IN, gpf5-2, DOWN, LV1); | |
758 | PIN(IN, gpf5-3, DOWN, LV1); | |
759 | PIN(OUT, gpf5-4, NONE, LV1); | |
760 | PIN(IN, gpf5-5, DOWN, LV1); | |
761 | PIN(IN, gpf5-6, DOWN, LV1); | |
762 | PIN(IN, gpf5-7, DOWN, LV1); | |
763 | }; | |
764 | ||
765 | te_irq: te_irq { | |
766 | samsung,pins = "gpf1-3"; | |
767 | samsung,pin-function = <0xf>; | |
768 | }; | |
769 | }; | |
770 | ||
771 | &pinctrl_cpif { | |
772 | pinctrl-names = "default"; | |
773 | pinctrl-0 = <&initial_cpif>; | |
774 | ||
775 | initial_cpif: initial-state { | |
776 | PIN(IN, gpv6-0, DOWN, LV1); | |
777 | PIN(IN, gpv6-1, DOWN, LV1); | |
778 | }; | |
779 | }; | |
780 | ||
781 | &pinctrl_ese { | |
782 | pinctrl-names = "default"; | |
783 | pinctrl-0 = <&initial_ese>; | |
784 | ||
785 | initial_ese: initial-state { | |
786 | PIN(IN, gpj2-0, DOWN, LV1); | |
787 | PIN(IN, gpj2-1, DOWN, LV1); | |
788 | PIN(IN, gpj2-2, DOWN, LV1); | |
789 | }; | |
790 | }; | |
791 | ||
792 | &pinctrl_fsys { | |
793 | pinctrl-names = "default"; | |
794 | pinctrl-0 = <&initial_fsys>; | |
795 | ||
796 | initial_fsys: initial-state { | |
797 | PIN(IN, gpr3-0, NONE, LV1); | |
798 | PIN(IN, gpr3-1, DOWN, LV1); | |
799 | PIN(IN, gpr3-2, DOWN, LV1); | |
800 | PIN(IN, gpr3-3, DOWN, LV1); | |
801 | PIN(IN, gpr3-7, NONE, LV1); | |
802 | }; | |
803 | }; | |
804 | ||
805 | &pinctrl_imem { | |
806 | pinctrl-names = "default"; | |
807 | pinctrl-0 = <&initial_imem>; | |
808 | ||
809 | initial_imem: initial-state { | |
810 | PIN(IN, gpf0-0, UP, LV1); | |
811 | PIN(IN, gpf0-1, UP, LV1); | |
812 | PIN(IN, gpf0-2, DOWN, LV1); | |
813 | PIN(IN, gpf0-3, UP, LV1); | |
814 | PIN(IN, gpf0-4, DOWN, LV1); | |
815 | PIN(IN, gpf0-5, NONE, LV1); | |
816 | PIN(IN, gpf0-6, DOWN, LV1); | |
817 | PIN(IN, gpf0-7, UP, LV1); | |
818 | }; | |
819 | }; | |
820 | ||
821 | &pinctrl_nfc { | |
822 | pinctrl-names = "default"; | |
823 | pinctrl-0 = <&initial_nfc>; | |
824 | ||
825 | initial_nfc: initial-state { | |
826 | PIN(IN, gpj0-2, DOWN, LV1); | |
827 | }; | |
828 | }; | |
829 | ||
830 | &pinctrl_peric { | |
831 | pinctrl-names = "default"; | |
832 | pinctrl-0 = <&initial_peric>; | |
833 | ||
834 | initial_peric: initial-state { | |
835 | PIN(IN, gpv7-0, DOWN, LV1); | |
836 | PIN(IN, gpv7-1, DOWN, LV1); | |
837 | PIN(IN, gpv7-2, NONE, LV1); | |
838 | PIN(IN, gpv7-3, DOWN, LV1); | |
839 | PIN(IN, gpv7-4, DOWN, LV1); | |
840 | PIN(IN, gpv7-5, DOWN, LV1); | |
841 | ||
842 | PIN(IN, gpb0-4, DOWN, LV1); | |
843 | ||
844 | PIN(IN, gpc0-2, DOWN, LV1); | |
845 | PIN(IN, gpc0-5, DOWN, LV1); | |
846 | PIN(IN, gpc0-7, DOWN, LV1); | |
847 | ||
848 | PIN(IN, gpc1-1, DOWN, LV1); | |
849 | ||
850 | PIN(IN, gpc3-4, NONE, LV1); | |
851 | PIN(IN, gpc3-5, NONE, LV1); | |
852 | PIN(IN, gpc3-6, NONE, LV1); | |
853 | PIN(IN, gpc3-7, NONE, LV1); | |
854 | ||
855 | PIN(OUT, gpg0-0, NONE, LV1); | |
856 | PIN(FUNC1, gpg0-1, DOWN, LV1); | |
857 | ||
858 | PIN(IN, gpd2-5, DOWN, LV1); | |
859 | ||
860 | PIN(IN, gpd4-0, NONE, LV1); | |
861 | PIN(IN, gpd4-1, DOWN, LV1); | |
862 | PIN(IN, gpd4-2, DOWN, LV1); | |
863 | PIN(IN, gpd4-3, DOWN, LV1); | |
864 | PIN(IN, gpd4-4, DOWN, LV1); | |
865 | ||
866 | PIN(IN, gpd6-3, DOWN, LV1); | |
867 | ||
868 | PIN(IN, gpd8-1, UP, LV1); | |
869 | ||
870 | PIN(IN, gpg1-0, DOWN, LV1); | |
871 | PIN(IN, gpg1-1, DOWN, LV1); | |
872 | PIN(IN, gpg1-2, DOWN, LV1); | |
873 | PIN(IN, gpg1-3, DOWN, LV1); | |
874 | PIN(IN, gpg1-4, DOWN, LV1); | |
875 | ||
876 | PIN(IN, gpg2-0, DOWN, LV1); | |
877 | PIN(IN, gpg2-1, DOWN, LV1); | |
878 | ||
879 | PIN(IN, gpg3-0, DOWN, LV1); | |
880 | PIN(IN, gpg3-1, DOWN, LV1); | |
881 | PIN(IN, gpg3-5, DOWN, LV1); | |
882 | PIN(IN, gpg3-7, DOWN, LV1); | |
883 | }; | |
884 | }; | |
885 | ||
886 | &pinctrl_touch { | |
887 | pinctrl-names = "default"; | |
888 | pinctrl-0 = <&initial_touch>; | |
889 | ||
890 | initial_touch: initial-state { | |
891 | PIN(IN, gpj1-2, DOWN, LV1); | |
892 | }; | |
893 | }; | |
894 | ||
895 | &pwm { | |
896 | pinctrl-0 = <&pwm0_out>; | |
897 | pinctrl-names = "default"; | |
898 | status = "okay"; | |
899 | }; | |
900 | ||
901 | &mic { | |
902 | status = "okay"; | |
903 | ||
904 | i80-if-timings { | |
905 | }; | |
906 | }; | |
907 | ||
d41fa3f0 SN |
908 | &pmu_system_controller { |
909 | assigned-clocks = <&pmu_system_controller 0>; | |
910 | assigned-clock-parents = <&xxti>; | |
911 | }; | |
912 | ||
01e5d235 CC |
913 | &serial_1 { |
914 | status = "okay"; | |
915 | }; | |
916 | ||
917 | &serial_3 { | |
918 | assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>; | |
919 | assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>; | |
920 | status = "okay"; | |
921 | }; | |
922 | ||
923 | &spi_1 { | |
924 | cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>; | |
925 | status = "okay"; | |
926 | ||
927 | wm5110: wm5110-codec@0 { | |
928 | compatible = "wlf,wm5110"; | |
929 | reg = <0x0>; | |
930 | spi-max-frequency = <20000000>; | |
931 | interrupt-parent = <&gpa0>; | |
932 | interrupts = <4 IRQ_TYPE_NONE>; | |
933 | clocks = <&pmu_system_controller 0>, | |
934 | <&s2mps13_osc S2MPS11_CLK_BT>; | |
935 | clock-names = "mclk1", "mclk2"; | |
936 | ||
937 | gpio-controller; | |
938 | #gpio-cells = <2>; | |
939 | ||
940 | wlf,micd-detect-debounce = <300>; | |
941 | wlf,micd-bias-start-time = <0x1>; | |
942 | wlf,micd-rate = <0x7>; | |
943 | wlf,micd-dbtime = <0x1>; | |
944 | wlf,micd-force-micbias; | |
945 | wlf,micd-configs = <0x0 1 0>; | |
946 | wlf,hpdet-channel = <1>; | |
947 | wlf,gpsw = <0x1>; | |
948 | wlf,inmode = <2 0 2 0>; | |
949 | ||
950 | wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>; | |
951 | wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>; | |
952 | ||
953 | /* core supplies */ | |
954 | AVDD-supply = <&ldo18_reg>; | |
955 | DBVDD1-supply = <&ldo18_reg>; | |
956 | CPVDD-supply = <&ldo18_reg>; | |
957 | DBVDD2-supply = <&ldo18_reg>; | |
958 | DBVDD3-supply = <&ldo18_reg>; | |
959 | ||
960 | controller-data { | |
961 | samsung,spi-feedback-delay = <0>; | |
962 | }; | |
963 | }; | |
964 | }; | |
965 | ||
966 | &timer { | |
967 | clock-frequency = <24000000>; | |
968 | }; | |
969 | ||
970 | &tmu_atlas0 { | |
971 | vtmu-supply = <&ldo3_reg>; | |
972 | status = "okay"; | |
973 | }; | |
974 | ||
975 | &tmu_apollo { | |
976 | vtmu-supply = <&ldo3_reg>; | |
977 | status = "okay"; | |
978 | }; | |
979 | ||
980 | &tmu_g3d { | |
981 | vtmu-supply = <&ldo3_reg>; | |
982 | status = "okay"; | |
983 | }; | |
984 | ||
985 | &usbdrd30 { | |
986 | vdd33-supply = <&ldo10_reg>; | |
987 | vdd10-supply = <&ldo6_reg>; | |
988 | status = "okay"; | |
989 | }; | |
990 | ||
991 | &usbdrd_dwc3_0 { | |
992 | dr_mode = "otg"; | |
993 | }; | |
994 | ||
995 | &usbdrd30_phy { | |
996 | vbus-supply = <&safeout1_reg>; | |
997 | status = "okay"; | |
998 | }; | |
999 | ||
1000 | &xxti { | |
1001 | clock-frequency = <24000000>; | |
1002 | }; |