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292816a6 | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
ec7e5a56 TP |
2 | /* |
3 | * Copyright (C) 2016 Marvell Technology Group Ltd. | |
4 | * | |
ec7e5a56 TP |
5 | * Device Tree file for Marvell Armada AP806. |
6 | */ | |
7 | ||
8 | #include "armada-ap806.dtsi" | |
9 | ||
10 | / { | |
11 | model = "Marvell Armada AP806 Quad"; | |
12 | compatible = "marvell,armada-ap806-quad", "marvell,armada-ap806"; | |
13 | ||
14 | cpus { | |
15 | #address-cells = <1>; | |
16 | #size-cells = <0>; | |
17 | ||
92e5d4e9 | 18 | cpu0: cpu@0 { |
ec7e5a56 TP |
19 | device_type = "cpu"; |
20 | compatible = "arm,cortex-a72", "arm,armv8"; | |
21 | reg = <0x000>; | |
22 | enable-method = "psci"; | |
8ed46368 | 23 | cpu-idle-states = <&CPU_SLEEP_0>; |
ec7e5a56 | 24 | }; |
92e5d4e9 | 25 | cpu1: cpu@1 { |
ec7e5a56 TP |
26 | device_type = "cpu"; |
27 | compatible = "arm,cortex-a72", "arm,armv8"; | |
28 | reg = <0x001>; | |
29 | enable-method = "psci"; | |
8ed46368 | 30 | cpu-idle-states = <&CPU_SLEEP_0>; |
ec7e5a56 | 31 | }; |
92e5d4e9 | 32 | cpu2: cpu@100 { |
ec7e5a56 TP |
33 | device_type = "cpu"; |
34 | compatible = "arm,cortex-a72", "arm,armv8"; | |
35 | reg = <0x100>; | |
36 | enable-method = "psci"; | |
8ed46368 | 37 | cpu-idle-states = <&CPU_SLEEP_0>; |
ec7e5a56 | 38 | }; |
92e5d4e9 | 39 | cpu3: cpu@101 { |
ec7e5a56 TP |
40 | device_type = "cpu"; |
41 | compatible = "arm,cortex-a72", "arm,armv8"; | |
42 | reg = <0x101>; | |
43 | enable-method = "psci"; | |
8ed46368 | 44 | cpu-idle-states = <&CPU_SLEEP_0>; |
ec7e5a56 TP |
45 | }; |
46 | }; | |
ec7e5a56 | 47 | }; |