]>
Commit | Line | Data |
---|---|---|
b3a37248 EH |
1 | /* |
2 | * Copyright (c) 2014 MediaTek Inc. | |
3 | * Author: Eddie Huang <eddie.huang@mediatek.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | */ | |
14 | ||
15 | /dts-v1/; | |
bfcce47a | 16 | #include <dt-bindings/gpio/gpio.h> |
b3a37248 EH |
17 | #include "mt8173.dtsi" |
18 | ||
19 | / { | |
692ef3ee YC |
20 | model = "MediaTek MT8173 evaluation board"; |
21 | compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; | |
b3a37248 EH |
22 | |
23 | aliases { | |
24 | serial0 = &uart0; | |
25 | serial1 = &uart1; | |
26 | serial2 = &uart2; | |
27 | serial3 = &uart3; | |
28 | }; | |
29 | ||
30 | memory@40000000 { | |
31 | device_type = "memory"; | |
32 | reg = <0 0x40000000 0 0x80000000>; | |
33 | }; | |
34 | ||
35 | chosen { }; | |
bfcce47a | 36 | |
7475e27b PZ |
37 | connector { |
38 | compatible = "hdmi-connector"; | |
39 | label = "hdmi"; | |
40 | type = "d"; | |
41 | ||
42 | port { | |
43 | hdmi_connector_in: endpoint { | |
44 | remote-endpoint = <&hdmi0_out>; | |
45 | }; | |
46 | }; | |
47 | }; | |
c0891284 CY |
48 | |
49 | extcon_usb: extcon_iddig { | |
50 | compatible = "linux,extcon-usb-gpio"; | |
51 | id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>; | |
52 | }; | |
53 | ||
54 | usb_p1_vbus: regulator@0 { | |
55 | compatible = "regulator-fixed"; | |
56 | regulator-name = "usb_vbus"; | |
57 | regulator-min-microvolt = <5000000>; | |
58 | regulator-max-microvolt = <5000000>; | |
59 | gpio = <&pio 130 GPIO_ACTIVE_HIGH>; | |
60 | enable-active-high; | |
61 | }; | |
62 | ||
63 | usb_p0_vbus: regulator@1 { | |
64 | compatible = "regulator-fixed"; | |
65 | regulator-name = "vbus"; | |
66 | regulator-min-microvolt = <5000000>; | |
67 | regulator-max-microvolt = <5000000>; | |
68 | gpio = <&pio 9 GPIO_ACTIVE_HIGH>; | |
69 | enable-active-high; | |
70 | }; | |
7475e27b PZ |
71 | }; |
72 | ||
73 | &cec { | |
74 | status = "okay"; | |
75 | }; | |
76 | ||
77 | &dpi0 { | |
78 | status = "okay"; | |
79 | }; | |
80 | ||
81 | &hdmi_phy { | |
82 | status = "okay"; | |
83 | }; | |
84 | ||
85 | &hdmi0 { | |
86 | status = "okay"; | |
87 | ||
88 | ports { | |
89 | port@1 { | |
90 | reg = <1>; | |
91 | ||
92 | hdmi0_out: endpoint { | |
93 | remote-endpoint = <&hdmi_connector_in>; | |
94 | }; | |
95 | }; | |
96 | }; | |
b3a37248 EH |
97 | }; |
98 | ||
720570b1 HC |
99 | &i2c1 { |
100 | status = "okay"; | |
101 | ||
102 | buck: da9211@68 { | |
103 | compatible = "dlg,da9211"; | |
104 | reg = <0x68>; | |
105 | ||
106 | regulators { | |
107 | da9211_vcpu_reg: BUCKA { | |
108 | regulator-name = "VBUCKA"; | |
109 | regulator-min-microvolt = < 700000>; | |
110 | regulator-max-microvolt = <1310000>; | |
111 | regulator-min-microamp = <2000000>; | |
112 | regulator-max-microamp = <4400000>; | |
113 | regulator-ramp-delay = <10000>; | |
114 | regulator-always-on; | |
115 | }; | |
116 | ||
117 | da9211_vgpu_reg: BUCKB { | |
118 | regulator-name = "VBUCKB"; | |
119 | regulator-min-microvolt = < 700000>; | |
120 | regulator-max-microvolt = <1310000>; | |
121 | regulator-min-microamp = <2000000>; | |
122 | regulator-max-microamp = <3000000>; | |
123 | regulator-ramp-delay = <10000>; | |
124 | }; | |
125 | }; | |
126 | }; | |
127 | }; | |
128 | ||
9719fa5a EH |
129 | &mmc0 { |
130 | status = "okay"; | |
131 | pinctrl-names = "default", "state_uhs"; | |
132 | pinctrl-0 = <&mmc0_pins_default>; | |
133 | pinctrl-1 = <&mmc0_pins_uhs>; | |
134 | bus-width = <8>; | |
135 | max-frequency = <50000000>; | |
136 | cap-mmc-highspeed; | |
1c080365 | 137 | mediatek,hs200-cmd-int-delay=<26>; |
138 | mediatek,hs400-cmd-int-delay=<14>; | |
139 | mediatek,hs400-cmd-resp-sel-rising; | |
9719fa5a EH |
140 | vmmc-supply = <&mt6397_vemc_3v3_reg>; |
141 | vqmmc-supply = <&mt6397_vio18_reg>; | |
142 | non-removable; | |
143 | }; | |
144 | ||
145 | &mmc1 { | |
146 | status = "okay"; | |
147 | pinctrl-names = "default", "state_uhs"; | |
148 | pinctrl-0 = <&mmc1_pins_default>; | |
149 | pinctrl-1 = <&mmc1_pins_uhs>; | |
150 | bus-width = <4>; | |
151 | max-frequency = <50000000>; | |
152 | cap-sd-highspeed; | |
153 | sd-uhs-sdr25; | |
154 | cd-gpios = <&pio 132 0>; | |
155 | vmmc-supply = <&mt6397_vmch_reg>; | |
156 | vqmmc-supply = <&mt6397_vmc_reg>; | |
157 | }; | |
158 | ||
159 | &pio { | |
61aee934 YH |
160 | disp_pwm0_pins: disp_pwm0_pins { |
161 | pins1 { | |
162 | pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>; | |
163 | output-low; | |
164 | }; | |
165 | }; | |
166 | ||
9719fa5a EH |
167 | mmc0_pins_default: mmc0default { |
168 | pins_cmd_dat { | |
169 | pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, | |
170 | <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>, | |
171 | <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>, | |
172 | <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>, | |
173 | <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>, | |
174 | <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>, | |
175 | <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>, | |
176 | <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>, | |
177 | <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>; | |
178 | input-enable; | |
179 | bias-pull-up; | |
180 | }; | |
181 | ||
182 | pins_clk { | |
183 | pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>; | |
184 | bias-pull-down; | |
185 | }; | |
186 | ||
187 | pins_rst { | |
188 | pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>; | |
189 | bias-pull-up; | |
190 | }; | |
191 | }; | |
192 | ||
193 | mmc1_pins_default: mmc1default { | |
194 | pins_cmd_dat { | |
195 | pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>, | |
196 | <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>, | |
197 | <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>, | |
198 | <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>, | |
199 | <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>; | |
200 | input-enable; | |
201 | drive-strength = <MTK_DRIVE_4mA>; | |
202 | bias-pull-up = <MTK_PUPD_SET_R1R0_10>; | |
203 | }; | |
204 | ||
205 | pins_clk { | |
206 | pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>; | |
207 | bias-pull-down; | |
208 | drive-strength = <MTK_DRIVE_4mA>; | |
209 | }; | |
210 | ||
211 | pins_insert { | |
212 | pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>; | |
213 | bias-pull-up; | |
214 | }; | |
215 | }; | |
216 | ||
217 | mmc0_pins_uhs: mmc0 { | |
218 | pins_cmd_dat { | |
219 | pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, | |
220 | <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>, | |
221 | <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>, | |
222 | <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>, | |
223 | <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>, | |
224 | <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>, | |
225 | <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>, | |
226 | <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>, | |
227 | <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>; | |
228 | input-enable; | |
229 | drive-strength = <MTK_DRIVE_2mA>; | |
230 | bias-pull-up = <MTK_PUPD_SET_R1R0_01>; | |
231 | }; | |
232 | ||
233 | pins_clk { | |
234 | pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>; | |
235 | drive-strength = <MTK_DRIVE_2mA>; | |
236 | bias-pull-down = <MTK_PUPD_SET_R1R0_01>; | |
237 | }; | |
238 | ||
239 | pins_rst { | |
240 | pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>; | |
241 | bias-pull-up; | |
242 | }; | |
243 | }; | |
244 | ||
245 | mmc1_pins_uhs: mmc1 { | |
246 | pins_cmd_dat { | |
247 | pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>, | |
248 | <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>, | |
249 | <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>, | |
250 | <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>, | |
251 | <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>; | |
252 | input-enable; | |
253 | drive-strength = <MTK_DRIVE_4mA>; | |
254 | bias-pull-up = <MTK_PUPD_SET_R1R0_10>; | |
255 | }; | |
256 | ||
257 | pins_clk { | |
258 | pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>; | |
259 | drive-strength = <MTK_DRIVE_4mA>; | |
260 | bias-pull-down = <MTK_PUPD_SET_R1R0_10>; | |
261 | }; | |
262 | }; | |
c0891284 CY |
263 | |
264 | usb_id_pins_float: usb_iddig_pull_up { | |
265 | pins_iddig { | |
266 | pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>; | |
267 | bias-pull-up; | |
268 | }; | |
269 | }; | |
270 | ||
271 | usb_id_pins_ground: usb_iddig_pull_down { | |
272 | pins_iddig { | |
273 | pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>; | |
274 | bias-pull-down; | |
275 | }; | |
276 | }; | |
9719fa5a EH |
277 | }; |
278 | ||
61aee934 YH |
279 | &pwm0 { |
280 | pinctrl-names = "default"; | |
281 | pinctrl-0 = <&disp_pwm0_pins>; | |
282 | status = "okay"; | |
283 | }; | |
284 | ||
16ea61fc | 285 | &pwrap { |
3ea064b1 EH |
286 | /* Only MT8173 E1 needs USB power domain */ |
287 | power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; | |
288 | ||
16ea61fc EH |
289 | pmic: mt6397 { |
290 | compatible = "mediatek,mt6397"; | |
291 | interrupt-parent = <&pio>; | |
292 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; | |
293 | interrupt-controller; | |
294 | #interrupt-cells = <2>; | |
295 | ||
296 | mt6397regulator: mt6397regulator { | |
297 | compatible = "mediatek,mt6397-regulator"; | |
298 | ||
299 | mt6397_vpca15_reg: buck_vpca15 { | |
300 | regulator-compatible = "buck_vpca15"; | |
301 | regulator-name = "vpca15"; | |
302 | regulator-min-microvolt = < 700000>; | |
303 | regulator-max-microvolt = <1350000>; | |
304 | regulator-ramp-delay = <12500>; | |
305 | regulator-always-on; | |
306 | }; | |
307 | ||
308 | mt6397_vpca7_reg: buck_vpca7 { | |
309 | regulator-compatible = "buck_vpca7"; | |
310 | regulator-name = "vpca7"; | |
311 | regulator-min-microvolt = < 700000>; | |
312 | regulator-max-microvolt = <1350000>; | |
313 | regulator-ramp-delay = <12500>; | |
314 | regulator-enable-ramp-delay = <115>; | |
315 | }; | |
316 | ||
317 | mt6397_vsramca15_reg: buck_vsramca15 { | |
318 | regulator-compatible = "buck_vsramca15"; | |
319 | regulator-name = "vsramca15"; | |
320 | regulator-min-microvolt = < 700000>; | |
321 | regulator-max-microvolt = <1350000>; | |
322 | regulator-ramp-delay = <12500>; | |
323 | regulator-always-on; | |
324 | }; | |
325 | ||
326 | mt6397_vsramca7_reg: buck_vsramca7 { | |
327 | regulator-compatible = "buck_vsramca7"; | |
328 | regulator-name = "vsramca7"; | |
329 | regulator-min-microvolt = < 700000>; | |
330 | regulator-max-microvolt = <1350000>; | |
331 | regulator-ramp-delay = <12500>; | |
332 | regulator-always-on; | |
333 | }; | |
334 | ||
335 | mt6397_vcore_reg: buck_vcore { | |
336 | regulator-compatible = "buck_vcore"; | |
337 | regulator-name = "vcore"; | |
338 | regulator-min-microvolt = < 700000>; | |
339 | regulator-max-microvolt = <1350000>; | |
340 | regulator-ramp-delay = <12500>; | |
341 | regulator-always-on; | |
342 | }; | |
343 | ||
344 | mt6397_vgpu_reg: buck_vgpu { | |
345 | regulator-compatible = "buck_vgpu"; | |
346 | regulator-name = "vgpu"; | |
347 | regulator-min-microvolt = < 700000>; | |
348 | regulator-max-microvolt = <1350000>; | |
349 | regulator-ramp-delay = <12500>; | |
350 | regulator-enable-ramp-delay = <115>; | |
351 | }; | |
352 | ||
353 | mt6397_vdrm_reg: buck_vdrm { | |
354 | regulator-compatible = "buck_vdrm"; | |
355 | regulator-name = "vdrm"; | |
356 | regulator-min-microvolt = <1200000>; | |
357 | regulator-max-microvolt = <1400000>; | |
358 | regulator-ramp-delay = <12500>; | |
359 | regulator-always-on; | |
360 | }; | |
361 | ||
362 | mt6397_vio18_reg: buck_vio18 { | |
363 | regulator-compatible = "buck_vio18"; | |
364 | regulator-name = "vio18"; | |
365 | regulator-min-microvolt = <1620000>; | |
366 | regulator-max-microvolt = <1980000>; | |
367 | regulator-ramp-delay = <12500>; | |
368 | regulator-always-on; | |
369 | }; | |
370 | ||
371 | mt6397_vtcxo_reg: ldo_vtcxo { | |
372 | regulator-compatible = "ldo_vtcxo"; | |
373 | regulator-name = "vtcxo"; | |
374 | regulator-always-on; | |
375 | }; | |
376 | ||
377 | mt6397_va28_reg: ldo_va28 { | |
378 | regulator-compatible = "ldo_va28"; | |
379 | regulator-name = "va28"; | |
380 | regulator-always-on; | |
381 | }; | |
382 | ||
383 | mt6397_vcama_reg: ldo_vcama { | |
384 | regulator-compatible = "ldo_vcama"; | |
385 | regulator-name = "vcama"; | |
386 | regulator-min-microvolt = <1500000>; | |
387 | regulator-max-microvolt = <2800000>; | |
388 | regulator-enable-ramp-delay = <218>; | |
389 | }; | |
390 | ||
391 | mt6397_vio28_reg: ldo_vio28 { | |
392 | regulator-compatible = "ldo_vio28"; | |
393 | regulator-name = "vio28"; | |
394 | regulator-always-on; | |
395 | }; | |
396 | ||
397 | mt6397_vusb_reg: ldo_vusb { | |
398 | regulator-compatible = "ldo_vusb"; | |
399 | regulator-name = "vusb"; | |
400 | }; | |
401 | ||
402 | mt6397_vmc_reg: ldo_vmc { | |
403 | regulator-compatible = "ldo_vmc"; | |
404 | regulator-name = "vmc"; | |
405 | regulator-min-microvolt = <1800000>; | |
406 | regulator-max-microvolt = <3300000>; | |
407 | regulator-enable-ramp-delay = <218>; | |
408 | }; | |
409 | ||
410 | mt6397_vmch_reg: ldo_vmch { | |
411 | regulator-compatible = "ldo_vmch"; | |
412 | regulator-name = "vmch"; | |
413 | regulator-min-microvolt = <3000000>; | |
414 | regulator-max-microvolt = <3300000>; | |
415 | regulator-enable-ramp-delay = <218>; | |
416 | }; | |
417 | ||
418 | mt6397_vemc_3v3_reg: ldo_vemc3v3 { | |
419 | regulator-compatible = "ldo_vemc3v3"; | |
420 | regulator-name = "vemc_3v3"; | |
421 | regulator-min-microvolt = <3000000>; | |
422 | regulator-max-microvolt = <3300000>; | |
423 | regulator-enable-ramp-delay = <218>; | |
424 | }; | |
425 | ||
426 | mt6397_vgp1_reg: ldo_vgp1 { | |
427 | regulator-compatible = "ldo_vgp1"; | |
428 | regulator-name = "vcamd"; | |
429 | regulator-min-microvolt = <1220000>; | |
430 | regulator-max-microvolt = <3300000>; | |
431 | regulator-enable-ramp-delay = <240>; | |
432 | }; | |
433 | ||
434 | mt6397_vgp2_reg: ldo_vgp2 { | |
435 | regulator-compatible = "ldo_vgp2"; | |
436 | regulator-name = "vcamio"; | |
437 | regulator-min-microvolt = <1000000>; | |
438 | regulator-max-microvolt = <3300000>; | |
439 | regulator-enable-ramp-delay = <218>; | |
440 | }; | |
441 | ||
442 | mt6397_vgp3_reg: ldo_vgp3 { | |
443 | regulator-compatible = "ldo_vgp3"; | |
444 | regulator-name = "vcamaf"; | |
445 | regulator-min-microvolt = <1200000>; | |
446 | regulator-max-microvolt = <3300000>; | |
447 | regulator-enable-ramp-delay = <218>; | |
448 | }; | |
449 | ||
450 | mt6397_vgp4_reg: ldo_vgp4 { | |
451 | regulator-compatible = "ldo_vgp4"; | |
452 | regulator-name = "vgp4"; | |
453 | regulator-min-microvolt = <1200000>; | |
454 | regulator-max-microvolt = <3300000>; | |
455 | regulator-enable-ramp-delay = <218>; | |
456 | }; | |
457 | ||
458 | mt6397_vgp5_reg: ldo_vgp5 { | |
459 | regulator-compatible = "ldo_vgp5"; | |
460 | regulator-name = "vgp5"; | |
461 | regulator-min-microvolt = <1200000>; | |
462 | regulator-max-microvolt = <3000000>; | |
463 | regulator-enable-ramp-delay = <218>; | |
464 | }; | |
465 | ||
466 | mt6397_vgp6_reg: ldo_vgp6 { | |
467 | regulator-compatible = "ldo_vgp6"; | |
468 | regulator-name = "vgp6"; | |
469 | regulator-min-microvolt = <1200000>; | |
470 | regulator-max-microvolt = <3300000>; | |
471 | regulator-enable-ramp-delay = <218>; | |
472 | }; | |
473 | ||
474 | mt6397_vibr_reg: ldo_vibr { | |
475 | regulator-compatible = "ldo_vibr"; | |
476 | regulator-name = "vibr"; | |
477 | regulator-min-microvolt = <1300000>; | |
478 | regulator-max-microvolt = <3300000>; | |
479 | regulator-enable-ramp-delay = <218>; | |
480 | }; | |
481 | }; | |
482 | }; | |
483 | }; | |
484 | ||
b0c936f5 LL |
485 | &pio { |
486 | spi_pins_a: spi0 { | |
487 | pins_spi { | |
488 | pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>, | |
489 | <MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>, | |
490 | <MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>, | |
491 | <MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>; | |
492 | }; | |
493 | }; | |
494 | }; | |
495 | ||
496 | &spi { | |
497 | pinctrl-names = "default"; | |
498 | pinctrl-0 = <&spi_pins_a>; | |
499 | mediatek,pad-select = <0>; | |
500 | status = "okay"; | |
501 | }; | |
502 | ||
c0891284 CY |
503 | &ssusb { |
504 | vusb33-supply = <&mt6397_vusb_reg>; | |
505 | vbus-supply = <&usb_p0_vbus>; | |
506 | extcon = <&extcon_usb>; | |
507 | dr_mode = "otg"; | |
508 | mediatek,enable-wakeup; | |
509 | pinctrl-names = "default", "id_float", "id_ground"; | |
510 | pinctrl-0 = <&usb_id_pins_float>; | |
511 | pinctrl-1 = <&usb_id_pins_float>; | |
512 | pinctrl-2 = <&usb_id_pins_ground>; | |
513 | status = "okay"; | |
514 | }; | |
515 | ||
b3a37248 EH |
516 | &uart0 { |
517 | status = "okay"; | |
518 | }; | |
bfcce47a | 519 | |
c0891284 | 520 | &usb_host { |
bfcce47a CY |
521 | vusb33-supply = <&mt6397_vusb_reg>; |
522 | vbus-supply = <&usb_p1_vbus>; | |
c0891284 | 523 | status = "okay"; |
bfcce47a | 524 | }; |