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Commit | Line | Data |
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97fb5e8d | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1b08a582 II |
2 | /* |
3 | * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. | |
1b08a582 II |
4 | */ |
5 | ||
6 | &msmgpio { | |
7 | ||
9f43020d AG |
8 | blsp1_uart1_default: blsp1_uart1_default { |
9 | pinmux { | |
10 | function = "blsp_uart1"; | |
806c765e II |
11 | // TX, RX, CTS_N, RTS_N |
12 | pins = "gpio0", "gpio1", | |
13 | "gpio2", "gpio3"; | |
9f43020d AG |
14 | }; |
15 | pinconf { | |
806c765e II |
16 | pins = "gpio0", "gpio1", |
17 | "gpio2", "gpio3"; | |
9f43020d AG |
18 | drive-strength = <16>; |
19 | bias-disable; | |
20 | }; | |
21 | }; | |
22 | ||
23 | blsp1_uart1_sleep: blsp1_uart1_sleep { | |
24 | pinmux { | |
25 | function = "gpio"; | |
806c765e II |
26 | pins = "gpio0", "gpio1", |
27 | "gpio2", "gpio3"; | |
9f43020d AG |
28 | }; |
29 | pinconf { | |
806c765e II |
30 | pins = "gpio0", "gpio1", |
31 | "gpio2", "gpio3"; | |
9f43020d AG |
32 | drive-strength = <2>; |
33 | bias-pull-down; | |
34 | }; | |
35 | }; | |
36 | ||
1b08a582 II |
37 | blsp1_uart2_default: blsp1_uart2_default { |
38 | pinmux { | |
39 | function = "blsp_uart2"; | |
40 | pins = "gpio4", "gpio5"; | |
41 | }; | |
42 | pinconf { | |
43 | pins = "gpio4", "gpio5"; | |
44 | drive-strength = <16>; | |
45 | bias-disable; | |
46 | }; | |
47 | }; | |
48 | ||
49 | blsp1_uart2_sleep: blsp1_uart2_sleep { | |
50 | pinmux { | |
9f43020d | 51 | function = "gpio"; |
1b08a582 II |
52 | pins = "gpio4", "gpio5"; |
53 | }; | |
54 | pinconf { | |
55 | pins = "gpio4", "gpio5"; | |
56 | drive-strength = <2>; | |
57 | bias-pull-down; | |
58 | }; | |
59 | }; | |
60 | ||
61 | spi1_default: spi1_default { | |
62 | pinmux { | |
63 | function = "blsp_spi1"; | |
64 | pins = "gpio0", "gpio1", "gpio3"; | |
65 | }; | |
66 | pinmux_cs { | |
67 | function = "gpio"; | |
68 | pins = "gpio2"; | |
69 | }; | |
70 | pinconf { | |
71 | pins = "gpio0", "gpio1", "gpio3"; | |
72 | drive-strength = <12>; | |
73 | bias-disable; | |
74 | }; | |
75 | pinconf_cs { | |
76 | pins = "gpio2"; | |
93a35141 | 77 | drive-strength = <16>; |
1b08a582 II |
78 | bias-disable; |
79 | output-high; | |
80 | }; | |
81 | }; | |
82 | ||
83 | spi1_sleep: spi1_sleep { | |
84 | pinmux { | |
85 | function = "gpio"; | |
86 | pins = "gpio0", "gpio1", "gpio2", "gpio3"; | |
87 | }; | |
88 | pinconf { | |
89 | pins = "gpio0", "gpio1", "gpio2", "gpio3"; | |
90 | drive-strength = <2>; | |
91 | bias-pull-down; | |
92 | }; | |
93 | }; | |
94 | ||
95 | spi2_default: spi2_default { | |
96 | pinmux { | |
97 | function = "blsp_spi2"; | |
98 | pins = "gpio4", "gpio5", "gpio7"; | |
99 | }; | |
100 | pinmux_cs { | |
101 | function = "gpio"; | |
102 | pins = "gpio6"; | |
103 | }; | |
104 | pinconf { | |
df984b8b | 105 | pins = "gpio4", "gpio5", "gpio7"; |
1b08a582 II |
106 | drive-strength = <12>; |
107 | bias-disable; | |
108 | }; | |
109 | pinconf_cs { | |
110 | pins = "gpio6"; | |
93a35141 | 111 | drive-strength = <16>; |
1b08a582 II |
112 | bias-disable; |
113 | output-high; | |
114 | }; | |
115 | }; | |
116 | ||
117 | spi2_sleep: spi2_sleep { | |
118 | pinmux { | |
119 | function = "gpio"; | |
120 | pins = "gpio4", "gpio5", "gpio6", "gpio7"; | |
121 | }; | |
122 | pinconf { | |
123 | pins = "gpio4", "gpio5", "gpio6", "gpio7"; | |
124 | drive-strength = <2>; | |
125 | bias-pull-down; | |
126 | }; | |
127 | }; | |
128 | ||
129 | spi3_default: spi3_default { | |
130 | pinmux { | |
131 | function = "blsp_spi3"; | |
132 | pins = "gpio8", "gpio9", "gpio11"; | |
133 | }; | |
134 | pinmux_cs { | |
135 | function = "gpio"; | |
136 | pins = "gpio10"; | |
137 | }; | |
138 | pinconf { | |
df984b8b | 139 | pins = "gpio8", "gpio9", "gpio11"; |
1b08a582 II |
140 | drive-strength = <12>; |
141 | bias-disable; | |
142 | }; | |
143 | pinconf_cs { | |
144 | pins = "gpio10"; | |
93a35141 | 145 | drive-strength = <16>; |
1b08a582 II |
146 | bias-disable; |
147 | output-high; | |
148 | }; | |
149 | }; | |
150 | ||
151 | spi3_sleep: spi3_sleep { | |
152 | pinmux { | |
153 | function = "gpio"; | |
154 | pins = "gpio8", "gpio9", "gpio10", "gpio11"; | |
155 | }; | |
156 | pinconf { | |
157 | pins = "gpio8", "gpio9", "gpio10", "gpio11"; | |
158 | drive-strength = <2>; | |
159 | bias-pull-down; | |
160 | }; | |
161 | }; | |
162 | ||
163 | spi4_default: spi4_default { | |
164 | pinmux { | |
165 | function = "blsp_spi4"; | |
166 | pins = "gpio12", "gpio13", "gpio15"; | |
167 | }; | |
168 | pinmux_cs { | |
169 | function = "gpio"; | |
170 | pins = "gpio14"; | |
171 | }; | |
172 | pinconf { | |
df984b8b | 173 | pins = "gpio12", "gpio13", "gpio15"; |
1b08a582 II |
174 | drive-strength = <12>; |
175 | bias-disable; | |
176 | }; | |
177 | pinconf_cs { | |
178 | pins = "gpio14"; | |
93a35141 | 179 | drive-strength = <16>; |
1b08a582 II |
180 | bias-disable; |
181 | output-high; | |
182 | }; | |
183 | }; | |
184 | ||
185 | spi4_sleep: spi4_sleep { | |
186 | pinmux { | |
187 | function = "gpio"; | |
188 | pins = "gpio12", "gpio13", "gpio14", "gpio15"; | |
189 | }; | |
190 | pinconf { | |
191 | pins = "gpio12", "gpio13", "gpio14", "gpio15"; | |
192 | drive-strength = <2>; | |
193 | bias-pull-down; | |
194 | }; | |
195 | }; | |
196 | ||
197 | spi5_default: spi5_default { | |
198 | pinmux { | |
199 | function = "blsp_spi5"; | |
200 | pins = "gpio16", "gpio17", "gpio19"; | |
201 | }; | |
202 | pinmux_cs { | |
203 | function = "gpio"; | |
204 | pins = "gpio18"; | |
205 | }; | |
206 | pinconf { | |
df984b8b | 207 | pins = "gpio16", "gpio17", "gpio19"; |
1b08a582 II |
208 | drive-strength = <12>; |
209 | bias-disable; | |
210 | }; | |
211 | pinconf_cs { | |
212 | pins = "gpio18"; | |
93a35141 | 213 | drive-strength = <16>; |
1b08a582 II |
214 | bias-disable; |
215 | output-high; | |
216 | }; | |
217 | }; | |
218 | ||
219 | spi5_sleep: spi5_sleep { | |
220 | pinmux { | |
221 | function = "gpio"; | |
222 | pins = "gpio16", "gpio17", "gpio18", "gpio19"; | |
223 | }; | |
224 | pinconf { | |
225 | pins = "gpio16", "gpio17", "gpio18", "gpio19"; | |
226 | drive-strength = <2>; | |
227 | bias-pull-down; | |
228 | }; | |
229 | }; | |
230 | ||
231 | spi6_default: spi6_default { | |
232 | pinmux { | |
233 | function = "blsp_spi6"; | |
234 | pins = "gpio20", "gpio21", "gpio23"; | |
235 | }; | |
236 | pinmux_cs { | |
237 | function = "gpio"; | |
238 | pins = "gpio22"; | |
239 | }; | |
240 | pinconf { | |
df984b8b | 241 | pins = "gpio20", "gpio21", "gpio23"; |
1b08a582 II |
242 | drive-strength = <12>; |
243 | bias-disable; | |
244 | }; | |
245 | pinconf_cs { | |
246 | pins = "gpio22"; | |
93a35141 | 247 | drive-strength = <16>; |
1b08a582 II |
248 | bias-disable; |
249 | output-high; | |
250 | }; | |
251 | }; | |
252 | ||
253 | spi6_sleep: spi6_sleep { | |
254 | pinmux { | |
255 | function = "gpio"; | |
256 | pins = "gpio20", "gpio21", "gpio22", "gpio23"; | |
257 | }; | |
258 | pinconf { | |
259 | pins = "gpio20", "gpio21", "gpio22", "gpio23"; | |
260 | drive-strength = <2>; | |
261 | bias-pull-down; | |
262 | }; | |
263 | }; | |
264 | ||
7f5b0921 SK |
265 | i2c2_default: i2c2_default { |
266 | pinmux { | |
267 | function = "blsp_i2c2"; | |
268 | pins = "gpio6", "gpio7"; | |
269 | }; | |
270 | pinconf { | |
271 | pins = "gpio6", "gpio7"; | |
c240f29e | 272 | drive-strength = <16>; |
06c73e62 | 273 | bias-disable; |
7f5b0921 SK |
274 | }; |
275 | }; | |
276 | ||
277 | i2c2_sleep: i2c2_sleep { | |
278 | pinmux { | |
279 | function = "gpio"; | |
280 | pins = "gpio6", "gpio7"; | |
281 | }; | |
282 | pinconf { | |
283 | pins = "gpio6", "gpio7"; | |
284 | drive-strength = <2>; | |
06c73e62 | 285 | bias-disable; |
7f5b0921 SK |
286 | }; |
287 | }; | |
288 | ||
1b08a582 II |
289 | i2c4_default: i2c4_default { |
290 | pinmux { | |
291 | function = "blsp_i2c4"; | |
292 | pins = "gpio14", "gpio15"; | |
293 | }; | |
294 | pinconf { | |
295 | pins = "gpio14", "gpio15"; | |
c240f29e | 296 | drive-strength = <16>; |
06c73e62 | 297 | bias-disable; |
1b08a582 II |
298 | }; |
299 | }; | |
300 | ||
301 | i2c4_sleep: i2c4_sleep { | |
302 | pinmux { | |
dce4f63b | 303 | function = "gpio"; |
1b08a582 II |
304 | pins = "gpio14", "gpio15"; |
305 | }; | |
306 | pinconf { | |
307 | pins = "gpio14", "gpio15"; | |
308 | drive-strength = <2>; | |
06c73e62 | 309 | bias-disable; |
1b08a582 II |
310 | }; |
311 | }; | |
312 | ||
7f5b0921 SK |
313 | i2c6_default: i2c6_default { |
314 | pinmux { | |
315 | function = "blsp_i2c6"; | |
316 | pins = "gpio22", "gpio23"; | |
317 | }; | |
318 | pinconf { | |
319 | pins = "gpio22", "gpio23"; | |
c240f29e | 320 | drive-strength = <16>; |
06c73e62 | 321 | bias-disable; |
7f5b0921 SK |
322 | }; |
323 | }; | |
324 | ||
325 | i2c6_sleep: i2c6_sleep { | |
326 | pinmux { | |
327 | function = "gpio"; | |
328 | pins = "gpio22", "gpio23"; | |
329 | }; | |
330 | pinconf { | |
331 | pins = "gpio22", "gpio23"; | |
332 | drive-strength = <2>; | |
06c73e62 | 333 | bias-disable; |
7f5b0921 SK |
334 | }; |
335 | }; | |
336 | ||
1b08a582 II |
337 | pmx_sdc1_clk { |
338 | sdc1_clk_on: clk_on { | |
339 | pinmux { | |
340 | pins = "sdc1_clk"; | |
341 | }; | |
342 | pinconf { | |
343 | pins = "sdc1_clk"; | |
344 | bias-disable; | |
345 | drive-strength = <16>; | |
346 | }; | |
347 | }; | |
348 | sdc1_clk_off: clk_off { | |
349 | pinmux { | |
350 | pins = "sdc1_clk"; | |
351 | }; | |
352 | pinconf { | |
353 | pins = "sdc1_clk"; | |
354 | bias-disable; | |
355 | drive-strength = <2>; | |
356 | }; | |
357 | }; | |
358 | }; | |
359 | ||
360 | pmx_sdc1_cmd { | |
361 | sdc1_cmd_on: cmd_on { | |
362 | pinmux { | |
363 | pins = "sdc1_cmd"; | |
364 | }; | |
365 | pinconf { | |
366 | pins = "sdc1_cmd"; | |
367 | bias-pull-up; | |
368 | drive-strength = <10>; | |
369 | }; | |
370 | }; | |
371 | sdc1_cmd_off: cmd_off { | |
372 | pinmux { | |
373 | pins = "sdc1_cmd"; | |
374 | }; | |
375 | pinconf { | |
376 | pins = "sdc1_cmd"; | |
377 | bias-pull-up; | |
378 | drive-strength = <2>; | |
379 | }; | |
380 | }; | |
381 | }; | |
382 | ||
383 | pmx_sdc1_data { | |
384 | sdc1_data_on: data_on { | |
385 | pinmux { | |
386 | pins = "sdc1_data"; | |
387 | }; | |
388 | pinconf { | |
389 | pins = "sdc1_data"; | |
390 | bias-pull-up; | |
391 | drive-strength = <10>; | |
392 | }; | |
393 | }; | |
394 | sdc1_data_off: data_off { | |
395 | pinmux { | |
396 | pins = "sdc1_data"; | |
397 | }; | |
398 | pinconf { | |
399 | pins = "sdc1_data"; | |
400 | bias-pull-up; | |
401 | drive-strength = <2>; | |
402 | }; | |
403 | }; | |
404 | }; | |
405 | ||
406 | pmx_sdc2_clk { | |
407 | sdc2_clk_on: clk_on { | |
408 | pinmux { | |
409 | pins = "sdc2_clk"; | |
410 | }; | |
411 | pinconf { | |
412 | pins = "sdc2_clk"; | |
413 | bias-disable; | |
414 | drive-strength = <16>; | |
415 | }; | |
416 | }; | |
417 | sdc2_clk_off: clk_off { | |
418 | pinmux { | |
419 | pins = "sdc2_clk"; | |
420 | }; | |
421 | pinconf { | |
422 | pins = "sdc2_clk"; | |
423 | bias-disable; | |
424 | drive-strength = <2>; | |
425 | }; | |
426 | }; | |
427 | }; | |
428 | ||
429 | pmx_sdc2_cmd { | |
430 | sdc2_cmd_on: cmd_on { | |
431 | pinmux { | |
432 | pins = "sdc2_cmd"; | |
433 | }; | |
434 | pinconf { | |
435 | pins = "sdc2_cmd"; | |
436 | bias-pull-up; | |
437 | drive-strength = <10>; | |
438 | }; | |
439 | }; | |
440 | sdc2_cmd_off: cmd_off { | |
441 | pinmux { | |
442 | pins = "sdc2_cmd"; | |
443 | }; | |
444 | pinconf { | |
445 | pins = "sdc2_cmd"; | |
446 | bias-pull-up; | |
447 | drive-strength = <2>; | |
448 | }; | |
449 | }; | |
450 | }; | |
451 | ||
452 | pmx_sdc2_data { | |
453 | sdc2_data_on: data_on { | |
454 | pinmux { | |
455 | pins = "sdc2_data"; | |
456 | }; | |
457 | pinconf { | |
458 | pins = "sdc2_data"; | |
459 | bias-pull-up; | |
460 | drive-strength = <10>; | |
461 | }; | |
462 | }; | |
463 | sdc2_data_off: data_off { | |
464 | pinmux { | |
465 | pins = "sdc2_data"; | |
466 | }; | |
467 | pinconf { | |
468 | pins = "sdc2_data"; | |
469 | bias-pull-up; | |
470 | drive-strength = <2>; | |
471 | }; | |
472 | }; | |
473 | }; | |
143bb9ad | 474 | |
3785630d DR |
475 | pmx_sdc2_cd_pin { |
476 | sdc2_cd_on: cd_on { | |
477 | pinmux { | |
478 | function = "gpio"; | |
479 | pins = "gpio38"; | |
480 | }; | |
481 | pinconf { | |
482 | pins = "gpio38"; | |
483 | drive-strength = <2>; | |
484 | bias-pull-up; | |
485 | }; | |
486 | }; | |
487 | sdc2_cd_off: cd_off { | |
488 | pinmux { | |
489 | function = "gpio"; | |
490 | pins = "gpio38"; | |
491 | }; | |
492 | pinconf { | |
493 | pins = "gpio38"; | |
494 | drive-strength = <2>; | |
495 | bias-disable; | |
496 | }; | |
497 | }; | |
498 | }; | |
499 | ||
143bb9ad SK |
500 | cdc-pdm-lines { |
501 | cdc_pdm_lines_act: pdm_lines_on { | |
502 | pinmux { | |
503 | function = "cdc_pdm0"; | |
504 | pins = "gpio63", "gpio64", "gpio65", "gpio66", | |
505 | "gpio67", "gpio68"; | |
506 | }; | |
507 | pinconf { | |
508 | pins = "gpio63", "gpio64", "gpio65", "gpio66", | |
509 | "gpio67", "gpio68"; | |
510 | drive-strength = <8>; | |
511 | bias-pull-none; | |
512 | }; | |
513 | }; | |
514 | cdc_pdm_lines_sus: pdm_lines_off { | |
515 | pinmux { | |
516 | function = "cdc_pdm0"; | |
517 | pins = "gpio63", "gpio64", "gpio65", "gpio66", | |
518 | "gpio67", "gpio68"; | |
519 | }; | |
520 | pinconf { | |
521 | pins = "gpio63", "gpio64", "gpio65", "gpio66", | |
522 | "gpio67", "gpio68"; | |
523 | drive-strength = <2>; | |
524 | bias-disable; | |
525 | }; | |
526 | }; | |
527 | }; | |
528 | ||
529 | ext-pri-tlmm-lines { | |
530 | ext_pri_tlmm_lines_act: ext_pa_on { | |
531 | pinmux { | |
532 | function = "pri_mi2s"; | |
533 | pins = "gpio113", "gpio114", "gpio115", | |
534 | "gpio116"; | |
535 | }; | |
536 | pinconf { | |
537 | pins = "gpio113", "gpio114", "gpio115", | |
538 | "gpio116"; | |
539 | drive-strength = <8>; | |
540 | bias-pull-none; | |
541 | }; | |
542 | }; | |
543 | ||
544 | ext_pri_tlmm_lines_sus: ext_pa_off { | |
545 | pinmux { | |
546 | function = "pri_mi2s"; | |
547 | pins = "gpio113", "gpio114", "gpio115", | |
548 | "gpio116"; | |
549 | }; | |
550 | pinconf { | |
551 | pins = "gpio113", "gpio114", "gpio115", | |
552 | "gpio116"; | |
553 | drive-strength = <2>; | |
554 | bias-disable; | |
555 | }; | |
556 | }; | |
557 | }; | |
558 | ||
559 | ext-pri-ws-line { | |
560 | ext_pri_ws_act: ext_pa_on { | |
561 | pinmux { | |
562 | function = "pri_mi2s_ws"; | |
563 | pins = "gpio110"; | |
564 | }; | |
565 | pinconf { | |
566 | pins = "gpio110"; | |
567 | drive-strength = <8>; | |
568 | bias-pull-none; | |
569 | }; | |
570 | }; | |
571 | ||
572 | ext_pri_ws_sus: ext_pa_off { | |
573 | pinmux { | |
574 | function = "pri_mi2s_ws"; | |
575 | pins = "gpio110"; | |
576 | }; | |
577 | pinconf { | |
578 | pins = "gpio110"; | |
579 | drive-strength = <2>; | |
580 | bias-disable; | |
581 | }; | |
582 | }; | |
583 | }; | |
584 | ||
585 | ext-mclk-tlmm-lines { | |
586 | ext_mclk_tlmm_lines_act: mclk_lines_on { | |
587 | pinmux { | |
588 | function = "pri_mi2s"; | |
589 | pins = "gpio116"; | |
590 | }; | |
591 | pinconf { | |
592 | pins = "gpio116"; | |
593 | drive-strength = <8>; | |
594 | bias-pull-none; | |
595 | }; | |
596 | }; | |
597 | ext_mclk_tlmm_lines_sus: mclk_lines_off { | |
598 | pinmux { | |
599 | function = "pri_mi2s"; | |
600 | pins = "gpio116"; | |
601 | }; | |
602 | pinconf { | |
603 | pins = "gpio116"; | |
604 | drive-strength = <2>; | |
605 | bias-disable; | |
606 | }; | |
607 | }; | |
608 | }; | |
609 | ||
610 | /* secondary Mi2S */ | |
611 | ext-sec-tlmm-lines { | |
612 | ext_sec_tlmm_lines_act: tlmm_lines_on { | |
613 | pinmux { | |
614 | function = "sec_mi2s"; | |
615 | pins = "gpio112", "gpio117", "gpio118", | |
616 | "gpio119"; | |
617 | }; | |
618 | pinconf { | |
619 | pins = "gpio112", "gpio117", "gpio118", | |
620 | "gpio119"; | |
621 | drive-strength = <8>; | |
622 | bias-pull-none; | |
623 | }; | |
624 | }; | |
625 | ext_sec_tlmm_lines_sus: tlmm_lines_off { | |
626 | pinmux { | |
627 | function = "sec_mi2s"; | |
628 | pins = "gpio112", "gpio117", "gpio118", | |
629 | "gpio119"; | |
630 | }; | |
631 | pinconf { | |
632 | pins = "gpio112", "gpio117", "gpio118", | |
633 | "gpio119"; | |
634 | drive-strength = <2>; | |
635 | bias-disable; | |
636 | }; | |
637 | }; | |
638 | }; | |
639 | ||
640 | cdc-dmic-lines { | |
641 | cdc_dmic_lines_act: dmic_lines_on { | |
642 | pinmux_dmic0_clk { | |
643 | function = "dmic0_clk"; | |
644 | pins = "gpio0"; | |
645 | }; | |
646 | pinmux_dmic0_data { | |
647 | function = "dmic0_data"; | |
648 | pins = "gpio1"; | |
649 | }; | |
650 | pinconf { | |
651 | pins = "gpio0", "gpio1"; | |
652 | drive-strength = <8>; | |
653 | }; | |
654 | }; | |
655 | cdc_dmic_lines_sus: dmic_lines_off { | |
342a2922 DR |
656 | pinmux_dmic0_clk { |
657 | function = "dmic0_clk"; | |
658 | pins = "gpio0"; | |
659 | }; | |
660 | pinmux_dmic0_data { | |
661 | function = "dmic0_data"; | |
662 | pins = "gpio1"; | |
663 | }; | |
143bb9ad SK |
664 | pinconf { |
665 | pins = "gpio0", "gpio1"; | |
666 | drive-strength = <2>; | |
667 | bias-disable; | |
668 | }; | |
669 | }; | |
670 | }; | |
671 | ||
88106096 BA |
672 | wcnss_pin_a: wcnss-active { |
673 | pinmux { | |
674 | pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44"; | |
675 | function = "wcss_wlan"; | |
676 | }; | |
677 | ||
678 | pinconf { | |
679 | pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44"; | |
680 | drive-strength = <6>; | |
681 | bias-pull-up; | |
682 | }; | |
683 | }; | |
1ab0fb75 TT |
684 | |
685 | cci0_default: cci0_default { | |
686 | pinmux { | |
687 | function = "cci_i2c"; | |
688 | pins = "gpio29", "gpio30"; | |
689 | }; | |
690 | pinconf { | |
691 | pins = "gpio29", "gpio30"; | |
692 | drive-strength = <16>; | |
693 | bias-disable; | |
694 | }; | |
695 | }; | |
acd48330 TT |
696 | |
697 | camera_front_default: camera_front_default { | |
698 | pinmux_pwdn { | |
699 | function = "gpio"; | |
700 | pins = "gpio33"; | |
701 | }; | |
702 | pinconf_pwdn { | |
703 | pins = "gpio33"; | |
704 | drive-strength = <16>; | |
705 | bias-disable; | |
706 | }; | |
707 | ||
708 | pinmux_rst { | |
709 | function = "gpio"; | |
710 | pins = "gpio28"; | |
711 | }; | |
712 | pinconf_rst { | |
713 | pins = "gpio28"; | |
714 | drive-strength = <16>; | |
715 | bias-disable; | |
716 | }; | |
717 | ||
718 | pinmux_mclk1 { | |
719 | function = "cam_mclk1"; | |
720 | pins = "gpio27"; | |
721 | }; | |
722 | pinconf_mclk1 { | |
723 | pins = "gpio27"; | |
724 | drive-strength = <16>; | |
725 | bias-disable; | |
726 | }; | |
727 | }; | |
728 | ||
729 | camera_rear_default: camera_rear_default { | |
730 | pinmux_pwdn { | |
731 | function = "gpio"; | |
732 | pins = "gpio34"; | |
733 | }; | |
734 | pinconf_pwdn { | |
735 | pins = "gpio34"; | |
736 | drive-strength = <16>; | |
737 | bias-disable; | |
738 | }; | |
739 | ||
740 | pinmux_rst { | |
741 | function = "gpio"; | |
742 | pins = "gpio35"; | |
743 | }; | |
744 | pinconf_rst { | |
745 | pins = "gpio35"; | |
746 | drive-strength = <16>; | |
747 | bias-disable; | |
748 | }; | |
749 | ||
750 | pinmux_mclk0 { | |
751 | function = "cam_mclk0"; | |
752 | pins = "gpio26"; | |
753 | }; | |
754 | pinconf_mclk0 { | |
755 | pins = "gpio26"; | |
756 | drive-strength = <16>; | |
757 | bias-disable; | |
758 | }; | |
759 | }; | |
1b08a582 | 760 | }; |