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97fb5e8d | 1 | // SPDX-License-Identifier: GPL-2.0-only |
6a6d1978 | 2 | /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. |
6a6d1978 JM |
3 | */ |
4 | ||
5 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
6 | #include <dt-bindings/clock/qcom,gcc-msm8994.h> | |
7 | ||
8 | / { | |
9 | model = "Qualcomm Technologies, Inc. MSM 8992"; | |
10 | compatible = "qcom,msm8992"; | |
11 | // msm-id needed by bootloader for selecting correct blob | |
12 | qcom,msm-id = <251 0>, <252 0>; | |
13 | interrupt-parent = <&intc>; | |
14 | ||
15 | #address-cells = <2>; | |
16 | #size-cells = <2>; | |
17 | ||
18 | chosen { }; | |
19 | ||
20 | cpus { | |
21 | #address-cells = <2>; | |
22 | #size-cells = <0>; | |
23 | cpu-map { | |
24 | cluster0 { | |
25 | core0 { | |
26 | cpu = <&CPU0>; | |
27 | }; | |
28 | }; | |
29 | }; | |
30 | ||
31 | CPU0: cpu@0 { | |
32 | device_type = "cpu"; | |
31af04cd | 33 | compatible = "arm,cortex-a53"; |
6a6d1978 JM |
34 | reg = <0x0 0x0>; |
35 | next-level-cache = <&L2_0>; | |
36 | L2_0: l2-cache { | |
37 | compatible = "cache"; | |
38 | cache-level = <2>; | |
39 | }; | |
40 | }; | |
41 | }; | |
42 | ||
43 | timer { | |
44 | compatible = "arm,armv8-timer"; | |
45 | interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
46 | <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
47 | <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
48 | <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; | |
49 | }; | |
50 | ||
51 | xo_board: xo_board { | |
52 | compatible = "fixed-clock"; | |
53 | #clock-cells = <0>; | |
54 | clock-frequency = <19200000>; | |
55 | }; | |
56 | ||
57 | sleep_clk: sleep_clk { | |
58 | compatible = "fixed-clock"; | |
59 | #clock-cells = <0>; | |
60 | clock-frequency = <32768>; | |
61 | }; | |
62 | ||
75a3f782 JM |
63 | vreg_vph_pwr: vreg-vph-pwr { |
64 | compatible = "regulator-fixed"; | |
65 | status = "okay"; | |
66 | regulator-name = "vph-pwr"; | |
67 | ||
68 | regulator-min-microvolt = <3600000>; | |
69 | regulator-max-microvolt = <3600000>; | |
70 | ||
71 | regulator-always-on; | |
72 | }; | |
73 | ||
4255db14 JM |
74 | sfpb_mutex: hwmutex { |
75 | compatible = "qcom,sfpb-mutex"; | |
76 | syscon = <&sfpb_mutex_regs 0x0 0x100>; | |
77 | #hwlock-cells = <1>; | |
78 | }; | |
79 | ||
80 | smem { | |
81 | compatible = "qcom,smem"; | |
82 | memory-region = <&smem_region>; | |
83 | qcom,rpm-msg-ram = <&rpm_msg_ram>; | |
84 | hwlocks = <&sfpb_mutex 3>; | |
85 | }; | |
86 | ||
6a6d1978 JM |
87 | soc { |
88 | #address-cells = <1>; | |
89 | #size-cells = <1>; | |
90 | ranges = <0 0 0 0xffffffff>; | |
91 | compatible = "simple-bus"; | |
92 | ||
93 | intc: interrupt-controller@f9000000 { | |
94 | compatible = "qcom,msm-qgic2"; | |
95 | interrupt-controller; | |
96 | #interrupt-cells = <3>; | |
97 | reg = <0xf9000000 0x1000>, | |
98 | <0xf9002000 0x1000>; | |
99 | }; | |
100 | ||
4255db14 JM |
101 | apcs: syscon@f900d000 { |
102 | compatible = "syscon"; | |
103 | reg = <0xf900d000 0x2000>; | |
104 | }; | |
105 | ||
6a6d1978 JM |
106 | timer@f9020000 { |
107 | #address-cells = <1>; | |
108 | #size-cells = <1>; | |
109 | ranges; | |
110 | compatible = "arm,armv7-timer-mem"; | |
111 | reg = <0xf9020000 0x1000>; | |
112 | ||
113 | frame@f9021000 { | |
114 | frame-number = <0>; | |
115 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, | |
116 | <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
117 | reg = <0xf9021000 0x1000>, | |
118 | <0xf9022000 0x1000>; | |
119 | }; | |
120 | ||
121 | frame@f9023000 { | |
122 | frame-number = <1>; | |
123 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
124 | reg = <0xf9023000 0x1000>; | |
125 | status = "disabled"; | |
126 | }; | |
127 | ||
128 | frame@f9024000 { | |
129 | frame-number = <2>; | |
130 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
131 | reg = <0xf9024000 0x1000>; | |
132 | status = "disabled"; | |
133 | }; | |
134 | ||
135 | frame@f9025000 { | |
136 | frame-number = <3>; | |
137 | interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; | |
138 | reg = <0xf9025000 0x1000>; | |
139 | status = "disabled"; | |
140 | }; | |
141 | ||
142 | frame@f9026000 { | |
143 | frame-number = <4>; | |
144 | interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; | |
145 | reg = <0xf9026000 0x1000>; | |
146 | status = "disabled"; | |
147 | }; | |
148 | ||
149 | frame@f9027000 { | |
150 | frame-number = <5>; | |
151 | interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; | |
152 | reg = <0xf9027000 0x1000>; | |
153 | status = "disabled"; | |
154 | }; | |
155 | ||
156 | frame@f9028000 { | |
157 | frame-number = <6>; | |
158 | interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; | |
159 | reg = <0xf9028000 0x1000>; | |
160 | status = "disabled"; | |
161 | }; | |
162 | }; | |
163 | ||
164 | restart@fc4ab000 { | |
165 | compatible = "qcom,pshold"; | |
166 | reg = <0xfc4ab000 0x4>; | |
167 | }; | |
168 | ||
169 | msmgpio: pinctrl@fd510000 { | |
170 | compatible = "qcom,msm8994-pinctrl"; | |
171 | reg = <0xfd510000 0x4000>; | |
172 | interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; | |
173 | gpio-controller; | |
174 | #gpio-cells = <2>; | |
175 | interrupt-controller; | |
176 | #interrupt-cells = <2>; | |
177 | }; | |
178 | ||
179 | blsp1_uart2: serial@f991e000 { | |
180 | compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; | |
181 | reg = <0xf991e000 0x1000>; | |
182 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>; | |
183 | status = "disabled"; | |
184 | clock-names = "core", "iface"; | |
185 | clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>, | |
186 | <&clock_gcc GCC_BLSP1_AHB_CLK>; | |
187 | }; | |
188 | ||
189 | clock_gcc: clock-controller@fc400000 { | |
190 | compatible = "qcom,gcc-msm8994"; | |
191 | #clock-cells = <1>; | |
192 | #reset-cells = <1>; | |
193 | #power-domain-cells = <1>; | |
194 | reg = <0xfc400000 0x2000>; | |
195 | }; | |
4255db14 | 196 | |
f3b2c99e JM |
197 | sdhci1: mmc@f9824900 { |
198 | compatible = "qcom,sdhci-msm-v4"; | |
199 | reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>; | |
200 | reg-names = "hc_mem", "core_mem"; | |
201 | ||
202 | interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>, | |
203 | <GIC_SPI 138 IRQ_TYPE_NONE>; | |
204 | interrupt-names = "hc_irq", "pwr_irq"; | |
205 | ||
206 | clocks = <&clock_gcc GCC_SDCC1_APPS_CLK>, | |
207 | <&clock_gcc GCC_SDCC1_AHB_CLK>; | |
208 | clock-names = "core", "iface"; | |
209 | ||
210 | pinctrl-names = "default", "sleep"; | |
211 | pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on | |
212 | &sdc1_rclk_on>; | |
213 | pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off | |
214 | &sdc1_rclk_off>; | |
215 | ||
216 | regulator-always-on; | |
217 | bus-width = <8>; | |
218 | mmc-hs400-1_8v; | |
219 | status = "okay"; | |
220 | }; | |
221 | ||
4255db14 JM |
222 | rpm_msg_ram: memory@fc428000 { |
223 | compatible = "qcom,rpm-msg-ram"; | |
224 | reg = <0xfc428000 0x4000>; | |
225 | }; | |
226 | ||
227 | sfpb_mutex_regs: syscon@fd484000 { | |
228 | #address-cells = <1>; | |
229 | #size-cells = <1>; | |
230 | compatible = "syscon"; | |
231 | reg = <0xfd484000 0x400>; | |
232 | }; | |
6a6d1978 JM |
233 | }; |
234 | ||
235 | memory { | |
236 | device_type = "memory"; | |
237 | reg = <0 0 0 0>; // bootloader will update | |
238 | }; | |
4255db14 JM |
239 | |
240 | reserved-memory { | |
241 | #address-cells = <2>; | |
242 | #size-cells = <2>; | |
243 | ranges; | |
244 | ||
245 | smem_region: smem@6a00000 { | |
246 | reg = <0x0 0x6a00000 0x0 0x200000>; | |
247 | no-map; | |
248 | }; | |
249 | }; | |
250 | ||
f3b2c99e JM |
251 | smd_rpm: smd { |
252 | compatible = "qcom,smd"; | |
253 | rpm { | |
254 | interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; | |
255 | qcom,ipc = <&apcs 8 0>; | |
256 | qcom,smd-edge = <15>; | |
257 | qcom,local-pid = <0>; | |
258 | qcom,remote-pid = <6>; | |
259 | ||
260 | rpm-requests { | |
261 | compatible = "qcom,rpm-msm8994"; | |
262 | qcom,smd-channels = "rpm_requests"; | |
263 | ||
264 | pm8994-regulators { | |
265 | compatible = "qcom,rpm-pm8994-regulators"; | |
266 | ||
267 | pm8994_s1: s1 {}; | |
268 | pm8994_s2: s2 {}; | |
269 | pm8994_s3: s3 {}; | |
270 | pm8994_s4: s4 {}; | |
271 | pm8994_s5: s5 {}; | |
272 | pm8994_s6: s6 {}; | |
273 | pm8994_s7: s7 {}; | |
274 | ||
275 | pm8994_l1: l1 {}; | |
276 | pm8994_l2: l2 {}; | |
277 | pm8994_l3: l3 {}; | |
278 | pm8994_l4: l4 {}; | |
279 | pm8994_l6: l6 {}; | |
280 | pm8994_l8: l8 {}; | |
281 | pm8994_l9: l9 {}; | |
282 | pm8994_l10: l10 {}; | |
283 | pm8994_l11: l11 {}; | |
284 | pm8994_l12: l12 {}; | |
285 | pm8994_l13: l13 {}; | |
286 | pm8994_l14: l14 {}; | |
287 | pm8994_l15: l15 {}; | |
288 | pm8994_l16: l16 {}; | |
289 | pm8994_l17: l17 {}; | |
290 | pm8994_l18: l18 {}; | |
291 | pm8994_l19: l19 {}; | |
292 | pm8994_l20: l20 {}; | |
293 | pm8994_l21: l21 {}; | |
294 | pm8994_l22: l22 {}; | |
295 | pm8994_l23: l23 {}; | |
296 | pm8994_l24: l24 {}; | |
297 | pm8994_l25: l25 {}; | |
298 | pm8994_l26: l26 {}; | |
299 | pm8994_l27: l27 {}; | |
300 | pm8994_l28: l28 {}; | |
301 | pm8994_l29: l29 {}; | |
302 | pm8994_l30: l30 {}; | |
303 | pm8994_l31: l31 {}; | |
304 | pm8994_l32: l32 {}; | |
305 | ||
306 | pm8994_lvs1: lvs1 {}; | |
307 | pm8994_lvs2: lvs2 {}; | |
308 | }; | |
309 | }; | |
310 | }; | |
311 | }; | |
6a6d1978 JM |
312 | }; |
313 | ||
6a6d1978 | 314 | #include "msm8992-pins.dtsi" |