projects / mirror_ubuntu-focal-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 1561f207 SH |
1 | /* |
| 2 | * Device Tree Source for the r8a7796 SoC | |
| 3 | * | |
| 4 | * Copyright (C) 2016 Renesas Electronics Corp. | |
| 5 | * | |
| 6 | * This file is licensed under the terms of the GNU General Public License | |
| 7 | * version 2. This program is licensed "as is" without any warranty of any | |
| 8 | * kind, whether express or implied. | |
| 9 | */ | |
| 10 | ||
| 11 | #include <dt-bindings/clock/r8a7796-cpg-mssr.h> | |
| 12 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 56aebae0 | 13 | #include <dt-bindings/power/r8a7796-sysc.h> |
| 1561f207 | 14 | |
| 6fad293d GU |
15 | #define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 |
| 16 | ||
| 1561f207 SH |
17 | / { |
| 18 | compatible = "renesas,r8a7796"; | |
| 19 | #address-cells = <2>; | |
| 20 | #size-cells = <2>; | |
| 21 | ||
| fcb008a7 UH |
22 | aliases { |
| 23 | i2c0 = &i2c0; | |
| 24 | i2c1 = &i2c1; | |
| 25 | i2c2 = &i2c2; | |
| 26 | i2c3 = &i2c3; | |
| 27 | i2c4 = &i2c4; | |
| 28 | i2c5 = &i2c5; | |
| 29 | i2c6 = &i2c6; | |
| 0fb1fd20 | 30 | i2c7 = &i2c_dvfs; |
| fcb008a7 UH |
31 | }; |
| 32 | ||
| 1561f207 | 33 | psci { |
| b3f26910 | 34 | compatible = "arm,psci-1.0", "arm,psci-0.2"; |
| 1561f207 SH |
35 | method = "smc"; |
| 36 | }; | |
| 37 | ||
| 38 | cpus { | |
| 39 | #address-cells = <1>; | |
| 40 | #size-cells = <0>; | |
| 41 | ||
| 1561f207 SH |
42 | a57_0: cpu@0 { |
| 43 | compatible = "arm,cortex-a57", "arm,armv8"; | |
| 44 | reg = <0x0>; | |
| 45 | device_type = "cpu"; | |
| 56aebae0 | 46 | power-domains = <&sysc R8A7796_PD_CA57_CPU0>; |
| 1561f207 SH |
47 | next-level-cache = <&L2_CA57>; |
| 48 | enable-method = "psci"; | |
| 49 | }; | |
| 50 | ||
| 7328be4a TK |
51 | a57_1: cpu@1 { |
| 52 | compatible = "arm,cortex-a57","arm,armv8"; | |
| 53 | reg = <0x1>; | |
| 54 | device_type = "cpu"; | |
| 55 | power-domains = <&sysc R8A7796_PD_CA57_CPU1>; | |
| 56 | next-level-cache = <&L2_CA57>; | |
| 57 | enable-method = "psci"; | |
| 58 | }; | |
| 59 | ||
| b4dc3b4b GU |
60 | a53_0: cpu@100 { |
| 61 | compatible = "arm,cortex-a53", "arm,armv8"; | |
| 62 | reg = <0x100>; | |
| 63 | device_type = "cpu"; | |
| 64 | power-domains = <&sysc R8A7796_PD_CA53_CPU0>; | |
| 65 | next-level-cache = <&L2_CA53>; | |
| 66 | enable-method = "psci"; | |
| 67 | }; | |
| 68 | ||
| 69 | a53_1: cpu@101 { | |
| 70 | compatible = "arm,cortex-a53","arm,armv8"; | |
| 71 | reg = <0x101>; | |
| 72 | device_type = "cpu"; | |
| 73 | power-domains = <&sysc R8A7796_PD_CA53_CPU1>; | |
| 74 | next-level-cache = <&L2_CA53>; | |
| 75 | enable-method = "psci"; | |
| 76 | }; | |
| 77 | ||
| 78 | a53_2: cpu@102 { | |
| 79 | compatible = "arm,cortex-a53","arm,armv8"; | |
| 80 | reg = <0x102>; | |
| 81 | device_type = "cpu"; | |
| 82 | power-domains = <&sysc R8A7796_PD_CA53_CPU2>; | |
| 83 | next-level-cache = <&L2_CA53>; | |
| 84 | enable-method = "psci"; | |
| 85 | }; | |
| 86 | ||
| 87 | a53_3: cpu@103 { | |
| 88 | compatible = "arm,cortex-a53","arm,armv8"; | |
| 89 | reg = <0x103>; | |
| 90 | device_type = "cpu"; | |
| 91 | power-domains = <&sysc R8A7796_PD_CA53_CPU3>; | |
| 92 | next-level-cache = <&L2_CA53>; | |
| 93 | enable-method = "psci"; | |
| 94 | }; | |
| 95 | ||
| 57a4fd42 | 96 | L2_CA57: cache-controller-0 { |
| 1561f207 | 97 | compatible = "cache"; |
| 56aebae0 | 98 | power-domains = <&sysc R8A7796_PD_CA57_SCU>; |
| 1561f207 SH |
99 | cache-unified; |
| 100 | cache-level = <2>; | |
| 101 | }; | |
| a681e6d6 GU |
102 | |
| 103 | L2_CA53: cache-controller-1 { | |
| 104 | compatible = "cache"; | |
| 105 | power-domains = <&sysc R8A7796_PD_CA53_SCU>; | |
| 106 | cache-unified; | |
| 107 | cache-level = <2>; | |
| 108 | }; | |
| 1561f207 SH |
109 | }; |
| 110 | ||
| 111 | extal_clk: extal { | |
| 112 | compatible = "fixed-clock"; | |
| 113 | #clock-cells = <0>; | |
| 114 | /* This value must be overridden by the board */ | |
| 115 | clock-frequency = <0>; | |
| 116 | }; | |
| 117 | ||
| 118 | extalr_clk: extalr { | |
| 119 | compatible = "fixed-clock"; | |
| 120 | #clock-cells = <0>; | |
| 121 | /* This value must be overridden by the board */ | |
| 122 | clock-frequency = <0>; | |
| 123 | }; | |
| 124 | ||
| bab732f8 GU |
125 | /* |
| 126 | * The external audio clocks are configured as 0 Hz fixed frequency | |
| 127 | * clocks by default. | |
| 128 | * Boards that provide audio clocks should override them. | |
| 129 | */ | |
| 130 | audio_clk_a: audio_clk_a { | |
| 131 | compatible = "fixed-clock"; | |
| 132 | #clock-cells = <0>; | |
| 133 | clock-frequency = <0>; | |
| 134 | }; | |
| 135 | ||
| 136 | audio_clk_b: audio_clk_b { | |
| 137 | compatible = "fixed-clock"; | |
| 138 | #clock-cells = <0>; | |
| 139 | clock-frequency = <0>; | |
| 140 | }; | |
| 141 | ||
| 142 | audio_clk_c: audio_clk_c { | |
| 143 | compatible = "fixed-clock"; | |
| 144 | #clock-cells = <0>; | |
| 145 | clock-frequency = <0>; | |
| 146 | }; | |
| 147 | ||
| 8a6de045 CP |
148 | /* External CAN clock - to be overridden by boards that provide it */ |
| 149 | can_clk: can { | |
| 150 | compatible = "fixed-clock"; | |
| 151 | #clock-cells = <0>; | |
| 152 | clock-frequency = <0>; | |
| 153 | }; | |
| 154 | ||
| 1561f207 SH |
155 | /* External SCIF clock - to be overridden by boards that provide it */ |
| 156 | scif_clk: scif { | |
| 157 | compatible = "fixed-clock"; | |
| 158 | #clock-cells = <0>; | |
| 159 | clock-frequency = <0>; | |
| 160 | }; | |
| 161 | ||
| c79fe41b GU |
162 | /* External PCIe clock - can be overridden by the board */ |
| 163 | pcie_bus_clk: pcie_bus { | |
| 164 | compatible = "fixed-clock"; | |
| 165 | #clock-cells = <0>; | |
| 166 | clock-frequency = <0>; | |
| 167 | }; | |
| 168 | ||
| 1561f207 SH |
169 | soc { |
| 170 | compatible = "simple-bus"; | |
| 171 | interrupt-parent = <&gic>; | |
| 172 | #address-cells = <2>; | |
| 173 | #size-cells = <2>; | |
| 174 | ranges; | |
| 175 | ||
| 176 | gic: interrupt-controller@f1010000 { | |
| 177 | compatible = "arm,gic-400"; | |
| 178 | #interrupt-cells = <3>; | |
| 179 | #address-cells = <0>; | |
| 180 | interrupt-controller; | |
| 181 | reg = <0x0 0xf1010000 0 0x1000>, | |
| 182 | <0x0 0xf1020000 0 0x20000>, | |
| 183 | <0x0 0xf1040000 0 0x20000>, | |
| 184 | <0x0 0xf1060000 0 0x20000>; | |
| 185 | interrupts = <GIC_PPI 9 | |
| b4dc3b4b | 186 | (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; |
| 0bacdbc7 GU |
187 | clocks = <&cpg CPG_MOD 408>; |
| 188 | clock-names = "clk"; | |
| 189 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 190 | resets = <&cpg 408>; |
| 1561f207 SH |
191 | }; |
| 192 | ||
| 193 | timer { | |
| 194 | compatible = "arm,armv8-timer"; | |
| 195 | interrupts = <GIC_PPI 13 | |
| b4dc3b4b | 196 | (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, |
| 1561f207 | 197 | <GIC_PPI 14 |
| b4dc3b4b | 198 | (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, |
| 1561f207 | 199 | <GIC_PPI 11 |
| b4dc3b4b | 200 | (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, |
| 1561f207 | 201 | <GIC_PPI 10 |
| b4dc3b4b | 202 | (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; |
| 1561f207 SH |
203 | }; |
| 204 | ||
| c8ce8007 GU |
205 | wdt0: watchdog@e6020000 { |
| 206 | compatible = "renesas,r8a7796-wdt", | |
| 207 | "renesas,rcar-gen3-wdt"; | |
| 208 | reg = <0 0xe6020000 0 0x0c>; | |
| 209 | clocks = <&cpg CPG_MOD 402>; | |
| 210 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 211 | resets = <&cpg 402>; |
| c8ce8007 GU |
212 | status = "disabled"; |
| 213 | }; | |
| 214 | ||
| fa765e5e TK |
215 | gpio0: gpio@e6050000 { |
| 216 | compatible = "renesas,gpio-r8a7796", | |
| 217 | "renesas,gpio-rcar"; | |
| 218 | reg = <0 0xe6050000 0 0x50>; | |
| 219 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
| 220 | #gpio-cells = <2>; | |
| 221 | gpio-controller; | |
| 222 | gpio-ranges = <&pfc 0 0 16>; | |
| 223 | #interrupt-cells = <2>; | |
| 224 | interrupt-controller; | |
| 225 | clocks = <&cpg CPG_MOD 912>; | |
| 226 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 227 | resets = <&cpg 912>; |
| fa765e5e TK |
228 | }; |
| 229 | ||
| 230 | gpio1: gpio@e6051000 { | |
| 231 | compatible = "renesas,gpio-r8a7796", | |
| 232 | "renesas,gpio-rcar"; | |
| 233 | reg = <0 0xe6051000 0 0x50>; | |
| 234 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
| 235 | #gpio-cells = <2>; | |
| 236 | gpio-controller; | |
| 237 | gpio-ranges = <&pfc 0 32 29>; | |
| 238 | #interrupt-cells = <2>; | |
| 239 | interrupt-controller; | |
| 240 | clocks = <&cpg CPG_MOD 911>; | |
| 241 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 242 | resets = <&cpg 911>; |
| fa765e5e TK |
243 | }; |
| 244 | ||
| 245 | gpio2: gpio@e6052000 { | |
| 246 | compatible = "renesas,gpio-r8a7796", | |
| 247 | "renesas,gpio-rcar"; | |
| 248 | reg = <0 0xe6052000 0 0x50>; | |
| 249 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
| 250 | #gpio-cells = <2>; | |
| 251 | gpio-controller; | |
| 252 | gpio-ranges = <&pfc 0 64 15>; | |
| 253 | #interrupt-cells = <2>; | |
| 254 | interrupt-controller; | |
| 255 | clocks = <&cpg CPG_MOD 910>; | |
| 256 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 257 | resets = <&cpg 910>; |
| fa765e5e TK |
258 | }; |
| 259 | ||
| 260 | gpio3: gpio@e6053000 { | |
| 261 | compatible = "renesas,gpio-r8a7796", | |
| 262 | "renesas,gpio-rcar"; | |
| 263 | reg = <0 0xe6053000 0 0x50>; | |
| 264 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
| 265 | #gpio-cells = <2>; | |
| 266 | gpio-controller; | |
| 267 | gpio-ranges = <&pfc 0 96 16>; | |
| 268 | #interrupt-cells = <2>; | |
| 269 | interrupt-controller; | |
| 270 | clocks = <&cpg CPG_MOD 909>; | |
| 271 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 272 | resets = <&cpg 909>; |
| fa765e5e TK |
273 | }; |
| 274 | ||
| 275 | gpio4: gpio@e6054000 { | |
| 276 | compatible = "renesas,gpio-r8a7796", | |
| 277 | "renesas,gpio-rcar"; | |
| 278 | reg = <0 0xe6054000 0 0x50>; | |
| 279 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
| 280 | #gpio-cells = <2>; | |
| 281 | gpio-controller; | |
| 282 | gpio-ranges = <&pfc 0 128 18>; | |
| 283 | #interrupt-cells = <2>; | |
| 284 | interrupt-controller; | |
| 285 | clocks = <&cpg CPG_MOD 908>; | |
| 286 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 287 | resets = <&cpg 908>; |
| fa765e5e TK |
288 | }; |
| 289 | ||
| 290 | gpio5: gpio@e6055000 { | |
| 291 | compatible = "renesas,gpio-r8a7796", | |
| 292 | "renesas,gpio-rcar"; | |
| 293 | reg = <0 0xe6055000 0 0x50>; | |
| 294 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
| 295 | #gpio-cells = <2>; | |
| 296 | gpio-controller; | |
| 297 | gpio-ranges = <&pfc 0 160 26>; | |
| 298 | #interrupt-cells = <2>; | |
| 299 | interrupt-controller; | |
| 300 | clocks = <&cpg CPG_MOD 907>; | |
| 301 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 302 | resets = <&cpg 907>; |
| fa765e5e TK |
303 | }; |
| 304 | ||
| 305 | gpio6: gpio@e6055400 { | |
| 306 | compatible = "renesas,gpio-r8a7796", | |
| 307 | "renesas,gpio-rcar"; | |
| 308 | reg = <0 0xe6055400 0 0x50>; | |
| 309 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
| 310 | #gpio-cells = <2>; | |
| 311 | gpio-controller; | |
| 312 | gpio-ranges = <&pfc 0 192 32>; | |
| 313 | #interrupt-cells = <2>; | |
| 314 | interrupt-controller; | |
| 315 | clocks = <&cpg CPG_MOD 906>; | |
| 316 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 317 | resets = <&cpg 906>; |
| fa765e5e TK |
318 | }; |
| 319 | ||
| 320 | gpio7: gpio@e6055800 { | |
| 321 | compatible = "renesas,gpio-r8a7796", | |
| 322 | "renesas,gpio-rcar"; | |
| 323 | reg = <0 0xe6055800 0 0x50>; | |
| 324 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
| 325 | #gpio-cells = <2>; | |
| 326 | gpio-controller; | |
| 327 | gpio-ranges = <&pfc 0 224 4>; | |
| 328 | #interrupt-cells = <2>; | |
| 329 | interrupt-controller; | |
| 330 | clocks = <&cpg CPG_MOD 905>; | |
| 331 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 332 | resets = <&cpg 905>; |
| fa765e5e TK |
333 | }; |
| 334 | ||
| 50809470 TK |
335 | pfc: pin-controller@e6060000 { |
| 336 | compatible = "renesas,pfc-r8a7796"; | |
| 337 | reg = <0 0xe6060000 0 0x50c>; | |
| 338 | }; | |
| 339 | ||
| 9fccf4d6 TK |
340 | pmu_a57 { |
| 341 | compatible = "arm,cortex-a57-pmu"; | |
| 342 | interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, | |
| 343 | <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; | |
| 344 | interrupt-affinity = <&a57_0>, | |
| 345 | <&a57_1>; | |
| 346 | }; | |
| 347 | ||
| ccc49933 GU |
348 | pmu_a53 { |
| 349 | compatible = "arm,cortex-a53-pmu"; | |
| 350 | interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, | |
| 351 | <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, | |
| 352 | <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, | |
| 353 | <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; | |
| 354 | interrupt-affinity = <&a53_0>, | |
| 355 | <&a53_1>, | |
| 356 | <&a53_2>, | |
| 357 | <&a53_3>; | |
| 358 | }; | |
| 359 | ||
| 1561f207 SH |
360 | cpg: clock-controller@e6150000 { |
| 361 | compatible = "renesas,r8a7796-cpg-mssr"; | |
| 362 | reg = <0 0xe6150000 0 0x1000>; | |
| 363 | clocks = <&extal_clk>, <&extalr_clk>; | |
| 364 | clock-names = "extal", "extalr"; | |
| 365 | #clock-cells = <2>; | |
| 366 | #power-domain-cells = <0>; | |
| bec0948e | 367 | #reset-cells = <1>; |
| 1561f207 SH |
368 | }; |
| 369 | ||
| 65f922c7 GU |
370 | rst: reset-controller@e6160000 { |
| 371 | compatible = "renesas,r8a7796-rst"; | |
| 372 | reg = <0 0xe6160000 0 0x0200>; | |
| 373 | }; | |
| 374 | ||
| 5de68961 GU |
375 | prr: chipid@fff00044 { |
| 376 | compatible = "renesas,prr"; | |
| 377 | reg = <0 0xfff00044 0 4>; | |
| 378 | }; | |
| 379 | ||
| 56aebae0 GU |
380 | sysc: system-controller@e6180000 { |
| 381 | compatible = "renesas,r8a7796-sysc"; | |
| 382 | reg = <0 0xe6180000 0 0x0400>; | |
| 383 | #power-domain-cells = <1>; | |
| 384 | }; | |
| 385 | ||
| 0fb1fd20 DP |
386 | i2c_dvfs: i2c@e60b0000 { |
| 387 | #address-cells = <1>; | |
| 388 | #size-cells = <0>; | |
| 389 | compatible = "renesas,iic-r8a7796", | |
| 390 | "renesas,rcar-gen3-iic", | |
| 391 | "renesas,rmobile-iic"; | |
| 392 | reg = <0 0xe60b0000 0 0x425>; | |
| 393 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; | |
| 394 | clocks = <&cpg CPG_MOD 926>; | |
| 395 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 396 | resets = <&cpg 926>; |
| 54068ae5 WS |
397 | dmas = <&dmac0 0x11>, <&dmac0 0x10>; |
| 398 | dma-names = "tx", "rx"; | |
| 0fb1fd20 DP |
399 | status = "disabled"; |
| 400 | }; | |
| 401 | ||
| eaef3310 TK |
402 | pwm0: pwm@e6e30000 { |
| 403 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; | |
| 404 | reg = <0 0xe6e30000 0 8>; | |
| 405 | #pwm-cells = <2>; | |
| 406 | clocks = <&cpg CPG_MOD 523>; | |
| 407 | resets = <&cpg 523>; | |
| 408 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 409 | status = "disabled"; | |
| 410 | }; | |
| 411 | ||
| 412 | pwm1: pwm@e6e31000 { | |
| 413 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; | |
| 414 | reg = <0 0xe6e31000 0 8>; | |
| 415 | #pwm-cells = <2>; | |
| 416 | clocks = <&cpg CPG_MOD 523>; | |
| 417 | resets = <&cpg 523>; | |
| 418 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 419 | status = "disabled"; | |
| 420 | }; | |
| 421 | ||
| 422 | pwm2: pwm@e6e32000 { | |
| 423 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; | |
| 424 | reg = <0 0xe6e32000 0 8>; | |
| 425 | #pwm-cells = <2>; | |
| 426 | clocks = <&cpg CPG_MOD 523>; | |
| 427 | resets = <&cpg 523>; | |
| 428 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 429 | status = "disabled"; | |
| 430 | }; | |
| 431 | ||
| 432 | pwm3: pwm@e6e33000 { | |
| 433 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; | |
| 434 | reg = <0 0xe6e33000 0 8>; | |
| 435 | #pwm-cells = <2>; | |
| 436 | clocks = <&cpg CPG_MOD 523>; | |
| 437 | resets = <&cpg 523>; | |
| 438 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 439 | status = "disabled"; | |
| 440 | }; | |
| 441 | ||
| 442 | pwm4: pwm@e6e34000 { | |
| 443 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; | |
| 444 | reg = <0 0xe6e34000 0 8>; | |
| 445 | #pwm-cells = <2>; | |
| 446 | clocks = <&cpg CPG_MOD 523>; | |
| 447 | resets = <&cpg 523>; | |
| 448 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 449 | status = "disabled"; | |
| 450 | }; | |
| 451 | ||
| 452 | pwm5: pwm@e6e35000 { | |
| 453 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; | |
| 454 | reg = <0 0xe6e35000 0 8>; | |
| 455 | #pwm-cells = <2>; | |
| 456 | clocks = <&cpg CPG_MOD 523>; | |
| 457 | resets = <&cpg 523>; | |
| 458 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 459 | status = "disabled"; | |
| 460 | }; | |
| 461 | ||
| 462 | pwm6: pwm@e6e36000 { | |
| 463 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; | |
| 464 | reg = <0 0xe6e36000 0 8>; | |
| 465 | #pwm-cells = <2>; | |
| 466 | clocks = <&cpg CPG_MOD 523>; | |
| 467 | resets = <&cpg 523>; | |
| 468 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 469 | status = "disabled"; | |
| 470 | }; | |
| 471 | ||
| fcb008a7 UH |
472 | i2c0: i2c@e6500000 { |
| 473 | #address-cells = <1>; | |
| 474 | #size-cells = <0>; | |
| 5553e219 SH |
475 | compatible = "renesas,i2c-r8a7796", |
| 476 | "renesas,rcar-gen3-i2c"; | |
| fcb008a7 UH |
477 | reg = <0 0xe6500000 0 0x40>; |
| 478 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | |
| 479 | clocks = <&cpg CPG_MOD 931>; | |
| 480 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 481 | resets = <&cpg 931>; |
| c758f4e3 UH |
482 | dmas = <&dmac1 0x91>, <&dmac1 0x90>, |
| 483 | <&dmac2 0x91>, <&dmac2 0x90>; | |
| 484 | dma-names = "tx", "rx", "tx", "rx"; | |
| fcb008a7 UH |
485 | i2c-scl-internal-delay-ns = <110>; |
| 486 | status = "disabled"; | |
| 487 | }; | |
| 488 | ||
| 489 | i2c1: i2c@e6508000 { | |
| 490 | #address-cells = <1>; | |
| 491 | #size-cells = <0>; | |
| 5553e219 SH |
492 | compatible = "renesas,i2c-r8a7796", |
| 493 | "renesas,rcar-gen3-i2c"; | |
| fcb008a7 UH |
494 | reg = <0 0xe6508000 0 0x40>; |
| 495 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | |
| 496 | clocks = <&cpg CPG_MOD 930>; | |
| 497 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 498 | resets = <&cpg 930>; |
| c758f4e3 UH |
499 | dmas = <&dmac1 0x93>, <&dmac1 0x92>, |
| 500 | <&dmac2 0x93>, <&dmac2 0x92>; | |
| 501 | dma-names = "tx", "rx", "tx", "rx"; | |
| fcb008a7 UH |
502 | i2c-scl-internal-delay-ns = <6>; |
| 503 | status = "disabled"; | |
| 504 | }; | |
| 505 | ||
| 506 | i2c2: i2c@e6510000 { | |
| 507 | #address-cells = <1>; | |
| 508 | #size-cells = <0>; | |
| 5553e219 SH |
509 | compatible = "renesas,i2c-r8a7796", |
| 510 | "renesas,rcar-gen3-i2c"; | |
| fcb008a7 UH |
511 | reg = <0 0xe6510000 0 0x40>; |
| 512 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | |
| 513 | clocks = <&cpg CPG_MOD 929>; | |
| 514 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 515 | resets = <&cpg 929>; |
| c758f4e3 UH |
516 | dmas = <&dmac1 0x95>, <&dmac1 0x94>, |
| 517 | <&dmac2 0x95>, <&dmac2 0x94>; | |
| 518 | dma-names = "tx", "rx", "tx", "rx"; | |
| fcb008a7 UH |
519 | i2c-scl-internal-delay-ns = <6>; |
| 520 | status = "disabled"; | |
| 521 | }; | |
| 522 | ||
| 523 | i2c3: i2c@e66d0000 { | |
| 524 | #address-cells = <1>; | |
| 525 | #size-cells = <0>; | |
| 5553e219 SH |
526 | compatible = "renesas,i2c-r8a7796", |
| 527 | "renesas,rcar-gen3-i2c"; | |
| fcb008a7 UH |
528 | reg = <0 0xe66d0000 0 0x40>; |
| 529 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | |
| 530 | clocks = <&cpg CPG_MOD 928>; | |
| 531 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 532 | resets = <&cpg 928>; |
| c758f4e3 UH |
533 | dmas = <&dmac0 0x97>, <&dmac0 0x96>; |
| 534 | dma-names = "tx", "rx"; | |
| fcb008a7 UH |
535 | i2c-scl-internal-delay-ns = <110>; |
| 536 | status = "disabled"; | |
| 537 | }; | |
| 538 | ||
| 539 | i2c4: i2c@e66d8000 { | |
| 540 | #address-cells = <1>; | |
| 541 | #size-cells = <0>; | |
| 5553e219 SH |
542 | compatible = "renesas,i2c-r8a7796", |
| 543 | "renesas,rcar-gen3-i2c"; | |
| fcb008a7 UH |
544 | reg = <0 0xe66d8000 0 0x40>; |
| 545 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
| 546 | clocks = <&cpg CPG_MOD 927>; | |
| 547 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 548 | resets = <&cpg 927>; |
| c758f4e3 UH |
549 | dmas = <&dmac0 0x99>, <&dmac0 0x98>; |
| 550 | dma-names = "tx", "rx"; | |
| fcb008a7 UH |
551 | i2c-scl-internal-delay-ns = <110>; |
| 552 | status = "disabled"; | |
| 553 | }; | |
| 554 | ||
| 555 | i2c5: i2c@e66e0000 { | |
| 556 | #address-cells = <1>; | |
| 557 | #size-cells = <0>; | |
| 5553e219 SH |
558 | compatible = "renesas,i2c-r8a7796", |
| 559 | "renesas,rcar-gen3-i2c"; | |
| fcb008a7 UH |
560 | reg = <0 0xe66e0000 0 0x40>; |
| 561 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | |
| 562 | clocks = <&cpg CPG_MOD 919>; | |
| 563 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 564 | resets = <&cpg 919>; |
| c758f4e3 UH |
565 | dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; |
| 566 | dma-names = "tx", "rx"; | |
| fcb008a7 UH |
567 | i2c-scl-internal-delay-ns = <110>; |
| 568 | status = "disabled"; | |
| 569 | }; | |
| 570 | ||
| 571 | i2c6: i2c@e66e8000 { | |
| 572 | #address-cells = <1>; | |
| 573 | #size-cells = <0>; | |
| 5553e219 SH |
574 | compatible = "renesas,i2c-r8a7796", |
| 575 | "renesas,rcar-gen3-i2c"; | |
| fcb008a7 UH |
576 | reg = <0 0xe66e8000 0 0x40>; |
| 577 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
| 578 | clocks = <&cpg CPG_MOD 918>; | |
| 579 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 580 | resets = <&cpg 918>; |
| c758f4e3 UH |
581 | dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; |
| 582 | dma-names = "tx", "rx"; | |
| fcb008a7 UH |
583 | i2c-scl-internal-delay-ns = <6>; |
| 584 | status = "disabled"; | |
| 585 | }; | |
| 586 | ||
| 909c1625 CP |
587 | can0: can@e6c30000 { |
| 588 | compatible = "renesas,can-r8a7796", | |
| 589 | "renesas,rcar-gen3-can"; | |
| 590 | reg = <0 0xe6c30000 0 0x1000>; | |
| 591 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; | |
| 592 | clocks = <&cpg CPG_MOD 916>, | |
| 593 | <&cpg CPG_CORE R8A7796_CLK_CANFD>, | |
| 594 | <&can_clk>; | |
| 595 | clock-names = "clkp1", "clkp2", "can_clk"; | |
| 596 | assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; | |
| 597 | assigned-clock-rates = <40000000>; | |
| 598 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 599 | resets = <&cpg 916>; |
| 909c1625 CP |
600 | status = "disabled"; |
| 601 | }; | |
| 602 | ||
| 603 | can1: can@e6c38000 { | |
| 604 | compatible = "renesas,can-r8a7796", | |
| 605 | "renesas,rcar-gen3-can"; | |
| 606 | reg = <0 0xe6c38000 0 0x1000>; | |
| 607 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; | |
| 608 | clocks = <&cpg CPG_MOD 915>, | |
| 609 | <&cpg CPG_CORE R8A7796_CLK_CANFD>, | |
| 610 | <&can_clk>; | |
| 611 | clock-names = "clkp1", "clkp2", "can_clk"; | |
| 612 | assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; | |
| 613 | assigned-clock-rates = <40000000>; | |
| 614 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 615 | resets = <&cpg 915>; |
| 909c1625 CP |
616 | status = "disabled"; |
| 617 | }; | |
| 618 | ||
| f4176d7c CP |
619 | canfd: can@e66c0000 { |
| 620 | compatible = "renesas,r8a7796-canfd", | |
| 621 | "renesas,rcar-gen3-canfd"; | |
| 622 | reg = <0 0xe66c0000 0 0x8000>; | |
| 623 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, | |
| 624 | <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; | |
| 625 | clocks = <&cpg CPG_MOD 914>, | |
| 626 | <&cpg CPG_CORE R8A7796_CLK_CANFD>, | |
| 627 | <&can_clk>; | |
| 628 | clock-names = "fck", "canfd", "can_clk"; | |
| 629 | assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; | |
| 630 | assigned-clock-rates = <40000000>; | |
| 631 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 632 | resets = <&cpg 914>; |
| f4176d7c CP |
633 | status = "disabled"; |
| 634 | ||
| 635 | channel0 { | |
| 636 | status = "disabled"; | |
| 637 | }; | |
| 638 | ||
| 639 | channel1 { | |
| 640 | status = "disabled"; | |
| 641 | }; | |
| 642 | }; | |
| 643 | ||
| 1a8e5f84 RS |
644 | drif00: rif@e6f40000 { |
| 645 | compatible = "renesas,r8a7796-drif", | |
| 646 | "renesas,rcar-gen3-drif"; | |
| 647 | reg = <0 0xe6f40000 0 0x64>; | |
| 648 | interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; | |
| 649 | clocks = <&cpg CPG_MOD 515>; | |
| 650 | clock-names = "fck"; | |
| 651 | dmas = <&dmac1 0x20>, <&dmac2 0x20>; | |
| 652 | dma-names = "rx", "rx"; | |
| 653 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 654 | resets = <&cpg 515>; | |
| 655 | renesas,bonding = <&drif01>; | |
| 656 | status = "disabled"; | |
| 657 | }; | |
| 658 | ||
| 659 | drif01: rif@e6f50000 { | |
| 660 | compatible = "renesas,r8a7796-drif", | |
| 661 | "renesas,rcar-gen3-drif"; | |
| 662 | reg = <0 0xe6f50000 0 0x64>; | |
| 663 | interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; | |
| 664 | clocks = <&cpg CPG_MOD 514>; | |
| 665 | clock-names = "fck"; | |
| 666 | dmas = <&dmac1 0x22>, <&dmac2 0x22>; | |
| 667 | dma-names = "rx", "rx"; | |
| 668 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 669 | resets = <&cpg 514>; | |
| 670 | renesas,bonding = <&drif00>; | |
| 671 | status = "disabled"; | |
| 672 | }; | |
| 673 | ||
| 674 | drif10: rif@e6f60000 { | |
| 675 | compatible = "renesas,r8a7796-drif", | |
| 676 | "renesas,rcar-gen3-drif"; | |
| 677 | reg = <0 0xe6f60000 0 0x64>; | |
| 678 | interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; | |
| 679 | clocks = <&cpg CPG_MOD 513>; | |
| 680 | clock-names = "fck"; | |
| 681 | dmas = <&dmac1 0x24>, <&dmac2 0x24>; | |
| 682 | dma-names = "rx", "rx"; | |
| 683 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 684 | resets = <&cpg 513>; | |
| 685 | renesas,bonding = <&drif11>; | |
| 686 | status = "disabled"; | |
| 687 | }; | |
| 688 | ||
| 689 | drif11: rif@e6f70000 { | |
| 690 | compatible = "renesas,r8a7796-drif", | |
| 691 | "renesas,rcar-gen3-drif"; | |
| 692 | reg = <0 0xe6f70000 0 0x64>; | |
| 693 | interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; | |
| 694 | clocks = <&cpg CPG_MOD 512>; | |
| 695 | clock-names = "fck"; | |
| 696 | dmas = <&dmac1 0x26>, <&dmac2 0x26>; | |
| 697 | dma-names = "rx", "rx"; | |
| 698 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 699 | resets = <&cpg 512>; | |
| 700 | renesas,bonding = <&drif10>; | |
| 701 | status = "disabled"; | |
| 702 | }; | |
| 703 | ||
| 704 | drif20: rif@e6f80000 { | |
| 705 | compatible = "renesas,r8a7796-drif", | |
| 706 | "renesas,rcar-gen3-drif"; | |
| 707 | reg = <0 0xe6f80000 0 0x64>; | |
| 708 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; | |
| 709 | clocks = <&cpg CPG_MOD 511>; | |
| 710 | clock-names = "fck"; | |
| 711 | dmas = <&dmac1 0x28>, <&dmac2 0x28>; | |
| 712 | dma-names = "rx", "rx"; | |
| 713 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 714 | resets = <&cpg 511>; | |
| 715 | renesas,bonding = <&drif21>; | |
| 716 | status = "disabled"; | |
| 717 | }; | |
| 718 | ||
| 719 | drif21: rif@e6f90000 { | |
| 720 | compatible = "renesas,r8a7796-drif", | |
| 721 | "renesas,rcar-gen3-drif"; | |
| 722 | reg = <0 0xe6f90000 0 0x64>; | |
| 723 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; | |
| 724 | clocks = <&cpg CPG_MOD 510>; | |
| 725 | clock-names = "fck"; | |
| 726 | dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; | |
| 727 | dma-names = "rx", "rx"; | |
| 728 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 729 | resets = <&cpg 510>; | |
| 730 | renesas,bonding = <&drif20>; | |
| 731 | status = "disabled"; | |
| 732 | }; | |
| 733 | ||
| 734 | drif30: rif@e6fa0000 { | |
| 735 | compatible = "renesas,r8a7796-drif", | |
| 736 | "renesas,rcar-gen3-drif"; | |
| 737 | reg = <0 0xe6fa0000 0 0x64>; | |
| 738 | interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; | |
| 739 | clocks = <&cpg CPG_MOD 509>; | |
| 740 | clock-names = "fck"; | |
| 741 | dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; | |
| 742 | dma-names = "rx", "rx"; | |
| 743 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 744 | resets = <&cpg 509>; | |
| 745 | renesas,bonding = <&drif31>; | |
| 746 | status = "disabled"; | |
| 747 | }; | |
| 748 | ||
| 749 | drif31: rif@e6fb0000 { | |
| 750 | compatible = "renesas,r8a7796-drif", | |
| 751 | "renesas,rcar-gen3-drif"; | |
| 752 | reg = <0 0xe6fb0000 0 0x64>; | |
| 753 | interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; | |
| 754 | clocks = <&cpg CPG_MOD 508>; | |
| 755 | clock-names = "fck"; | |
| 756 | dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; | |
| 757 | dma-names = "rx", "rx"; | |
| 758 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 759 | resets = <&cpg 508>; | |
| 760 | renesas,bonding = <&drif30>; | |
| 761 | status = "disabled"; | |
| 762 | }; | |
| 763 | ||
| 8e8b9eae LP |
764 | avb: ethernet@e6800000 { |
| 765 | compatible = "renesas,etheravb-r8a7796", | |
| 766 | "renesas,etheravb-rcar-gen3"; | |
| 767 | reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; | |
| 768 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | |
| 769 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | |
| 770 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | |
| 771 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | |
| 772 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | |
| 773 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, | |
| 774 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, | |
| 775 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, | |
| 776 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
| 777 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | |
| 778 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, | |
| 779 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, | |
| 780 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, | |
| 781 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, | |
| 782 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
| 783 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
| 784 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, | |
| 785 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, | |
| 786 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | |
| 787 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | |
| 788 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | |
| 789 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, | |
| 790 | <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, | |
| 791 | <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, | |
| 792 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; | |
| 793 | interrupt-names = "ch0", "ch1", "ch2", "ch3", | |
| 794 | "ch4", "ch5", "ch6", "ch7", | |
| 795 | "ch8", "ch9", "ch10", "ch11", | |
| 796 | "ch12", "ch13", "ch14", "ch15", | |
| 797 | "ch16", "ch17", "ch18", "ch19", | |
| 798 | "ch20", "ch21", "ch22", "ch23", | |
| 799 | "ch24"; | |
| 800 | clocks = <&cpg CPG_MOD 812>; | |
| 801 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 802 | resets = <&cpg 812>; |
| 325f3901 | 803 | phy-mode = "rgmii-txid"; |
| 8e8b9eae LP |
804 | #address-cells = <1>; |
| 805 | #size-cells = <0>; | |
| 7e1c23b9 | 806 | status = "disabled"; |
| 8e8b9eae | 807 | }; |
| 68cd1610 UH |
808 | |
| 809 | hscif0: serial@e6540000 { | |
| 810 | compatible = "renesas,hscif-r8a7796", | |
| 811 | "renesas,rcar-gen3-hscif", | |
| 812 | "renesas,hscif"; | |
| 813 | reg = <0 0xe6540000 0 0x60>; | |
| 814 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
| 815 | clocks = <&cpg CPG_MOD 520>, | |
| 816 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, | |
| 817 | <&scif_clk>; | |
| 818 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 6d50bb89 UH |
819 | dmas = <&dmac1 0x31>, <&dmac1 0x30>, |
| 820 | <&dmac2 0x31>, <&dmac2 0x30>; | |
| 821 | dma-names = "tx", "rx", "tx", "rx"; | |
| 68cd1610 | 822 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 823 | resets = <&cpg 520>; |
| 68cd1610 UH |
824 | status = "disabled"; |
| 825 | }; | |
| 826 | ||
| 827 | hscif1: serial@e6550000 { | |
| 828 | compatible = "renesas,hscif-r8a7796", | |
| 829 | "renesas,rcar-gen3-hscif", | |
| 830 | "renesas,hscif"; | |
| 831 | reg = <0 0xe6550000 0 0x60>; | |
| 832 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
| 833 | clocks = <&cpg CPG_MOD 519>, | |
| 834 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, | |
| 835 | <&scif_clk>; | |
| 836 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 6d50bb89 UH |
837 | dmas = <&dmac1 0x33>, <&dmac1 0x32>, |
| 838 | <&dmac2 0x33>, <&dmac2 0x32>; | |
| 839 | dma-names = "tx", "rx", "tx", "rx"; | |
| 68cd1610 | 840 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 841 | resets = <&cpg 519>; |
| 68cd1610 UH |
842 | status = "disabled"; |
| 843 | }; | |
| 844 | ||
| 845 | hscif2: serial@e6560000 { | |
| 846 | compatible = "renesas,hscif-r8a7796", | |
| 847 | "renesas,rcar-gen3-hscif", | |
| 848 | "renesas,hscif"; | |
| 849 | reg = <0 0xe6560000 0 0x60>; | |
| 850 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
| 851 | clocks = <&cpg CPG_MOD 518>, | |
| 852 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, | |
| 853 | <&scif_clk>; | |
| 854 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 6d50bb89 UH |
855 | dmas = <&dmac1 0x35>, <&dmac1 0x34>, |
| 856 | <&dmac2 0x35>, <&dmac2 0x34>; | |
| 857 | dma-names = "tx", "rx", "tx", "rx"; | |
| 68cd1610 | 858 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 859 | resets = <&cpg 518>; |
| 68cd1610 UH |
860 | status = "disabled"; |
| 861 | }; | |
| 862 | ||
| 863 | hscif3: serial@e66a0000 { | |
| 864 | compatible = "renesas,hscif-r8a7796", | |
| 865 | "renesas,rcar-gen3-hscif", | |
| 866 | "renesas,hscif"; | |
| 867 | reg = <0 0xe66a0000 0 0x60>; | |
| 868 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
| 869 | clocks = <&cpg CPG_MOD 517>, | |
| 870 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, | |
| 871 | <&scif_clk>; | |
| 872 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 6d50bb89 UH |
873 | dmas = <&dmac0 0x37>, <&dmac0 0x36>; |
| 874 | dma-names = "tx", "rx"; | |
| 68cd1610 | 875 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 876 | resets = <&cpg 517>; |
| 68cd1610 UH |
877 | status = "disabled"; |
| 878 | }; | |
| 879 | ||
| 880 | hscif4: serial@e66b0000 { | |
| 881 | compatible = "renesas,hscif-r8a7796", | |
| 882 | "renesas,rcar-gen3-hscif", | |
| 883 | "renesas,hscif"; | |
| 884 | reg = <0 0xe66b0000 0 0x60>; | |
| 885 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
| 886 | clocks = <&cpg CPG_MOD 516>, | |
| 887 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, | |
| 888 | <&scif_clk>; | |
| 889 | clock-names = "fck", "brg_int", "scif_clk"; | |
| 6d50bb89 UH |
890 | dmas = <&dmac0 0x39>, <&dmac0 0x38>; |
| 891 | dma-names = "tx", "rx"; | |
| 68cd1610 | 892 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 893 | resets = <&cpg 516>; |
| 68cd1610 UH |
894 | status = "disabled"; |
| 895 | }; | |
| 8e8b9eae | 896 | |
| 19d76f3e UH |
897 | scif0: serial@e6e60000 { |
| 898 | compatible = "renesas,scif-r8a7796", | |
| 899 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
| 900 | reg = <0 0xe6e60000 0 64>; | |
| 901 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
| 902 | clocks = <&cpg CPG_MOD 207>, | |
| 903 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, | |
| 904 | <&scif_clk>; | |
| 905 | clock-names = "fck", "brg_int", "scif_clk"; | |
| dbcae5ea UH |
906 | dmas = <&dmac1 0x51>, <&dmac1 0x50>, |
| 907 | <&dmac2 0x51>, <&dmac2 0x50>; | |
| 908 | dma-names = "tx", "rx", "tx", "rx"; | |
| 19d76f3e | 909 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 910 | resets = <&cpg 207>; |
| 19d76f3e UH |
911 | status = "disabled"; |
| 912 | }; | |
| 913 | ||
| 914 | scif1: serial@e6e68000 { | |
| 915 | compatible = "renesas,scif-r8a7796", | |
| 916 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
| 917 | reg = <0 0xe6e68000 0 64>; | |
| 918 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
| 919 | clocks = <&cpg CPG_MOD 206>, | |
| 920 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, | |
| 921 | <&scif_clk>; | |
| 922 | clock-names = "fck", "brg_int", "scif_clk"; | |
| dbcae5ea UH |
923 | dmas = <&dmac1 0x53>, <&dmac1 0x52>, |
| 924 | <&dmac2 0x53>, <&dmac2 0x52>; | |
| 925 | dma-names = "tx", "rx", "tx", "rx"; | |
| 19d76f3e | 926 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 927 | resets = <&cpg 206>; |
| 19d76f3e UH |
928 | status = "disabled"; |
| 929 | }; | |
| 930 | ||
| 1561f207 SH |
931 | scif2: serial@e6e88000 { |
| 932 | compatible = "renesas,scif-r8a7796", | |
| 933 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
| 934 | reg = <0 0xe6e88000 0 64>; | |
| 935 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
| 936 | clocks = <&cpg CPG_MOD 310>, | |
| 937 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, | |
| 938 | <&scif_clk>; | |
| 939 | clock-names = "fck", "brg_int", "scif_clk"; | |
| a9003187 | 940 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 941 | resets = <&cpg 310>; |
| 1561f207 SH |
942 | status = "disabled"; |
| 943 | }; | |
| a513cf1e | 944 | |
| 19d76f3e UH |
945 | scif3: serial@e6c50000 { |
| 946 | compatible = "renesas,scif-r8a7796", | |
| 947 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
| 948 | reg = <0 0xe6c50000 0 64>; | |
| 949 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
| 950 | clocks = <&cpg CPG_MOD 204>, | |
| 951 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, | |
| 952 | <&scif_clk>; | |
| 953 | clock-names = "fck", "brg_int", "scif_clk"; | |
| dbcae5ea UH |
954 | dmas = <&dmac0 0x57>, <&dmac0 0x56>; |
| 955 | dma-names = "tx", "rx"; | |
| 19d76f3e | 956 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 957 | resets = <&cpg 204>; |
| 19d76f3e UH |
958 | status = "disabled"; |
| 959 | }; | |
| 960 | ||
| 961 | scif4: serial@e6c40000 { | |
| 962 | compatible = "renesas,scif-r8a7796", | |
| 963 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
| 964 | reg = <0 0xe6c40000 0 64>; | |
| 965 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | |
| 966 | clocks = <&cpg CPG_MOD 203>, | |
| 967 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, | |
| 968 | <&scif_clk>; | |
| 969 | clock-names = "fck", "brg_int", "scif_clk"; | |
| dbcae5ea UH |
970 | dmas = <&dmac0 0x59>, <&dmac0 0x58>; |
| 971 | dma-names = "tx", "rx"; | |
| 19d76f3e | 972 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 973 | resets = <&cpg 203>; |
| 19d76f3e UH |
974 | status = "disabled"; |
| 975 | }; | |
| 976 | ||
| 977 | scif5: serial@e6f30000 { | |
| 978 | compatible = "renesas,scif-r8a7796", | |
| 979 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
| 980 | reg = <0 0xe6f30000 0 64>; | |
| 981 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
| 982 | clocks = <&cpg CPG_MOD 202>, | |
| 983 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, | |
| 984 | <&scif_clk>; | |
| 985 | clock-names = "fck", "brg_int", "scif_clk"; | |
| dbcae5ea UH |
986 | dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, |
| 987 | <&dmac2 0x5b>, <&dmac2 0x5a>; | |
| 988 | dma-names = "tx", "rx", "tx", "rx"; | |
| 19d76f3e | 989 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 990 | resets = <&cpg 202>; |
| 19d76f3e UH |
991 | status = "disabled"; |
| 992 | }; | |
| 993 | ||
| 80fab06e | 994 | msiof0: spi@e6e90000 { |
| 8b51f971 SH |
995 | compatible = "renesas,msiof-r8a7796", |
| 996 | "renesas,rcar-gen3-msiof"; | |
| 80fab06e GU |
997 | reg = <0 0xe6e90000 0 0x0064>; |
| 998 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; | |
| 999 | clocks = <&cpg CPG_MOD 211>; | |
| 1000 | dmas = <&dmac1 0x41>, <&dmac1 0x40>, | |
| 1001 | <&dmac2 0x41>, <&dmac2 0x40>; | |
| 71adc330 | 1002 | dma-names = "tx", "rx", "tx", "rx"; |
| 80fab06e | 1003 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 1004 | resets = <&cpg 211>; |
| 80fab06e GU |
1005 | #address-cells = <1>; |
| 1006 | #size-cells = <0>; | |
| 1007 | status = "disabled"; | |
| 1008 | }; | |
| 1009 | ||
| 1010 | msiof1: spi@e6ea0000 { | |
| 8b51f971 SH |
1011 | compatible = "renesas,msiof-r8a7796", |
| 1012 | "renesas,rcar-gen3-msiof"; | |
| 80fab06e GU |
1013 | reg = <0 0xe6ea0000 0 0x0064>; |
| 1014 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; | |
| 1015 | clocks = <&cpg CPG_MOD 210>; | |
| 1016 | dmas = <&dmac1 0x43>, <&dmac1 0x42>, | |
| 1017 | <&dmac2 0x43>, <&dmac2 0x42>; | |
| 71adc330 | 1018 | dma-names = "tx", "rx", "tx", "rx"; |
| 80fab06e | 1019 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| bec0948e | 1020 | resets = <&cpg 210>; |
| 80fab06e GU |
1021 | #address-cells = <1>; |
| 1022 | #size-cells = <0>; | |
| 1023 | status = "disabled"; | |
| 1024 | }; | |
| 1025 | ||
| 1026 | msiof2: spi@e6c00000 { | |
| 8b51f971 SH |
1027 | compatible = "renesas,msiof-r8a7796", |
| 1028 | "renesas,rcar-gen3-msiof"; | |
| 80fab06e GU |
1029 | reg = <0 0xe6c00000 0 0x0064>; |
| 1030 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; | |
| 1031 | clocks = <&cpg CPG_MOD 209>; | |
| 1032 | dmas = <&dmac0 0x45>, <&dmac0 0x44>; | |
| 1033 | dma-names = "tx", "rx"; | |
| 1034 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 1035 | resets = <&cpg 209>; |
| 80fab06e GU |
1036 | #address-cells = <1>; |
| 1037 | #size-cells = <0>; | |
| 1038 | status = "disabled"; | |
| 1039 | }; | |
| 1040 | ||
| 1041 | msiof3: spi@e6c10000 { | |
| 8b51f971 SH |
1042 | compatible = "renesas,msiof-r8a7796", |
| 1043 | "renesas,rcar-gen3-msiof"; | |
| 80fab06e GU |
1044 | reg = <0 0xe6c10000 0 0x0064>; |
| 1045 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; | |
| 1046 | clocks = <&cpg CPG_MOD 208>; | |
| 1047 | dmas = <&dmac0 0x47>, <&dmac0 0x46>; | |
| 1048 | dma-names = "tx", "rx"; | |
| 1049 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 1050 | resets = <&cpg 208>; |
| 80fab06e GU |
1051 | #address-cells = <1>; |
| 1052 | #size-cells = <0>; | |
| 1053 | status = "disabled"; | |
| 1054 | }; | |
| 1055 | ||
| 93508520 UH |
1056 | dmac0: dma-controller@e6700000 { |
| 1057 | compatible = "renesas,dmac-r8a7796", | |
| 1058 | "renesas,rcar-dmac"; | |
| 1059 | reg = <0 0xe6700000 0 0x10000>; | |
| 1060 | interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH | |
| 1061 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
| 1062 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
| 1063 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
| 1064 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
| 1065 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
| 1066 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
| 1067 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
| 1068 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
| 1069 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
| 1070 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
| 1071 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
| 1072 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
| 1073 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
| 1074 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
| 1075 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH | |
| 1076 | GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; | |
| 1077 | interrupt-names = "error", | |
| 1078 | "ch0", "ch1", "ch2", "ch3", | |
| 1079 | "ch4", "ch5", "ch6", "ch7", | |
| 1080 | "ch8", "ch9", "ch10", "ch11", | |
| 1081 | "ch12", "ch13", "ch14", "ch15"; | |
| 1082 | clocks = <&cpg CPG_MOD 219>; | |
| 1083 | clock-names = "fck"; | |
| 1084 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 1085 | resets = <&cpg 219>; |
| 93508520 UH |
1086 | #dma-cells = <1>; |
| 1087 | dma-channels = <16>; | |
| 1088 | }; | |
| 1089 | ||
| 1090 | dmac1: dma-controller@e7300000 { | |
| 1091 | compatible = "renesas,dmac-r8a7796", | |
| 1092 | "renesas,rcar-dmac"; | |
| 1093 | reg = <0 0xe7300000 0 0x10000>; | |
| 1094 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH | |
| 1095 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
| 1096 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
| 1097 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
| 1098 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
| 1099 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
| 1100 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
| 1101 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
| 1102 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
| 1103 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
| 1104 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
| 1105 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
| 1106 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
| 1107 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
| 1108 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
| 1109 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH | |
| 1110 | GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; | |
| 1111 | interrupt-names = "error", | |
| 1112 | "ch0", "ch1", "ch2", "ch3", | |
| 1113 | "ch4", "ch5", "ch6", "ch7", | |
| 1114 | "ch8", "ch9", "ch10", "ch11", | |
| 1115 | "ch12", "ch13", "ch14", "ch15"; | |
| 1116 | clocks = <&cpg CPG_MOD 218>; | |
| 1117 | clock-names = "fck"; | |
| 1118 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 1119 | resets = <&cpg 218>; |
| 93508520 UH |
1120 | #dma-cells = <1>; |
| 1121 | dma-channels = <16>; | |
| 1122 | }; | |
| 1123 | ||
| 1124 | dmac2: dma-controller@e7310000 { | |
| 1125 | compatible = "renesas,dmac-r8a7796", | |
| 1126 | "renesas,rcar-dmac"; | |
| 1127 | reg = <0 0xe7310000 0 0x10000>; | |
| 1128 | interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH | |
| 1129 | GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH | |
| 1130 | GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH | |
| 1131 | GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH | |
| 1132 | GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH | |
| 1133 | GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH | |
| 1134 | GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH | |
| 1135 | GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH | |
| 1136 | GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH | |
| 1137 | GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH | |
| 1138 | GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH | |
| 1139 | GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH | |
| 1140 | GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH | |
| 1141 | GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH | |
| 1142 | GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH | |
| 1143 | GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH | |
| 1144 | GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; | |
| 1145 | interrupt-names = "error", | |
| 1146 | "ch0", "ch1", "ch2", "ch3", | |
| 1147 | "ch4", "ch5", "ch6", "ch7", | |
| 1148 | "ch8", "ch9", "ch10", "ch11", | |
| 1149 | "ch12", "ch13", "ch14", "ch15"; | |
| 1150 | clocks = <&cpg CPG_MOD 217>; | |
| 1151 | clock-names = "fck"; | |
| 1152 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 1153 | resets = <&cpg 217>; |
| 93508520 UH |
1154 | #dma-cells = <1>; |
| 1155 | dma-channels = <16>; | |
| 1156 | }; | |
| 1157 | ||
| c7176fe7 KM |
1158 | audma0: dma-controller@ec700000 { |
| 1159 | compatible = "renesas,dmac-r8a7796", | |
| 1160 | "renesas,rcar-dmac"; | |
| 1161 | reg = <0 0xec700000 0 0x10000>; | |
| 1162 | interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH | |
| 1163 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH | |
| 1164 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH | |
| 1165 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH | |
| 1166 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH | |
| 1167 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH | |
| 1168 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH | |
| 1169 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH | |
| 1170 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH | |
| 1171 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH | |
| 1172 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH | |
| 1173 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH | |
| 1174 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH | |
| 1175 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH | |
| 1176 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH | |
| 1177 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH | |
| 1178 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; | |
| 1179 | interrupt-names = "error", | |
| 1180 | "ch0", "ch1", "ch2", "ch3", | |
| 1181 | "ch4", "ch5", "ch6", "ch7", | |
| 1182 | "ch8", "ch9", "ch10", "ch11", | |
| 1183 | "ch12", "ch13", "ch14", "ch15"; | |
| 1184 | clocks = <&cpg CPG_MOD 502>; | |
| 1185 | clock-names = "fck"; | |
| 1186 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1187 | resets = <&cpg 502>; | |
| 1188 | #dma-cells = <1>; | |
| 1189 | dma-channels = <16>; | |
| 1190 | }; | |
| 1191 | ||
| 1192 | audma1: dma-controller@ec720000 { | |
| 1193 | compatible = "renesas,dmac-r8a7796", | |
| 1194 | "renesas,rcar-dmac"; | |
| 1195 | reg = <0 0xec720000 0 0x10000>; | |
| 1196 | interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH | |
| 1197 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH | |
| 1198 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH | |
| 1199 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH | |
| 1200 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH | |
| 1201 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH | |
| 1202 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH | |
| 1203 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH | |
| 1204 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH | |
| 1205 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH | |
| 1206 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH | |
| 1207 | GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH | |
| 1208 | GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH | |
| 1209 | GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH | |
| 1210 | GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH | |
| 1211 | GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH | |
| 1212 | GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; | |
| 1213 | interrupt-names = "error", | |
| 1214 | "ch0", "ch1", "ch2", "ch3", | |
| 1215 | "ch4", "ch5", "ch6", "ch7", | |
| 1216 | "ch8", "ch9", "ch10", "ch11", | |
| 1217 | "ch12", "ch13", "ch14", "ch15"; | |
| 1218 | clocks = <&cpg CPG_MOD 501>; | |
| 1219 | clock-names = "fck"; | |
| 1220 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1221 | resets = <&cpg 501>; | |
| 1222 | #dma-cells = <1>; | |
| 1223 | dma-channels = <16>; | |
| 1224 | }; | |
| 1225 | ||
| 834bda65 YS |
1226 | usb_dmac0: dma-controller@e65a0000 { |
| 1227 | compatible = "renesas,r8a7796-usb-dmac", | |
| 1228 | "renesas,usb-dmac"; | |
| 1229 | reg = <0 0xe65a0000 0 0x100>; | |
| 1230 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH | |
| 1231 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
| 1232 | interrupt-names = "ch0", "ch1"; | |
| 1233 | clocks = <&cpg CPG_MOD 330>; | |
| 1234 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1235 | resets = <&cpg 330>; | |
| 1236 | #dma-cells = <1>; | |
| 1237 | dma-channels = <2>; | |
| 1238 | }; | |
| 1239 | ||
| 1240 | usb_dmac1: dma-controller@e65b0000 { | |
| 1241 | compatible = "renesas,r8a7796-usb-dmac", | |
| 1242 | "renesas,usb-dmac"; | |
| 1243 | reg = <0 0xe65b0000 0 0x100>; | |
| 1244 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH | |
| 1245 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
| 1246 | interrupt-names = "ch0", "ch1"; | |
| 1247 | clocks = <&cpg CPG_MOD 331>; | |
| 1248 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1249 | resets = <&cpg 331>; | |
| 1250 | #dma-cells = <1>; | |
| 1251 | dma-channels = <2>; | |
| 1252 | }; | |
| 1253 | ||
| 8faafa71 | 1254 | hsusb: usb@e6590000 { |
| b9535853 YS |
1255 | compatible = "renesas,usbhs-r8a7796", |
| 1256 | "renesas,rcar-gen3-usbhs"; | |
| 1257 | reg = <0 0xe6590000 0 0x100>; | |
| 1258 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; | |
| 1259 | clocks = <&cpg CPG_MOD 704>; | |
| 1260 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, | |
| 1261 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
| 1262 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
| 1263 | renesas,buswait = <11>; | |
| 1264 | phys = <&usb2_phy0>; | |
| 1265 | phy-names = "usb"; | |
| 1266 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1267 | resets = <&cpg 704>; | |
| 1268 | status = "disabled"; | |
| 8faafa71 GU |
1269 | }; |
| 1270 | ||
| 1271 | xhci0: usb@ee000000 { | |
| 7b39ccbb YS |
1272 | compatible = "renesas,xhci-r8a7796", |
| 1273 | "renesas,rcar-gen3-xhci"; | |
| 1274 | reg = <0 0xee000000 0 0xc00>; | |
| 1275 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
| 1276 | clocks = <&cpg CPG_MOD 328>; | |
| 1277 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1278 | resets = <&cpg 328>; | |
| 1279 | status = "disabled"; | |
| 8faafa71 GU |
1280 | }; |
| 1281 | ||
| 1282 | ohci0: usb@ee080000 { | |
| 3e95050a YS |
1283 | compatible = "generic-ohci"; |
| 1284 | reg = <0 0xee080000 0 0x100>; | |
| 1285 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
| 1286 | clocks = <&cpg CPG_MOD 703>; | |
| 1287 | phys = <&usb2_phy0>; | |
| 1288 | phy-names = "usb"; | |
| 1289 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1290 | resets = <&cpg 703>; | |
| 1291 | status = "disabled"; | |
| 8faafa71 GU |
1292 | }; |
| 1293 | ||
| 1294 | ehci0: usb@ee080100 { | |
| 3e95050a YS |
1295 | compatible = "generic-ehci"; |
| 1296 | reg = <0 0xee080100 0 0x100>; | |
| 1297 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
| 1298 | clocks = <&cpg CPG_MOD 703>; | |
| 1299 | phys = <&usb2_phy0>; | |
| 1300 | phy-names = "usb"; | |
| 1301 | companion= <&ohci0>; | |
| 1302 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1303 | resets = <&cpg 703>; | |
| 1304 | status = "disabled"; | |
| 8faafa71 GU |
1305 | }; |
| 1306 | ||
| 1307 | usb2_phy0: usb-phy@ee080200 { | |
| bf680123 YS |
1308 | compatible = "renesas,usb2-phy-r8a7796", |
| 1309 | "renesas,rcar-gen3-usb2-phy"; | |
| 1310 | reg = <0 0xee080200 0 0x700>; | |
| 1311 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
| 1312 | clocks = <&cpg CPG_MOD 703>; | |
| 1313 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1314 | resets = <&cpg 703>; | |
| 1315 | #phy-cells = <0>; | |
| 1316 | status = "disabled"; | |
| 8faafa71 GU |
1317 | }; |
| 1318 | ||
| 1319 | ohci1: usb@ee0a0000 { | |
| 3e95050a YS |
1320 | compatible = "generic-ohci"; |
| 1321 | reg = <0 0xee0a0000 0 0x100>; | |
| 1322 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; | |
| 1323 | clocks = <&cpg CPG_MOD 702>; | |
| 1324 | phys = <&usb2_phy1>; | |
| 1325 | phy-names = "usb"; | |
| 1326 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1327 | resets = <&cpg 702>; | |
| 1328 | status = "disabled"; | |
| 8faafa71 GU |
1329 | }; |
| 1330 | ||
| 1331 | ehci1: usb@ee0a0100 { | |
| 3e95050a YS |
1332 | compatible = "generic-ehci"; |
| 1333 | reg = <0 0xee0a0100 0 0x100>; | |
| 1334 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; | |
| 1335 | clocks = <&cpg CPG_MOD 702>; | |
| 1336 | phys = <&usb2_phy1>; | |
| 1337 | phy-names = "usb"; | |
| 1338 | companion= <&ohci1>; | |
| 1339 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1340 | resets = <&cpg 702>; | |
| 1341 | status = "disabled"; | |
| 8faafa71 GU |
1342 | }; |
| 1343 | ||
| 1344 | usb2_phy1: usb-phy@ee0a0200 { | |
| bf680123 YS |
1345 | compatible = "renesas,usb2-phy-r8a7796", |
| 1346 | "renesas,rcar-gen3-usb2-phy"; | |
| 1347 | reg = <0 0xee0a0200 0 0x700>; | |
| 1348 | clocks = <&cpg CPG_MOD 702>; | |
| 1349 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1350 | resets = <&cpg 702>; | |
| 1351 | #phy-cells = <0>; | |
| 1352 | status = "disabled"; | |
| 8faafa71 GU |
1353 | }; |
| 1354 | ||
| a513cf1e SH |
1355 | sdhi0: sd@ee100000 { |
| 1356 | compatible = "renesas,sdhi-r8a7796"; | |
| 1357 | reg = <0 0xee100000 0 0x2000>; | |
| 1358 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; | |
| 1359 | clocks = <&cpg CPG_MOD 314>; | |
| 1360 | max-frequency = <200000000>; | |
| 1361 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 1362 | resets = <&cpg 314>; |
| a513cf1e SH |
1363 | status = "disabled"; |
| 1364 | }; | |
| 1365 | ||
| 1366 | sdhi1: sd@ee120000 { | |
| 1367 | compatible = "renesas,sdhi-r8a7796"; | |
| 1368 | reg = <0 0xee120000 0 0x2000>; | |
| 1369 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; | |
| 1370 | clocks = <&cpg CPG_MOD 313>; | |
| 1371 | max-frequency = <200000000>; | |
| 1372 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 1373 | resets = <&cpg 313>; |
| a513cf1e SH |
1374 | status = "disabled"; |
| 1375 | }; | |
| 1376 | ||
| 1377 | sdhi2: sd@ee140000 { | |
| 1378 | compatible = "renesas,sdhi-r8a7796"; | |
| 1379 | reg = <0 0xee140000 0 0x2000>; | |
| 1380 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; | |
| 1381 | clocks = <&cpg CPG_MOD 312>; | |
| 1382 | max-frequency = <200000000>; | |
| 1383 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 1384 | resets = <&cpg 312>; |
| a513cf1e SH |
1385 | status = "disabled"; |
| 1386 | }; | |
| 1387 | ||
| 1388 | sdhi3: sd@ee160000 { | |
| 1389 | compatible = "renesas,sdhi-r8a7796"; | |
| 1390 | reg = <0 0xee160000 0 0x2000>; | |
| 1391 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; | |
| 1392 | clocks = <&cpg CPG_MOD 311>; | |
| 1393 | max-frequency = <200000000>; | |
| 1394 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 1395 | resets = <&cpg 311>; |
| a513cf1e SH |
1396 | status = "disabled"; |
| 1397 | }; | |
| af25d1c2 WS |
1398 | |
| 1399 | tsc: thermal@e6198000 { | |
| 1400 | compatible = "renesas,r8a7796-thermal"; | |
| 1401 | reg = <0 0xe6198000 0 0x68>, | |
| 1402 | <0 0xe61a0000 0 0x5c>, | |
| 1403 | <0 0xe61a8000 0 0x5c>; | |
| 1404 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, | |
| 1405 | <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, | |
| 1406 | <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; | |
| 1407 | clocks = <&cpg CPG_MOD 522>; | |
| 1408 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| bec0948e | 1409 | resets = <&cpg 522>; |
| af25d1c2 WS |
1410 | #thermal-sensor-cells = <1>; |
| 1411 | status = "okay"; | |
| 1412 | }; | |
| 1413 | ||
| 1414 | thermal-zones { | |
| 1415 | sensor_thermal1: sensor-thermal1 { | |
| 1416 | polling-delay-passive = <250>; | |
| 1417 | polling-delay = <1000>; | |
| 1418 | thermal-sensors = <&tsc 0>; | |
| 1419 | ||
| 1420 | trips { | |
| 1421 | sensor1_crit: sensor1-crit { | |
| 1422 | temperature = <120000>; | |
| 1423 | hysteresis = <2000>; | |
| 1424 | type = "critical"; | |
| 1425 | }; | |
| 1426 | }; | |
| 1427 | }; | |
| 1428 | ||
| 1429 | sensor_thermal2: sensor-thermal2 { | |
| 1430 | polling-delay-passive = <250>; | |
| 1431 | polling-delay = <1000>; | |
| 1432 | thermal-sensors = <&tsc 1>; | |
| 1433 | ||
| 1434 | trips { | |
| 1435 | sensor2_crit: sensor2-crit { | |
| 1436 | temperature = <120000>; | |
| 1437 | hysteresis = <2000>; | |
| 1438 | type = "critical"; | |
| 1439 | }; | |
| 1440 | }; | |
| 1441 | }; | |
| 1442 | ||
| 1443 | sensor_thermal3: sensor-thermal3 { | |
| 1444 | polling-delay-passive = <250>; | |
| 1445 | polling-delay = <1000>; | |
| 1446 | thermal-sensors = <&tsc 2>; | |
| 1447 | ||
| 1448 | trips { | |
| 1449 | sensor3_crit: sensor3-crit { | |
| 1450 | temperature = <120000>; | |
| 1451 | hysteresis = <2000>; | |
| 1452 | type = "critical"; | |
| 1453 | }; | |
| 1454 | }; | |
| 1455 | }; | |
| 1456 | }; | |
| 8faafa71 GU |
1457 | |
| 1458 | rcar_sound: sound@ec500000 { | |
| 6f3a5282 KM |
1459 | /* |
| 1460 | * #sound-dai-cells is required | |
| 1461 | * | |
| 1462 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
| 1463 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
| 1464 | */ | |
| 1465 | /* | |
| 1466 | * #clock-cells is required for audio_clkout0/1/2/3 | |
| 1467 | * | |
| 1468 | * clkout : #clock-cells = <0>; <&rcar_sound>; | |
| 1469 | * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; | |
| 1470 | */ | |
| 1471 | compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; | |
| 1472 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
| 1473 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
| 1474 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
| 1475 | <0 0xec541000 0 0x280>, /* SSI */ | |
| 1476 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ | |
| 1477 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
| 1478 | ||
| 1479 | clocks = <&cpg CPG_MOD 1005>, | |
| 1480 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
| 1481 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
| 1482 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
| 1483 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
| 1484 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
| b6fd1b1f KM |
1485 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
| 1486 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
| 1487 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
| 1488 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
| 1489 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
| 5a38945e | 1490 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
| 53394b60 | 1491 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
| 688d9813 | 1492 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
| 6f3a5282 KM |
1493 | <&audio_clk_a>, <&audio_clk_b>, |
| 1494 | <&audio_clk_c>, | |
| 1495 | <&cpg CPG_CORE R8A7796_CLK_S0D4>; | |
| 1496 | clock-names = "ssi-all", | |
| 1497 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
| 1498 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
| 1499 | "ssi.1", "ssi.0", | |
| b6fd1b1f KM |
1500 | "src.9", "src.8", "src.7", "src.6", |
| 1501 | "src.5", "src.4", "src.3", "src.2", | |
| 1502 | "src.1", "src.0", | |
| 53394b60 | 1503 | "mix.1", "mix.0", |
| 5a38945e | 1504 | "ctu.1", "ctu.0", |
| 688d9813 | 1505 | "dvc.0", "dvc.1", |
| 6f3a5282 KM |
1506 | "clk_a", "clk_b", "clk_c", "clk_i"; |
| 1507 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 4d1255eb GU |
1508 | resets = <&cpg 1005>, |
| 1509 | <&cpg 1006>, <&cpg 1007>, | |
| 1510 | <&cpg 1008>, <&cpg 1009>, | |
| 1511 | <&cpg 1010>, <&cpg 1011>, | |
| 1512 | <&cpg 1012>, <&cpg 1013>, | |
| 1513 | <&cpg 1014>, <&cpg 1015>; | |
| 1514 | reset-names = "ssi-all", | |
| 1515 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
| 1516 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
| 1517 | "ssi.1", "ssi.0"; | |
| 6f3a5282 | 1518 | status = "disabled"; |
| 8faafa71 GU |
1519 | |
| 1520 | rcar_sound,dvc { | |
| 1521 | dvc0: dvc-0 { | |
| 688d9813 KM |
1522 | dmas = <&audma1 0xbc>; |
| 1523 | dma-names = "tx"; | |
| 8faafa71 | 1524 | }; |
| 8faafa71 | 1525 | dvc1: dvc-1 { |
| 688d9813 KM |
1526 | dmas = <&audma1 0xbe>; |
| 1527 | dma-names = "tx"; | |
| 8faafa71 GU |
1528 | }; |
| 1529 | }; | |
| 1530 | ||
| 53394b60 KM |
1531 | rcar_sound,mix { |
| 1532 | mix0: mix-0 { }; | |
| 1533 | mix1: mix-1 { }; | |
| 1534 | }; | |
| 1535 | ||
| 5a38945e KM |
1536 | rcar_sound,ctu { |
| 1537 | ctu00: ctu-0 { }; | |
| 1538 | ctu01: ctu-1 { }; | |
| 1539 | ctu02: ctu-2 { }; | |
| 1540 | ctu03: ctu-3 { }; | |
| 1541 | ctu10: ctu-4 { }; | |
| 1542 | ctu11: ctu-5 { }; | |
| 1543 | ctu12: ctu-6 { }; | |
| 1544 | ctu13: ctu-7 { }; | |
| 1545 | }; | |
| 1546 | ||
| 8faafa71 GU |
1547 | rcar_sound,src { |
| 1548 | src0: src-0 { | |
| b6fd1b1f KM |
1549 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
| 1550 | dmas = <&audma0 0x85>, <&audma1 0x9a>; | |
| 1551 | dma-names = "rx", "tx"; | |
| 8faafa71 GU |
1552 | }; |
| 1553 | src1: src-1 { | |
| b6fd1b1f KM |
1554 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
| 1555 | dmas = <&audma0 0x87>, <&audma1 0x9c>; | |
| 1556 | dma-names = "rx", "tx"; | |
| 1557 | }; | |
| 1558 | src2: src-2 { | |
| 1559 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; | |
| 1560 | dmas = <&audma0 0x89>, <&audma1 0x9e>; | |
| 1561 | dma-names = "rx", "tx"; | |
| 1562 | }; | |
| 1563 | src3: src-3 { | |
| 1564 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; | |
| 1565 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; | |
| 1566 | dma-names = "rx", "tx"; | |
| 1567 | }; | |
| 1568 | src4: src-4 { | |
| 1569 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; | |
| 1570 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; | |
| 1571 | dma-names = "rx", "tx"; | |
| 1572 | }; | |
| 1573 | src5: src-5 { | |
| 1574 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; | |
| 1575 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; | |
| 1576 | dma-names = "rx", "tx"; | |
| 1577 | }; | |
| 1578 | src6: src-6 { | |
| 1579 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; | |
| 1580 | dmas = <&audma0 0x91>, <&audma1 0xb4>; | |
| 1581 | dma-names = "rx", "tx"; | |
| 1582 | }; | |
| 1583 | src7: src-7 { | |
| 1584 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; | |
| 1585 | dmas = <&audma0 0x93>, <&audma1 0xb6>; | |
| 1586 | dma-names = "rx", "tx"; | |
| 1587 | }; | |
| 1588 | src8: src-8 { | |
| 1589 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; | |
| 1590 | dmas = <&audma0 0x95>, <&audma1 0xb8>; | |
| 1591 | dma-names = "rx", "tx"; | |
| 1592 | }; | |
| 1593 | src9: src-9 { | |
| 1594 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; | |
| 1595 | dmas = <&audma0 0x97>, <&audma1 0xba>; | |
| 1596 | dma-names = "rx", "tx"; | |
| 8faafa71 GU |
1597 | }; |
| 1598 | }; | |
| 1599 | ||
| 1600 | rcar_sound,ssi { | |
| 1601 | ssi0: ssi-0 { | |
| 6f3a5282 | 1602 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
| c93b98e5 KM |
1603 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
| 1604 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 8faafa71 | 1605 | }; |
| 8faafa71 | 1606 | ssi1: ssi-1 { |
| 6f3a5282 | 1607 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
| c93b98e5 KM |
1608 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
| 1609 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 6f3a5282 KM |
1610 | }; |
| 1611 | ssi2: ssi-2 { | |
| 1612 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; | |
| c93b98e5 KM |
1613 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
| 1614 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 6f3a5282 KM |
1615 | }; |
| 1616 | ssi3: ssi-3 { | |
| 1617 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; | |
| c93b98e5 KM |
1618 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
| 1619 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 6f3a5282 KM |
1620 | }; |
| 1621 | ssi4: ssi-4 { | |
| 1622 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; | |
| c93b98e5 KM |
1623 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
| 1624 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 6f3a5282 KM |
1625 | }; |
| 1626 | ssi5: ssi-5 { | |
| 1627 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; | |
| c93b98e5 KM |
1628 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
| 1629 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 6f3a5282 KM |
1630 | }; |
| 1631 | ssi6: ssi-6 { | |
| 1632 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; | |
| c93b98e5 KM |
1633 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
| 1634 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 6f3a5282 KM |
1635 | }; |
| 1636 | ssi7: ssi-7 { | |
| 1637 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; | |
| c93b98e5 KM |
1638 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
| 1639 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 6f3a5282 KM |
1640 | }; |
| 1641 | ssi8: ssi-8 { | |
| 1642 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; | |
| c93b98e5 KM |
1643 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
| 1644 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 6f3a5282 KM |
1645 | }; |
| 1646 | ssi9: ssi-9 { | |
| 1647 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; | |
| c93b98e5 KM |
1648 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
| 1649 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 8faafa71 GU |
1650 | }; |
| 1651 | }; | |
| 1652 | }; | |
| 1653 | ||
| 1654 | pciec0: pcie@fe000000 { | |
| 1655 | /* placeholder */ | |
| 1656 | }; | |
| 1657 | ||
| 1658 | pciec1: pcie@ee800000 { | |
| 1659 | /* placeholder */ | |
| 1660 | }; | |
| 1661 | ||
| 41dbbf0c LP |
1662 | fcpf0: fcp@fe950000 { |
| 1663 | compatible = "renesas,fcpf"; | |
| 1664 | reg = <0 0xfe950000 0 0x200>; | |
| 1665 | clocks = <&cpg CPG_MOD 615>; | |
| 1666 | power-domains = <&sysc R8A7796_PD_A3VC>; | |
| 1667 | resets = <&cpg 615>; | |
| 1668 | }; | |
| 1669 | ||
| f06ffdfb LP |
1670 | vspb: vsp@fe960000 { |
| 1671 | compatible = "renesas,vsp2"; | |
| 1672 | reg = <0 0xfe960000 0 0x8000>; | |
| 1673 | interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; | |
| 1674 | clocks = <&cpg CPG_MOD 626>; | |
| 1675 | power-domains = <&sysc R8A7796_PD_A3VC>; | |
| 1676 | resets = <&cpg 626>; | |
| 1677 | ||
| 1678 | renesas,fcp = <&fcpvb0>; | |
| 1679 | }; | |
| 1680 | ||
| 41dbbf0c LP |
1681 | fcpvb0: fcp@fe96f000 { |
| 1682 | compatible = "renesas,fcpv"; | |
| 1683 | reg = <0 0xfe96f000 0 0x200>; | |
| 1684 | clocks = <&cpg CPG_MOD 607>; | |
| 1685 | power-domains = <&sysc R8A7796_PD_A3VC>; | |
| 1686 | resets = <&cpg 607>; | |
| 1687 | }; | |
| 1688 | ||
| f06ffdfb LP |
1689 | vspi0: vsp@fe9a0000 { |
| 1690 | compatible = "renesas,vsp2"; | |
| 1691 | reg = <0 0xfe9a0000 0 0x8000>; | |
| 1692 | interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; | |
| 1693 | clocks = <&cpg CPG_MOD 631>; | |
| 1694 | power-domains = <&sysc R8A7796_PD_A3VC>; | |
| 1695 | resets = <&cpg 631>; | |
| 1696 | ||
| 1697 | renesas,fcp = <&fcpvi0>; | |
| 1698 | }; | |
| 1699 | ||
| 41dbbf0c LP |
1700 | fcpvi0: fcp@fe9af000 { |
| 1701 | compatible = "renesas,fcpv"; | |
| 1702 | reg = <0 0xfe9af000 0 0x200>; | |
| 1703 | clocks = <&cpg CPG_MOD 611>; | |
| 1704 | power-domains = <&sysc R8A7796_PD_A3VC>; | |
| 1705 | resets = <&cpg 611>; | |
| 1706 | }; | |
| 1707 | ||
| f06ffdfb LP |
1708 | vspd0: vsp@fea20000 { |
| 1709 | compatible = "renesas,vsp2"; | |
| 1710 | reg = <0 0xfea20000 0 0x4000>; | |
| 1711 | interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; | |
| 1712 | clocks = <&cpg CPG_MOD 623>; | |
| 1713 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1714 | resets = <&cpg 623>; | |
| 1715 | ||
| 1716 | renesas,fcp = <&fcpvd0>; | |
| 1717 | }; | |
| 1718 | ||
| 41dbbf0c LP |
1719 | fcpvd0: fcp@fea27000 { |
| 1720 | compatible = "renesas,fcpv"; | |
| 1721 | reg = <0 0xfea27000 0 0x200>; | |
| 1722 | clocks = <&cpg CPG_MOD 603>; | |
| 1723 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1724 | resets = <&cpg 603>; | |
| 1725 | }; | |
| 1726 | ||
| f06ffdfb LP |
1727 | vspd1: vsp@fea28000 { |
| 1728 | compatible = "renesas,vsp2"; | |
| 1729 | reg = <0 0xfea28000 0 0x4000>; | |
| 1730 | interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; | |
| 1731 | clocks = <&cpg CPG_MOD 622>; | |
| 1732 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1733 | resets = <&cpg 622>; | |
| 1734 | ||
| 1735 | renesas,fcp = <&fcpvd1>; | |
| 1736 | }; | |
| 1737 | ||
| 41dbbf0c LP |
1738 | fcpvd1: fcp@fea2f000 { |
| 1739 | compatible = "renesas,fcpv"; | |
| 1740 | reg = <0 0xfea2f000 0 0x200>; | |
| 1741 | clocks = <&cpg CPG_MOD 602>; | |
| 1742 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1743 | resets = <&cpg 602>; | |
| 1744 | }; | |
| 1745 | ||
| f06ffdfb LP |
1746 | vspd2: vsp@fea30000 { |
| 1747 | compatible = "renesas,vsp2"; | |
| 1748 | reg = <0 0xfea30000 0 0x4000>; | |
| 1749 | interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; | |
| 1750 | clocks = <&cpg CPG_MOD 621>; | |
| 1751 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1752 | resets = <&cpg 621>; | |
| 1753 | ||
| 1754 | renesas,fcp = <&fcpvd2>; | |
| 1755 | }; | |
| 1756 | ||
| 41dbbf0c LP |
1757 | fcpvd2: fcp@fea37000 { |
| 1758 | compatible = "renesas,fcpv"; | |
| 1759 | reg = <0 0xfea37000 0 0x200>; | |
| 1760 | clocks = <&cpg CPG_MOD 601>; | |
| 1761 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1762 | resets = <&cpg 601>; | |
| 1763 | }; | |
| 1764 | ||
| 565f5b6f LP |
1765 | hdmi0: hdmi@fead0000 { |
| 1766 | compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; | |
| 1767 | reg = <0 0xfead0000 0 0x10000>; | |
| 1768 | interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; | |
| 1769 | clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; | |
| 1770 | clock-names = "iahb", "isfr"; | |
| 1771 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; | |
| 1772 | resets = <&cpg 729>; | |
| 1773 | status = "disabled"; | |
| 1774 | ||
| 1775 | ports { | |
| 1776 | #address-cells = <1>; | |
| 1777 | #size-cells = <0>; | |
| 1778 | port@0 { | |
| 1779 | reg = <0>; | |
| 1780 | dw_hdmi0_in: endpoint { | |
| 1781 | remote-endpoint = <&du_out_hdmi0>; | |
| 1782 | }; | |
| 1783 | }; | |
| 1784 | port@1 { | |
| 1785 | reg = <1>; | |
| 1786 | }; | |
| 1787 | }; | |
| 1788 | }; | |
| 1789 | ||
| 8faafa71 | 1790 | du: display@feb00000 { |
| af413f65 LP |
1791 | compatible = "renesas,du-r8a7796"; |
| 1792 | reg = <0 0xfeb00000 0 0x70000>, | |
| 1793 | <0 0xfeb90000 0 0x14>; | |
| 1794 | reg-names = "du", "lvds.0"; | |
| 1795 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, | |
| 1796 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, | |
| 1797 | <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; | |
| 1798 | clocks = <&cpg CPG_MOD 724>, | |
| 1799 | <&cpg CPG_MOD 723>, | |
| 1800 | <&cpg CPG_MOD 722>, | |
| 1801 | <&cpg CPG_MOD 727>; | |
| 1802 | clock-names = "du.0", "du.1", "du.2", "lvds.0"; | |
| 1803 | status = "disabled"; | |
| 1804 | ||
| 1805 | vsps = <&vspd0 &vspd1 &vspd2>; | |
| 8faafa71 GU |
1806 | |
| 1807 | ports { | |
| 1808 | #address-cells = <1>; | |
| 1809 | #size-cells = <0>; | |
| 1810 | ||
| 1811 | port@0 { | |
| 1812 | reg = <0>; | |
| 1813 | du_out_rgb: endpoint { | |
| 1814 | }; | |
| 1815 | }; | |
| af413f65 LP |
1816 | port@1 { |
| 1817 | reg = <1>; | |
| 1818 | du_out_hdmi0: endpoint { | |
| 565f5b6f | 1819 | remote-endpoint = <&dw_hdmi0_in>; |
| af413f65 LP |
1820 | }; |
| 1821 | }; | |
| 1822 | port@2 { | |
| 1823 | reg = <2>; | |
| 1824 | du_out_lvds0: endpoint { | |
| 1825 | }; | |
| 1826 | }; | |
| 8faafa71 GU |
1827 | }; |
| 1828 | }; | |
| e8f2ed72 SS |
1829 | |
| 1830 | imr-lx4@fe860000 { | |
| 1831 | compatible = "renesas,r8a7796-imr-lx4", | |
| 1832 | "renesas,imr-lx4"; | |
| 1833 | reg = <0 0xfe860000 0 0x2000>; | |
| 1834 | interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; | |
| 1835 | clocks = <&cpg CPG_MOD 823>; | |
| 1836 | power-domains = <&sysc R8A7796_PD_A3VC>; | |
| 1837 | resets = <&cpg 823>; | |
| 1838 | }; | |
| 1839 | ||
| 1840 | imr-lx4@fe870000 { | |
| 1841 | compatible = "renesas,r8a7796-imr-lx4", | |
| 1842 | "renesas,imr-lx4"; | |
| 1843 | reg = <0 0xfe870000 0 0x2000>; | |
| 1844 | interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; | |
| 1845 | clocks = <&cpg CPG_MOD 822>; | |
| 1846 | power-domains = <&sysc R8A7796_PD_A3VC>; | |
| 1847 | resets = <&cpg 822>; | |
| 1848 | }; | |
| 1561f207 SH |
1849 | }; |
| 1850 | }; |