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[mirror_ubuntu-focal-kernel.git] / arch / arm64 / boot / dts / renesas / r8a77965.dtsi
CommitLineData
df863d6f
JM		 1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a77965 SoC
4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 *
7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */
10
11#include <dt-bindings/clock/renesas-cpg-mssr.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13
14#define CPG_AUDIO_CLK_I 10
15
16/ {
17 compatible = "renesas,r8a77965";
18 #address-cells = <2>;
19 #size-cells = <2>;
20
89527922
GU		 21 aliases {
22 i2c7 = &i2c_dvfs;
23 };
24
001f3b03
YK		 25 /*
26 * The external audio clocks are configured as 0 Hz fixed frequency
27 * clocks by default.
28 * Boards that provide audio clocks should override them.
29 */
30 audio_clk_a: audio_clk_a {
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
33 clock-frequency = <0>;
34 };
35
36 audio_clk_b: audio_clk_b {
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-frequency = <0>;
40 };
41
42 audio_clk_c: audio_clk_c {
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <0>;
46 };
47
48 /* External CAN clock - to be overridden by boards that provide it */
49 can_clk: can {
50 compatible = "fixed-clock";
51 #clock-cells = <0>;
52 clock-frequency = <0>;
df863d6f
JM		 53 };
54
55 cpus {
56 #address-cells = <1>;
57 #size-cells = <0>;
58
59 a57_0: cpu@0 {
60 compatible = "arm,cortex-a57", "arm,armv8";
61 reg = <0x0>;
62 device_type = "cpu";
63 power-domains = <&sysc 0>;
64 next-level-cache = <&L2_CA57>;
65 enable-method = "psci";
66 };
67
68 a57_1: cpu@1 {
69 compatible = "arm,cortex-a57","arm,armv8";
70 reg = <0x1>;
71 device_type = "cpu";
72 power-domains = <&sysc 1>;
73 next-level-cache = <&L2_CA57>;
74 enable-method = "psci";
75 };
76
77 L2_CA57: cache-controller-0 {
78 compatible = "cache";
df863d6f
JM		 79 power-domains = <&sysc 12>;
80 cache-unified;
81 cache-level = <2>;
82 };
83 };
84
85 extal_clk: extal {
86 compatible = "fixed-clock";
87 #clock-cells = <0>;
88 /* This value must be overridden by the board */
89 clock-frequency = <0>;
90 };
91
92 extalr_clk: extalr {
93 compatible = "fixed-clock";
94 #clock-cells = <0>;
95 /* This value must be overridden by the board */
96 clock-frequency = <0>;
97 };
98
001f3b03
YK		 99 /* External PCIe clock - can be overridden by the board */
100 pcie_bus_clk: pcie_bus {
df863d6f
JM		 101 compatible = "fixed-clock";
102 #clock-cells = <0>;
103 clock-frequency = <0>;
104 };
105
001f3b03
YK		 106 pmu_a57 {
107 compatible = "arm,cortex-a57-pmu";
108 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
109 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
110 interrupt-affinity = <&a57_0>,
111 <&a57_1>;
df863d6f
JM		 112 };
113
001f3b03
YK		 114 psci {
115 compatible = "arm,psci-1.0", "arm,psci-0.2";
116 method = "smc";
df863d6f
JM		 117 };
118
119 /* External SCIF clock - to be overridden by boards that provide it */
120 scif_clk: scif {
121 compatible = "fixed-clock";
122 #clock-cells = <0>;
123 clock-frequency = <0>;
124 };
125
df863d6f
JM		 126 soc {
127 compatible = "simple-bus";
128 interrupt-parent = <&gic>;
129 #address-cells = <2>;
130 #size-cells = <2>;
131 ranges;
132
133 gic: interrupt-controller@f1010000 {
134 compatible = "arm,gic-400";
135 #interrupt-cells = <3>;
136 #address-cells = <0>;
137 interrupt-controller;
138 reg = <0x0 0xf1010000 0 0x1000>,
139 <0x0 0xf1020000 0 0x20000>,
140 <0x0 0xf1040000 0 0x20000>,
141 <0x0 0xf1060000 0 0x20000>;
142 interrupts = <GIC_PPI 9
143 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
144 clocks = <&cpg CPG_MOD 408>;
145 clock-names = "clk";
146 power-domains = <&sysc 32>;
147 resets = <&cpg 408>;
148 };
149
150 pfc: pin-controller@e6060000 {
151 compatible = "renesas,pfc-r8a77965";
152 reg = <0 0xe6060000 0 0x50c>;
153 };
154
155 cpg: clock-controller@e6150000 {
156 compatible = "renesas,r8a77965-cpg-mssr";
157 reg = <0 0xe6150000 0 0x1000>;
158 clocks = <&extal_clk>, <&extalr_clk>;
159 clock-names = "extal", "extalr";
160 #clock-cells = <2>;
161 #power-domain-cells = <0>;
162 #reset-cells = <1>;
163 };
164
165 rst: reset-controller@e6160000 {
166 compatible = "renesas,r8a77965-rst";
167 reg = <0 0xe6160000 0 0x0200>;
168 };
169
170 prr: chipid@fff00044 {
171 compatible = "renesas,prr";
172 reg = <0 0xfff00044 0 4>;
173 };
174
175 sysc: system-controller@e6180000 {
176 compatible = "renesas,r8a77965-sysc";
177 reg = <0 0xe6180000 0 0x0400>;
178 #power-domain-cells = <1>;
179 };
180
181 gpio0: gpio@e6050000 {
e34ca96b
JM		 182 compatible = "renesas,gpio-r8a77965",
183 "renesas,rcar-gen3-gpio";
184 reg = <0 0xe6050000 0 0x50>;
185 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
186 #gpio-cells = <2>;
187 gpio-controller;
188 gpio-ranges = <&pfc 0 0 16>;
189 #interrupt-cells = <2>;
190 interrupt-controller;
191 clocks = <&cpg CPG_MOD 912>;
192 power-domains = <&sysc 32>;
193 resets = <&cpg 912>;
df863d6f
JM		 194 };
195
196 gpio1: gpio@e6051000 {
e34ca96b
JM		 197 compatible = "renesas,gpio-r8a77965",
198 "renesas,rcar-gen3-gpio";
199 reg = <0 0xe6051000 0 0x50>;
200 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
201 #gpio-cells = <2>;
202 gpio-controller;
203 gpio-ranges = <&pfc 0 32 29>;
204 #interrupt-cells = <2>;
205 interrupt-controller;
206 clocks = <&cpg CPG_MOD 911>;
207 power-domains = <&sysc 32>;
208 resets = <&cpg 911>;
df863d6f
JM		 209 };
210
211 gpio2: gpio@e6052000 {
e34ca96b
JM		 212 compatible = "renesas,gpio-r8a77965",
213 "renesas,rcar-gen3-gpio";
214 reg = <0 0xe6052000 0 0x50>;
215 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
216 #gpio-cells = <2>;
217 gpio-controller;
218 gpio-ranges = <&pfc 0 64 15>;
219 #interrupt-cells = <2>;
220 interrupt-controller;
221 clocks = <&cpg CPG_MOD 910>;
222 power-domains = <&sysc 32>;
223 resets = <&cpg 910>;
df863d6f
JM		 224 };
225
226 gpio3: gpio@e6053000 {
e34ca96b
JM		 227 compatible = "renesas,gpio-r8a77965",
228 "renesas,rcar-gen3-gpio";
229 reg = <0 0xe6053000 0 0x50>;
230 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
231 #gpio-cells = <2>;
232 gpio-controller;
233 gpio-ranges = <&pfc 0 96 16>;
234 #interrupt-cells = <2>;
235 interrupt-controller;
236 clocks = <&cpg CPG_MOD 909>;
237 power-domains = <&sysc 32>;
238 resets = <&cpg 909>;
df863d6f
JM		 239 };
240
241 gpio4: gpio@e6054000 {
e34ca96b
JM		 242 compatible = "renesas,gpio-r8a77965",
243 "renesas,rcar-gen3-gpio";
244 reg = <0 0xe6054000 0 0x50>;
245 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
246 #gpio-cells = <2>;
247 gpio-controller;
248 gpio-ranges = <&pfc 0 128 18>;
249 #interrupt-cells = <2>;
250 interrupt-controller;
251 clocks = <&cpg CPG_MOD 908>;
252 power-domains = <&sysc 32>;
253 resets = <&cpg 908>;
df863d6f
JM		 254 };
255
256 gpio5: gpio@e6055000 {
e34ca96b
JM		 257 compatible = "renesas,gpio-r8a77965",
258 "renesas,rcar-gen3-gpio";
259 reg = <0 0xe6055000 0 0x50>;
260 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
261 #gpio-cells = <2>;
262 gpio-controller;
263 gpio-ranges = <&pfc 0 160 26>;
264 #interrupt-cells = <2>;
265 interrupt-controller;
266 clocks = <&cpg CPG_MOD 907>;
267 power-domains = <&sysc 32>;
268 resets = <&cpg 907>;
df863d6f
JM		 269 };
270
271 gpio6: gpio@e6055400 {
e34ca96b
JM		 272 compatible = "renesas,gpio-r8a77965",
273 "renesas,rcar-gen3-gpio";
274 reg = <0 0xe6055400 0 0x50>;
275 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
276 #gpio-cells = <2>;
277 gpio-controller;
278 gpio-ranges = <&pfc 0 192 32>;
279 #interrupt-cells = <2>;
280 interrupt-controller;
281 clocks = <&cpg CPG_MOD 906>;
282 power-domains = <&sysc 32>;
283 resets = <&cpg 906>;
df863d6f
JM		 284 };
285
286 gpio7: gpio@e6055800 {
e34ca96b
JM		 287 compatible = "renesas,gpio-r8a77965",
288 "renesas,rcar-gen3-gpio";
289 reg = <0 0xe6055800 0 0x50>;
290 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
291 #gpio-cells = <2>;
292 gpio-controller;
293 gpio-ranges = <&pfc 0 224 4>;
294 #interrupt-cells = <2>;
295 interrupt-controller;
296 clocks = <&cpg CPG_MOD 905>;
297 power-domains = <&sysc 32>;
298 resets = <&cpg 905>;
df863d6f
JM		 299 };
300
301 intc_ex: interrupt-controller@e61c0000 {
ba03b432 302 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
f5af7701
JM		 303 #interrupt-cells = <2>;
304 interrupt-controller;
9e1b00a2 305 reg = <0 0xe61c0000 0 0x200>;
ba03b432
GU		 306 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
307 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
308 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
309 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
310 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
311 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
312 clocks = <&cpg CPG_MOD 407>;
313 power-domains = <&sysc 32>;
314 resets = <&cpg 407>;
df863d6f
JM		 315 };
316
317 dmac0: dma-controller@e6700000 {
838c1121
JM		 318 compatible = "renesas,dmac-r8a77965",
319 "renesas,rcar-dmac";
320 reg = <0 0xe6700000 0 0x10000>;
321 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
322 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
323 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
324 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
325 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
326 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
327 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
328 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
329 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
330 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
331 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
332 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
333 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
334 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
335 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
336 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
337 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
338 interrupt-names = "error",
339 "ch0", "ch1", "ch2", "ch3",
340 "ch4", "ch5", "ch6", "ch7",
341 "ch8", "ch9", "ch10", "ch11",
342 "ch12", "ch13", "ch14", "ch15";
343 clocks = <&cpg CPG_MOD 219>;
344 clock-names = "fck";
345 power-domains = <&sysc 32>;
346 resets = <&cpg 219>;
347 #dma-cells = <1>;
348 dma-channels = <16>;
df863d6f
JM		 349 };
350
351 dmac1: dma-controller@e7300000 {
838c1121
JM		 352 compatible = "renesas,dmac-r8a77965",
353 "renesas,rcar-dmac";
354 reg = <0 0xe7300000 0 0x10000>;
355 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
356 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
357 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
360 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
361 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
362 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
363 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
364 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
365 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
366 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
367 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
368 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
369 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
370 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
371 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
372 interrupt-names = "error",
373 "ch0", "ch1", "ch2", "ch3",
374 "ch4", "ch5", "ch6", "ch7",
375 "ch8", "ch9", "ch10", "ch11",
376 "ch12", "ch13", "ch14", "ch15";
377 clocks = <&cpg CPG_MOD 218>;
378 clock-names = "fck";
379 power-domains = <&sysc 32>;
380 resets = <&cpg 218>;
381 #dma-cells = <1>;
382 dma-channels = <16>;
df863d6f
JM		 383 };
384
385 dmac2: dma-controller@e7310000 {
838c1121
JM		 386 compatible = "renesas,dmac-r8a77965",
387 "renesas,rcar-dmac";
388 reg = <0 0xe7310000 0 0x10000>;
389 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
390 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
393 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
394 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
395 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
396 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
397 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
398 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
399 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
400 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
401 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
402 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
403 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
404 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
405 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
406 interrupt-names = "error",
407 "ch0", "ch1", "ch2", "ch3",
408 "ch4", "ch5", "ch6", "ch7",
409 "ch8", "ch9", "ch10", "ch11",
410 "ch12", "ch13", "ch14", "ch15";
411 clocks = <&cpg CPG_MOD 217>;
412 clock-names = "fck";
413 power-domains = <&sysc 32>;
414 resets = <&cpg 217>;
415 #dma-cells = <1>;
416 dma-channels = <16>;
df863d6f
JM		 417 };
418
419 scif0: serial@e6e60000 {
0ea5b2fd
JM		 420 compatible = "renesas,scif-r8a77965",
421 "renesas,rcar-gen3-scif", "renesas,scif";
422 reg = <0 0xe6e60000 0 64>;
423 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 207>,
425 <&cpg CPG_CORE 20>,
426 <&scif_clk>;
427 clock-names = "fck", "brg_int", "scif_clk";
428 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
429 <&dmac2 0x51>, <&dmac2 0x50>;
430 dma-names = "tx", "rx", "tx", "rx";
431 power-domains = <&sysc 32>;
432 resets = <&cpg 207>;
433 status = "disabled";
df863d6f
JM		 434 };
435
436 scif1: serial@e6e68000 {
0ea5b2fd
JM		 437 compatible = "renesas,scif-r8a77965",
438 "renesas,rcar-gen3-scif", "renesas,scif";
439 reg = <0 0xe6e68000 0 64>;
440 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&cpg CPG_MOD 206>,
442 <&cpg CPG_CORE 20>,
443 <&scif_clk>;
444 clock-names = "fck", "brg_int", "scif_clk";
445 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
446 <&dmac2 0x53>, <&dmac2 0x52>;
447 dma-names = "tx", "rx", "tx", "rx";
448 power-domains = <&sysc 32>;
449 resets = <&cpg 206>;
450 status = "disabled";
df863d6f
JM		 451 };
452
453 scif2: serial@e6e88000 {
0ea5b2fd
JM		 454 compatible = "renesas,scif-r8a77965",
455 "renesas,rcar-gen3-scif", "renesas,scif";
456 reg = <0 0xe6e88000 0 64>;
457 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
458 clocks = <&cpg CPG_MOD 310>,
459 <&cpg CPG_CORE 20>,
460 <&scif_clk>;
461 clock-names = "fck", "brg_int", "scif_clk";
462 power-domains = <&sysc 32>;
463 resets = <&cpg 310>;
464 status = "disabled";
df863d6f
JM		 465 };
466
467 scif3: serial@e6c50000 {
0ea5b2fd
JM		 468 compatible = "renesas,scif-r8a77965",
469 "renesas,rcar-gen3-scif", "renesas,scif";
470 reg = <0 0xe6c50000 0 64>;
471 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
472 clocks = <&cpg CPG_MOD 204>,
473 <&cpg CPG_CORE 20>,
474 <&scif_clk>;
475 clock-names = "fck", "brg_int", "scif_clk";
476 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
477 dma-names = "tx", "rx";
478 power-domains = <&sysc 32>;
479 resets = <&cpg 204>;
480 status = "disabled";
df863d6f
JM		 481 };
482
483 scif4: serial@e6c40000 {
0ea5b2fd
JM		 484 compatible = "renesas,scif-r8a77965",
485 "renesas,rcar-gen3-scif", "renesas,scif";
486 reg = <0 0xe6c40000 0 64>;
487 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
488 clocks = <&cpg CPG_MOD 203>,
489 <&cpg CPG_CORE 20>,
490 <&scif_clk>;
491 clock-names = "fck", "brg_int", "scif_clk";
492 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
493 dma-names = "tx", "rx";
494 power-domains = <&sysc 32>;
495 resets = <&cpg 203>;
496 status = "disabled";
df863d6f
JM		 497 };
498
499 scif5: serial@e6f30000 {
0ea5b2fd
JM		 500 compatible = "renesas,scif-r8a77965",
501 "renesas,rcar-gen3-scif", "renesas,scif";
502 reg = <0 0xe6f30000 0 64>;
503 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
504 clocks = <&cpg CPG_MOD 202>,
505 <&cpg CPG_CORE 20>,
506 <&scif_clk>;
507 clock-names = "fck", "brg_int", "scif_clk";
508 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
509 <&dmac2 0x5b>, <&dmac2 0x5a>;
510 dma-names = "tx", "rx", "tx", "rx";
511 power-domains = <&sysc 32>;
512 resets = <&cpg 202>;
513 status = "disabled";
df863d6f
JM		 514 };
515
516 avb: ethernet@e6800000 {
862a61d0
JM		 517 compatible = "renesas,etheravb-r8a77965",
518 "renesas,etheravb-rcar-gen3";
519 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
520 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
521 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
522 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
523 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
524 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
525 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
526 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
527 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
528 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
529 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
530 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
531 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
532 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
533 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
534 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
535 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
536 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
537 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
538 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
539 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
540 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
541 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
542 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
543 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
544 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
545 interrupt-names = "ch0", "ch1", "ch2", "ch3",
546 "ch4", "ch5", "ch6", "ch7",
547 "ch8", "ch9", "ch10", "ch11",
548 "ch12", "ch13", "ch14", "ch15",
549 "ch16", "ch17", "ch18", "ch19",
550 "ch20", "ch21", "ch22", "ch23",
551 "ch24";
552 clocks = <&cpg CPG_MOD 812>;
553 power-domains = <&sysc 32>;
554 resets = <&cpg 812>;
555 phy-mode = "rgmii";
ba8b5ad0
JM		 556 #address-cells = <1>;
557 #size-cells = <0>;
862a61d0 558 status = "disabled";
df863d6f
JM		 559 };
560
561 csi20: csi2@fea80000 {
9e1b00a2 562 reg = <0 0xfea80000 0 0x10000>;
df863d6f 563 /* placeholder */
ba8b5ad0
JM		 564
565 ports {
566 #address-cells = <1>;
567 #size-cells = <0>;
568 };
df863d6f
JM		 569 };
570
571 csi40: csi2@feaa0000 {
9e1b00a2 572 reg = <0 0xfeaa0000 0 0x10000>;
df863d6f 573 /* placeholder */
ba8b5ad0
JM		 574
575 ports {
576 #address-cells = <1>;
577 #size-cells = <0>;
578 };
df863d6f
JM		 579 };
580
581 vin0: video@e6ef0000 {
9e1b00a2 582 reg = <0 0xe6ef0000 0 0x1000>;
df863d6f
JM		 583 /* placeholder */
584 };
585
586 vin1: video@e6ef1000 {
9e1b00a2 587 reg = <0 0xe6ef1000 0 0x1000>;
df863d6f
JM		 588 /* placeholder */
589 };
590
591 vin2: video@e6ef2000 {
9e1b00a2 592 reg = <0 0xe6ef2000 0 0x1000>;
df863d6f
JM		 593 /* placeholder */
594 };
595
596 vin3: video@e6ef3000 {
9e1b00a2 597 reg = <0 0xe6ef3000 0 0x1000>;
df863d6f
JM		 598 /* placeholder */
599 };
600
601 vin4: video@e6ef4000 {
9e1b00a2 602 reg = <0 0xe6ef4000 0 0x1000>;
df863d6f
JM		 603 /* placeholder */
604 };
605
606 vin5: video@e6ef5000 {
9e1b00a2 607 reg = <0 0xe6ef5000 0 0x1000>;
df863d6f
JM		 608 /* placeholder */
609 };
610
611 vin6: video@e6ef6000 {
9e1b00a2 612 reg = <0 0xe6ef6000 0 0x1000>;
df863d6f
JM		 613 /* placeholder */
614 };
615
616 vin7: video@e6ef7000 {
9e1b00a2 617 reg = <0 0xe6ef7000 0 0x1000>;
df863d6f
JM		 618 /* placeholder */
619 };
620
621 ohci0: usb@ee080000 {
1dfa66cd 622 compatible = "generic-ohci";
9e1b00a2 623 reg = <0 0xee080000 0 0x100>;
1dfa66cd
YS		 624 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
625 clocks = <&cpg CPG_MOD 703>;
626 phys = <&usb2_phy0>;
627 phy-names = "usb";
628 power-domains = <&sysc 32>;
629 resets = <&cpg 703>;
630 status = "disabled";
df863d6f
JM		 631 };
632
633 ehci0: usb@ee080100 {
1dfa66cd 634 compatible = "generic-ehci";
9e1b00a2 635 reg = <0 0xee080100 0 0x100>;
1dfa66cd
YS		 636 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
637 clocks = <&cpg CPG_MOD 703>;
638 phys = <&usb2_phy0>;
639 phy-names = "usb";
640 companion = <&ohci0>;
641 power-domains = <&sysc 32>;
642 resets = <&cpg 703>;
643 status = "disabled";
df863d6f
JM		 644 };
645
646 usb2_phy0: usb-phy@ee080200 {
b5857630
YS		 647 compatible = "renesas,usb2-phy-r8a77965",
648 "renesas,rcar-gen3-usb2-phy";
9e1b00a2 649 reg = <0 0xee080200 0 0x700>;
b5857630
YS		 650 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
651 clocks = <&cpg CPG_MOD 703>;
652 power-domains = <&sysc 32>;
653 resets = <&cpg 703>;
654 #phy-cells = <0>;
655 status = "disabled";
df863d6f
JM		 656 };
657
fe674605 658 usb2_phy1: usb-phy@ee0a0200 {
b5857630
YS		 659 compatible = "renesas,usb2-phy-r8a77965",
660 "renesas,rcar-gen3-usb2-phy";
fe674605 661 reg = <0 0xee0a0200 0 0x700>;
b5857630
YS		 662 clocks = <&cpg CPG_MOD 703>;
663 power-domains = <&sysc 32>;
664 resets = <&cpg 703>;
665 #phy-cells = <0>;
666 status = "disabled";
fe674605
JM		 667 };
668
df863d6f 669 ohci1: usb@ee0a0000 {
1dfa66cd 670 compatible = "generic-ohci";
9e1b00a2 671 reg = <0 0xee0a0000 0 0x100>;
1dfa66cd
YS		 672 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 702>;
674 phys = <&usb2_phy1>;
675 phy-names = "usb";
676 power-domains = <&sysc 32>;
677 resets = <&cpg 702>;
678 status = "disabled";
df863d6f
JM		 679 };
680
681 ehci1: usb@ee0a0100 {
1dfa66cd 682 compatible = "generic-ehci";
9e1b00a2 683 reg = <0 0xee0a0100 0 0x100>;
1dfa66cd
YS		 684 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
685 clocks = <&cpg CPG_MOD 702>;
686 phys = <&usb2_phy1>;
687 phy-names = "usb";
688 companion = <&ohci1>;
689 power-domains = <&sysc 32>;
690 resets = <&cpg 702>;
691 status = "disabled";
df863d6f
JM		 692 };
693
694 i2c0: i2c@e6500000 {
9e1b00a2 695 reg = <0 0xe6500000 0 0x40>;
df863d6f
JM		 696 /* placeholder */
697 };
698
699 i2c1: i2c@e6508000 {
9e1b00a2 700 reg = <0 0xe6508000 0 0x40>;
df863d6f
JM		 701 /* placeholder */
702 };
703
704 i2c2: i2c@e6510000 {
ba8b5ad0
JM		 705 #address-cells = <1>;
706 #size-cells = <0>;
707
9e1b00a2 708 reg = <0 0xe6510000 0 0x40>;
df863d6f
JM		 709 /* placeholder */
710 };
711
712 i2c3: i2c@e66d0000 {
9e1b00a2 713 reg = <0 0xe66d0000 0 0x40>;
df863d6f
JM		 714 /* placeholder */
715 };
716
717 i2c4: i2c@e66d8000 {
ba8b5ad0
JM		 718 #address-cells = <1>;
719 #size-cells = <0>;
720
9e1b00a2 721 reg = <0 0xe66d8000 0 0x40>;
df863d6f
JM		 722 /* placeholder */
723 };
724
725 i2c5: i2c@e66e0000 {
9e1b00a2 726 reg = <0 0xe66e0000 0 0x40>;
df863d6f
JM		 727 /* placeholder */
728 };
729
730 i2c6: i2c@e66e8000 {
9e1b00a2 731 reg = <0 0xe66e8000 0 0x40>;
df863d6f
JM		 732 /* placeholder */
733 };
734
735 i2c_dvfs: i2c@e60b0000 {
ba8b5ad0
JM		 736 #address-cells = <1>;
737 #size-cells = <0>;
89527922
GU		 738 compatible = "renesas,iic-r8a77965",
739 "renesas,rcar-gen3-iic",
740 "renesas,rmobile-iic";
9e1b00a2 741 reg = <0 0xe60b0000 0 0x425>;
89527922
GU		 742 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
743 clocks = <&cpg CPG_MOD 926>;
744 power-domains = <&sysc 32>;
745 resets = <&cpg 926>;
746 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
747 dma-names = "tx", "rx";
748 status = "disabled";
df863d6f
JM		 749 };
750
751 pwm0: pwm@e6e30000 {
e3ddf00f 752 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 753 reg = <0 0xe6e30000 0 8>;
e3ddf00f
YS		 754 #pwm-cells = <2>;
755 clocks = <&cpg CPG_MOD 523>;
756 resets = <&cpg 523>;
757 power-domains = <&sysc 32>;
758 status = "disabled";
df863d6f
JM		 759 };
760
761 pwm1: pwm@e6e31000 {
e3ddf00f 762 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 763 reg = <0 0xe6e31000 0 8>;
eccdd3f1 764 #pwm-cells = <2>;
e3ddf00f
YS		 765 clocks = <&cpg CPG_MOD 523>;
766 resets = <&cpg 523>;
767 power-domains = <&sysc 32>;
768 status = "disabled";
df863d6f
JM		 769 };
770
771 pwm2: pwm@e6e32000 {
e3ddf00f 772 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 773 reg = <0 0xe6e32000 0 8>;
e3ddf00f
YS		 774 #pwm-cells = <2>;
775 clocks = <&cpg CPG_MOD 523>;
776 resets = <&cpg 523>;
777 power-domains = <&sysc 32>;
778 status = "disabled";
df863d6f
JM		 779 };
780
781 pwm3: pwm@e6e33000 {
e3ddf00f 782 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 783 reg = <0 0xe6e33000 0 8>;
e3ddf00f
YS		 784 #pwm-cells = <2>;
785 clocks = <&cpg CPG_MOD 523>;
786 resets = <&cpg 523>;
787 power-domains = <&sysc 32>;
788 status = "disabled";
df863d6f
JM		 789 };
790
791 pwm4: pwm@e6e34000 {
e3ddf00f 792 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 793 reg = <0 0xe6e34000 0 8>;
e3ddf00f
YS		 794 #pwm-cells = <2>;
795 clocks = <&cpg CPG_MOD 523>;
796 resets = <&cpg 523>;
797 power-domains = <&sysc 32>;
798 status = "disabled";
df863d6f
JM		 799 };
800
801 pwm5: pwm@e6e35000 {
e3ddf00f 802 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 803 reg = <0 0xe6e35000 0 8>;
e3ddf00f
YS		 804 #pwm-cells = <2>;
805 clocks = <&cpg CPG_MOD 523>;
806 resets = <&cpg 523>;
807 power-domains = <&sysc 32>;
808 status = "disabled";
df863d6f
JM		 809 };
810
811 pwm6: pwm@e6e36000 {
e3ddf00f 812 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
9e1b00a2 813 reg = <0 0xe6e36000 0 8>;
e3ddf00f
YS		 814 #pwm-cells = <2>;
815 clocks = <&cpg CPG_MOD 523>;
816 resets = <&cpg 523>;
817 power-domains = <&sysc 32>;
818 status = "disabled";
df863d6f
JM		 819 };
820
93b0e564
TK		 821 msiof0: spi@e6e90000 {
822 compatible = "renesas,msiof-r8a77965",
823 "renesas,rcar-gen3-msiof";
824 reg = <0 0xe6e90000 0 0x0064>;
825 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
826 clocks = <&cpg CPG_MOD 211>;
827 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
828 <&dmac2 0x41>, <&dmac2 0x40>;
829 dma-names = "tx", "rx", "tx", "rx";
830 power-domains = <&sysc 32>;
831 resets = <&cpg 211>;
832 #address-cells = <1>;
833 #size-cells = <0>;
834 status = "disabled";
835 };
836
837 msiof1: spi@e6ea0000 {
838 compatible = "renesas,msiof-r8a77965",
839 "renesas,rcar-gen3-msiof";
840 reg = <0 0xe6ea0000 0 0x0064>;
841 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
842 clocks = <&cpg CPG_MOD 210>;
843 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
844 <&dmac2 0x43>, <&dmac2 0x42>;
845 dma-names = "tx", "rx", "tx", "rx";
846 power-domains = <&sysc 32>;
847 resets = <&cpg 210>;
848 #address-cells = <1>;
849 #size-cells = <0>;
850 status = "disabled";
851 };
852
853 msiof2: spi@e6c00000 {
854 compatible = "renesas,msiof-r8a77965",
855 "renesas,rcar-gen3-msiof";
856 reg = <0 0xe6c00000 0 0x0064>;
857 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
858 clocks = <&cpg CPG_MOD 209>;
859 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
860 dma-names = "tx", "rx";
861 power-domains = <&sysc 32>;
862 resets = <&cpg 209>;
863 #address-cells = <1>;
864 #size-cells = <0>;
865 status = "disabled";
866 };
867
868 msiof3: spi@e6c10000 {
869 compatible = "renesas,msiof-r8a77965",
870 "renesas,rcar-gen3-msiof";
871 reg = <0 0xe6c10000 0 0x0064>;
872 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
873 clocks = <&cpg CPG_MOD 208>;
874 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
875 dma-names = "tx", "rx";
876 power-domains = <&sysc 32>;
877 resets = <&cpg 208>;
878 #address-cells = <1>;
879 #size-cells = <0>;
880 status = "disabled";
881 };
882
df863d6f 883 du: display@feb00000 {
9e1b00a2
JM		 884 reg = <0 0xfeb00000 0 0x80000>,
885 <0 0xfeb90000 0 0x14>;
df863d6f
JM		 886 /* placeholder */
887
888 ports {
ba8b5ad0
JM		 889 #address-cells = <1>;
890 #size-cells = <0>;
891
df863d6f
JM		 892 port@0 {
893 reg = <0>;
894 du_out_rgb: endpoint {
895 };
896 };
897 port@1 {
898 reg = <1>;
899 du_out_hdmi0: endpoint {
900 };
901 };
902 port@2 {
903 reg = <2>;
904 du_out_lvds0: endpoint {
905 };
906 };
907 };
908 };
909
dc682851
YS		 910 usb_dmac0: dma-controller@e65a0000 {
911 compatible = "renesas,r8a77965-usb-dmac",
912 "renesas,usb-dmac";
913 reg = <0 0xe65a0000 0 0x100>;
914 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
915 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
916 interrupt-names = "ch0", "ch1";
917 clocks = <&cpg CPG_MOD 330>;
918 power-domains = <&sysc 32>;
919 resets = <&cpg 330>;
920 #dma-cells = <1>;
921 dma-channels = <2>;
922 };
923
924 usb_dmac1: dma-controller@e65b0000 {
925 compatible = "renesas,r8a77965-usb-dmac",
926 "renesas,usb-dmac";
927 reg = <0 0xe65b0000 0 0x100>;
928 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
929 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
930 interrupt-names = "ch0", "ch1";
931 clocks = <&cpg CPG_MOD 331>;
932 power-domains = <&sysc 32>;
933 resets = <&cpg 331>;
934 #dma-cells = <1>;
935 dma-channels = <2>;
936 };
937
df863d6f 938 hsusb: usb@e6590000 {
a06e8af8
YS		 939 compatible = "renesas,usbhs-r8a7796",
940 "renesas,rcar-gen3-usbhs";
9e1b00a2 941 reg = <0 0xe6590000 0 0x100>;
a06e8af8
YS		 942 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
943 clocks = <&cpg CPG_MOD 704>;
944 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
945 <&usb_dmac1 0>, <&usb_dmac1 1>;
946 dma-names = "ch0", "ch1", "ch2", "ch3";
947 renesas,buswait = <11>;
948 phys = <&usb2_phy0>;
949 phy-names = "usb";
950 power-domains = <&sysc 32>;
951 resets = <&cpg 704>;
952 status = "disabled";
df863d6f
JM		 953 };
954
955 pciec0: pcie@fe000000 {
9e1b00a2 956 reg = <0 0xfe000000 0 0x80000>;
df863d6f
JM		 957 /* placeholder */
958 };
959
960 pciec1: pcie@ee800000 {
9e1b00a2 961 reg = <0 0xee800000 0 0x80000>;
df863d6f
JM		 962 /* placeholder */
963 };
964
965 rcar_sound: sound@ec500000 {
9e1b00a2
JM		 966 reg = <0 0xec500000 0 0x1000>, /* SCU */
967 <0 0xec5a0000 0 0x100>, /* ADG */
968 <0 0xec540000 0 0x1000>, /* SSIU */
969 <0 0xec541000 0 0x280>, /* SSI */
970 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
df863d6f
JM		 971 /* placeholder */
972
973 rcar_sound,dvc {
974 dvc0: dvc-0 {
975 };
976 dvc1: dvc-1 {
977 };
978 };
979
980 rcar_sound,src {
981 src0: src-0 {
982 };
983 src1: src-1 {
984 };
985 };
986
987 rcar_sound,ssi {
988 ssi0: ssi-0 {
989 };
990 ssi1: ssi-1 {
991 };
992 };
993 };
994
df863d6f 995 sdhi0: sd@ee100000 {
9e1b00a2 996 reg = <0 0xee100000 0 0x2000>;
df863d6f
JM		 997 /* placeholder */
998 };
999
1000 sdhi1: sd@ee120000 {
9e1b00a2 1001 reg = <0 0xee120000 0 0x2000>;
df863d6f
JM		 1002 /* placeholder */
1003 };
1004
1005 sdhi2: sd@ee140000 {
9e1b00a2 1006 reg = <0 0xee140000 0 0x2000>;
df863d6f
JM		 1007 /* placeholder */
1008 };
1009
1010 sdhi3: sd@ee160000 {
9e1b00a2 1011 reg = <0 0xee160000 0 0x2000>;
df863d6f
JM		 1012 /* placeholder */
1013 };
1014
1015 usb3_phy0: usb-phy@e65ee000 {
7a4a541e
YS		 1016 compatible = "renesas,r8a77965-usb3-phy",
1017 "renesas,rcar-gen3-usb3-phy";
9e1b00a2 1018 reg = <0 0xe65ee000 0 0x90>;
7a4a541e
YS		 1019 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
1020 <&usb_extal_clk>;
1021 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
1022 power-domains = <&sysc 32>;
1023 resets = <&cpg 328>;
8a93a581 1024 #phy-cells = <0>;
7a4a541e 1025 status = "disabled";
df863d6f
JM		 1026 };
1027
1028 usb3_peri0: usb@ee020000 {
3a7dc06d
YS		 1029 compatible = "renesas,r8a77965-usb3-peri",
1030 "renesas,rcar-gen3-usb3-peri";
9e1b00a2 1031 reg = <0 0xee020000 0 0x400>;
3a7dc06d
YS		 1032 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1033 clocks = <&cpg CPG_MOD 328>;
1034 power-domains = <&sysc 32>;
1035 resets = <&cpg 328>;
1036 status = "disabled";
df863d6f
JM		 1037 };
1038
1039 xhci0: usb@ee000000 {
e3cee890
YS		 1040 compatible = "renesas,xhci-r8a77965",
1041 "renesas,rcar-gen3-xhci";
9e1b00a2 1042 reg = <0 0xee000000 0 0xc00>;
e3cee890
YS		 1043 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1044 clocks = <&cpg CPG_MOD 328>;
1045 power-domains = <&sysc 32>;
1046 resets = <&cpg 328>;
1047 status = "disabled";
df863d6f
JM		 1048 };
1049
1050 wdt0: watchdog@e6020000 {
9e1b00a2 1051 reg = <0 0xe6020000 0 0x0c>;
df863d6f
JM		 1052 /* placeholder */
1053 };
1054 };
001f3b03
YK		 1055
1056 timer {
1057 compatible = "arm,armv8-timer";
1058 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1059 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1060 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1061 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1062 };
1063
1064 /* External USB clocks - can be overridden by the board */
1065 usb3s0_clk: usb3s0 {
1066 compatible = "fixed-clock";
1067 #clock-cells = <0>;
1068 clock-frequency = <0>;
1069 };
1070
1071 usb_extal_clk: usb_extal {
1072 compatible = "fixed-clock";
1073 #clock-cells = <0>;
1074 clock-frequency = <0>;
1075 };
df863d6f 1076};
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