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arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config
[mirror_ubuntu-focal-kernel.git] / arch / arm64 / boot / dts / renesas / r8a77965.dtsi
CommitLineData
df863d6f
JM		 1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a77965 SoC
4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 *
7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */
10
5daa6f9f 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
df863d6f 12#include <dt-bindings/interrupt-controller/arm-gic.h>
104243b2 13#include <dt-bindings/power/r8a77965-sysc.h>
df863d6f
JM		 14
15#define CPG_AUDIO_CLK_I 10
16
17/ {
18 compatible = "renesas,r8a77965";
19 #address-cells = <2>;
20 #size-cells = <2>;
21
89527922
GU		 22 aliases {
23 i2c7 = &i2c_dvfs;
24 };
25
001f3b03
YK		 26 /*
27 * The external audio clocks are configured as 0 Hz fixed frequency
28 * clocks by default.
29 * Boards that provide audio clocks should override them.
30 */
31 audio_clk_a: audio_clk_a {
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <0>;
35 };
36
37 audio_clk_b: audio_clk_b {
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <0>;
41 };
42
43 audio_clk_c: audio_clk_c {
44 compatible = "fixed-clock";
45 #clock-cells = <0>;
46 clock-frequency = <0>;
47 };
48
49 /* External CAN clock - to be overridden by boards that provide it */
50 can_clk: can {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
df863d6f
JM		 54 };
55
56 cpus {
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 a57_0: cpu@0 {
61 compatible = "arm,cortex-a57", "arm,armv8";
62 reg = <0x0>;
63 device_type = "cpu";
7e26520f 64 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
df863d6f
JM		 65 next-level-cache = <&L2_CA57>;
66 enable-method = "psci";
67 };
68
69 a57_1: cpu@1 {
80f7297c 70 compatible = "arm,cortex-a57", "arm,armv8";
df863d6f
JM		 71 reg = <0x1>;
72 device_type = "cpu";
7e26520f 73 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
df863d6f
JM		 74 next-level-cache = <&L2_CA57>;
75 enable-method = "psci";
76 };
77
78 L2_CA57: cache-controller-0 {
79 compatible = "cache";
7e26520f 80 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
df863d6f
JM		 81 cache-unified;
82 cache-level = <2>;
83 };
84 };
85
86 extal_clk: extal {
87 compatible = "fixed-clock";
88 #clock-cells = <0>;
89 /* This value must be overridden by the board */
90 clock-frequency = <0>;
91 };
92
93 extalr_clk: extalr {
94 compatible = "fixed-clock";
95 #clock-cells = <0>;
96 /* This value must be overridden by the board */
97 clock-frequency = <0>;
98 };
99
001f3b03
YK		 100 /* External PCIe clock - can be overridden by the board */
101 pcie_bus_clk: pcie_bus {
df863d6f
JM		 102 compatible = "fixed-clock";
103 #clock-cells = <0>;
104 clock-frequency = <0>;
105 };
106
001f3b03
YK		 107 pmu_a57 {
108 compatible = "arm,cortex-a57-pmu";
109 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
110 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
111 interrupt-affinity = <&a57_0>,
112 <&a57_1>;
df863d6f
JM		 113 };
114
001f3b03
YK		 115 psci {
116 compatible = "arm,psci-1.0", "arm,psci-0.2";
117 method = "smc";
df863d6f
JM		 118 };
119
120 /* External SCIF clock - to be overridden by boards that provide it */
121 scif_clk: scif {
122 compatible = "fixed-clock";
123 #clock-cells = <0>;
124 clock-frequency = <0>;
125 };
126
df863d6f
JM		 127 soc {
128 compatible = "simple-bus";
129 interrupt-parent = <&gic>;
130 #address-cells = <2>;
131 #size-cells = <2>;
132 ranges;
133
2af6f5a3
YK		 134 wdt0: watchdog@e6020000 {
135 reg = <0 0xe6020000 0 0x0c>;
136 /* placeholder */
df863d6f
JM		 137 };
138
139 gpio0: gpio@e6050000 {
e34ca96b
JM		 140 compatible = "renesas,gpio-r8a77965",
141 "renesas,rcar-gen3-gpio";
142 reg = <0 0xe6050000 0 0x50>;
143 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
144 #gpio-cells = <2>;
145 gpio-controller;
146 gpio-ranges = <&pfc 0 0 16>;
147 #interrupt-cells = <2>;
148 interrupt-controller;
149 clocks = <&cpg CPG_MOD 912>;
7e26520f 150 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 151 resets = <&cpg 912>;
df863d6f
JM		 152 };
153
154 gpio1: gpio@e6051000 {
e34ca96b
JM		 155 compatible = "renesas,gpio-r8a77965",
156 "renesas,rcar-gen3-gpio";
157 reg = <0 0xe6051000 0 0x50>;
158 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
159 #gpio-cells = <2>;
160 gpio-controller;
161 gpio-ranges = <&pfc 0 32 29>;
162 #interrupt-cells = <2>;
163 interrupt-controller;
164 clocks = <&cpg CPG_MOD 911>;
7e26520f 165 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 166 resets = <&cpg 911>;
df863d6f
JM		 167 };
168
169 gpio2: gpio@e6052000 {
e34ca96b
JM		 170 compatible = "renesas,gpio-r8a77965",
171 "renesas,rcar-gen3-gpio";
172 reg = <0 0xe6052000 0 0x50>;
173 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
174 #gpio-cells = <2>;
175 gpio-controller;
176 gpio-ranges = <&pfc 0 64 15>;
177 #interrupt-cells = <2>;
178 interrupt-controller;
179 clocks = <&cpg CPG_MOD 910>;
7e26520f 180 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 181 resets = <&cpg 910>;
df863d6f
JM		 182 };
183
184 gpio3: gpio@e6053000 {
e34ca96b
JM		 185 compatible = "renesas,gpio-r8a77965",
186 "renesas,rcar-gen3-gpio";
187 reg = <0 0xe6053000 0 0x50>;
188 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
189 #gpio-cells = <2>;
190 gpio-controller;
191 gpio-ranges = <&pfc 0 96 16>;
192 #interrupt-cells = <2>;
193 interrupt-controller;
194 clocks = <&cpg CPG_MOD 909>;
7e26520f 195 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 196 resets = <&cpg 909>;
df863d6f
JM		 197 };
198
199 gpio4: gpio@e6054000 {
e34ca96b
JM		 200 compatible = "renesas,gpio-r8a77965",
201 "renesas,rcar-gen3-gpio";
202 reg = <0 0xe6054000 0 0x50>;
203 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
204 #gpio-cells = <2>;
205 gpio-controller;
206 gpio-ranges = <&pfc 0 128 18>;
207 #interrupt-cells = <2>;
208 interrupt-controller;
209 clocks = <&cpg CPG_MOD 908>;
7e26520f 210 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 211 resets = <&cpg 908>;
df863d6f
JM		 212 };
213
214 gpio5: gpio@e6055000 {
e34ca96b
JM		 215 compatible = "renesas,gpio-r8a77965",
216 "renesas,rcar-gen3-gpio";
217 reg = <0 0xe6055000 0 0x50>;
218 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
219 #gpio-cells = <2>;
220 gpio-controller;
221 gpio-ranges = <&pfc 0 160 26>;
222 #interrupt-cells = <2>;
223 interrupt-controller;
224 clocks = <&cpg CPG_MOD 907>;
7e26520f 225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 226 resets = <&cpg 907>;
df863d6f
JM		 227 };
228
229 gpio6: gpio@e6055400 {
e34ca96b
JM		 230 compatible = "renesas,gpio-r8a77965",
231 "renesas,rcar-gen3-gpio";
232 reg = <0 0xe6055400 0 0x50>;
233 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
234 #gpio-cells = <2>;
235 gpio-controller;
236 gpio-ranges = <&pfc 0 192 32>;
237 #interrupt-cells = <2>;
238 interrupt-controller;
239 clocks = <&cpg CPG_MOD 906>;
7e26520f 240 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 241 resets = <&cpg 906>;
df863d6f
JM		 242 };
243
244 gpio7: gpio@e6055800 {
e34ca96b
JM		 245 compatible = "renesas,gpio-r8a77965",
246 "renesas,rcar-gen3-gpio";
247 reg = <0 0xe6055800 0 0x50>;
248 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
249 #gpio-cells = <2>;
250 gpio-controller;
251 gpio-ranges = <&pfc 0 224 4>;
252 #interrupt-cells = <2>;
253 interrupt-controller;
254 clocks = <&cpg CPG_MOD 905>;
7e26520f 255 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 256 resets = <&cpg 905>;
df863d6f
JM		 257 };
258
2af6f5a3
YK		 259 pfc: pin-controller@e6060000 {
260 compatible = "renesas,pfc-r8a77965";
261 reg = <0 0xe6060000 0 0x50c>;
262 };
263
264 cpg: clock-controller@e6150000 {
265 compatible = "renesas,r8a77965-cpg-mssr";
266 reg = <0 0xe6150000 0 0x1000>;
267 clocks = <&extal_clk>, <&extalr_clk>;
268 clock-names = "extal", "extalr";
269 #clock-cells = <2>;
270 #power-domain-cells = <0>;
271 #reset-cells = <1>;
272 };
273
274 rst: reset-controller@e6160000 {
275 compatible = "renesas,r8a77965-rst";
276 reg = <0 0xe6160000 0 0x0200>;
277 };
278
279 sysc: system-controller@e6180000 {
280 compatible = "renesas,r8a77965-sysc";
281 reg = <0 0xe6180000 0 0x0400>;
282 #power-domain-cells = <1>;
283 };
284
4c529600
NS		 285 tsc: thermal@e6198000 {
286 compatible = "renesas,r8a77965-thermal";
287 reg = <0 0xe6198000 0 0x100>,
288 <0 0xe61a0000 0 0x100>,
289 <0 0xe61a8000 0 0x100>;
290 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
291 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
292 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
293 clocks = <&cpg CPG_MOD 522>;
294 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
295 resets = <&cpg 522>;
296 #thermal-sensor-cells = <1>;
297 status = "okay";
298 };
299
df863d6f 300 intc_ex: interrupt-controller@e61c0000 {
ba03b432 301 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
f5af7701
JM		 302 #interrupt-cells = <2>;
303 interrupt-controller;
9e1b00a2 304 reg = <0 0xe61c0000 0 0x200>;
ba03b432
GU		 305 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
306 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
307 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
308 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
309 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
310 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
311 clocks = <&cpg CPG_MOD 407>;
7e26520f 312 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
ba03b432 313 resets = <&cpg 407>;
df863d6f
JM		 314 };
315
2af6f5a3
YK		 316 i2c0: i2c@e6500000 {
317 reg = <0 0xe6500000 0 0x40>;
318 /* placeholder */
319 };
320
321 i2c1: i2c@e6508000 {
322 reg = <0 0xe6508000 0 0x40>;
323 /* placeholder */
324 };
325
326 i2c2: i2c@e6510000 {
327 #address-cells = <1>;
328 #size-cells = <0>;
329
330 reg = <0 0xe6510000 0 0x40>;
331 /* placeholder */
332 };
333
334 i2c3: i2c@e66d0000 {
335 reg = <0 0xe66d0000 0 0x40>;
336 /* placeholder */
337 };
338
339 i2c4: i2c@e66d8000 {
340 #address-cells = <1>;
341 #size-cells = <0>;
342
343 reg = <0 0xe66d8000 0 0x40>;
344 /* placeholder */
345 };
346
347 i2c5: i2c@e66e0000 {
348 reg = <0 0xe66e0000 0 0x40>;
349 /* placeholder */
350 };
351
352 i2c6: i2c@e66e8000 {
353 reg = <0 0xe66e8000 0 0x40>;
354 /* placeholder */
355 };
356
357 i2c_dvfs: i2c@e60b0000 {
358 #address-cells = <1>;
359 #size-cells = <0>;
360 compatible = "renesas,iic-r8a77965",
361 "renesas,rcar-gen3-iic",
362 "renesas,rmobile-iic";
363 reg = <0 0xe60b0000 0 0x425>;
364 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
365 clocks = <&cpg CPG_MOD 926>;
7e26520f 366 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 367 resets = <&cpg 926>;
368 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
369 dma-names = "tx", "rx";
370 status = "disabled";
371 };
372
373 hsusb: usb@e6590000 {
374 compatible = "renesas,usbhs-r8a7796",
375 "renesas,rcar-gen3-usbhs";
376 reg = <0 0xe6590000 0 0x100>;
377 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
378 clocks = <&cpg CPG_MOD 704>;
379 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
380 <&usb_dmac1 0>, <&usb_dmac1 1>;
381 dma-names = "ch0", "ch1", "ch2", "ch3";
382 renesas,buswait = <11>;
383 phys = <&usb2_phy0>;
384 phy-names = "usb";
7e26520f 385 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 386 resets = <&cpg 704>;
387 status = "disabled";
388 };
389
390 usb_dmac0: dma-controller@e65a0000 {
391 compatible = "renesas,r8a77965-usb-dmac",
392 "renesas,usb-dmac";
393 reg = <0 0xe65a0000 0 0x100>;
394 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
395 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
396 interrupt-names = "ch0", "ch1";
397 clocks = <&cpg CPG_MOD 330>;
7e26520f 398 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 399 resets = <&cpg 330>;
400 #dma-cells = <1>;
401 dma-channels = <2>;
402 };
403
404 usb_dmac1: dma-controller@e65b0000 {
405 compatible = "renesas,r8a77965-usb-dmac",
406 "renesas,usb-dmac";
407 reg = <0 0xe65b0000 0 0x100>;
408 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
409 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
410 interrupt-names = "ch0", "ch1";
411 clocks = <&cpg CPG_MOD 331>;
7e26520f 412 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 413 resets = <&cpg 331>;
414 #dma-cells = <1>;
415 dma-channels = <2>;
416 };
417
418 usb3_phy0: usb-phy@e65ee000 {
419 compatible = "renesas,r8a77965-usb3-phy",
420 "renesas,rcar-gen3-usb3-phy";
421 reg = <0 0xe65ee000 0 0x90>;
422 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
423 <&usb_extal_clk>;
424 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
7e26520f 425 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 426 resets = <&cpg 328>;
427 #phy-cells = <0>;
428 status = "disabled";
429 };
430
df863d6f 431 dmac0: dma-controller@e6700000 {
838c1121
JM		 432 compatible = "renesas,dmac-r8a77965",
433 "renesas,rcar-dmac";
434 reg = <0 0xe6700000 0 0x10000>;
435 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
436 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
437 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
438 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
439 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
440 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
441 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
442 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
443 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
444 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
445 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
446 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
447 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
448 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
449 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
450 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
451 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
452 interrupt-names = "error",
453 "ch0", "ch1", "ch2", "ch3",
454 "ch4", "ch5", "ch6", "ch7",
455 "ch8", "ch9", "ch10", "ch11",
456 "ch12", "ch13", "ch14", "ch15";
457 clocks = <&cpg CPG_MOD 219>;
458 clock-names = "fck";
7e26520f 459 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
838c1121
JM		 460 resets = <&cpg 219>;
461 #dma-cells = <1>;
462 dma-channels = <16>;
df863d6f
JM		 463 };
464
465 dmac1: dma-controller@e7300000 {
838c1121
JM		 466 compatible = "renesas,dmac-r8a77965",
467 "renesas,rcar-dmac";
468 reg = <0 0xe7300000 0 0x10000>;
469 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
470 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
471 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
472 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
473 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
474 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
475 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
476 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
477 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
478 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
479 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
480 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
481 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
482 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
483 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
484 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
485 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
486 interrupt-names = "error",
487 "ch0", "ch1", "ch2", "ch3",
488 "ch4", "ch5", "ch6", "ch7",
489 "ch8", "ch9", "ch10", "ch11",
490 "ch12", "ch13", "ch14", "ch15";
491 clocks = <&cpg CPG_MOD 218>;
492 clock-names = "fck";
7e26520f 493 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
838c1121
JM		 494 resets = <&cpg 218>;
495 #dma-cells = <1>;
496 dma-channels = <16>;
df863d6f
JM		 497 };
498
499 dmac2: dma-controller@e7310000 {
838c1121
JM		 500 compatible = "renesas,dmac-r8a77965",
501 "renesas,rcar-dmac";
502 reg = <0 0xe7310000 0 0x10000>;
503 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
504 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
505 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
506 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
507 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
508 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
509 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
510 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
511 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
512 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
513 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
514 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
515 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
516 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
517 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
518 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
519 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
520 interrupt-names = "error",
521 "ch0", "ch1", "ch2", "ch3",
522 "ch4", "ch5", "ch6", "ch7",
523 "ch8", "ch9", "ch10", "ch11",
524 "ch12", "ch13", "ch14", "ch15";
525 clocks = <&cpg CPG_MOD 217>;
526 clock-names = "fck";
7e26520f 527 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
838c1121
JM		 528 resets = <&cpg 217>;
529 #dma-cells = <1>;
530 dma-channels = <16>;
df863d6f
JM		 531 };
532
2af6f5a3
YK		 533 avb: ethernet@e6800000 {
534 compatible = "renesas,etheravb-r8a77965",
535 "renesas,etheravb-rcar-gen3";
536 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
537 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
538 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
539 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
540 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
541 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
542 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
543 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
544 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
545 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
546 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
547 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
548 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
549 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
550 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
551 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
552 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
553 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
554 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
555 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
556 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
557 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
558 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
559 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
560 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
561 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
562 interrupt-names = "ch0", "ch1", "ch2", "ch3",
563 "ch4", "ch5", "ch6", "ch7",
564 "ch8", "ch9", "ch10", "ch11",
565 "ch12", "ch13", "ch14", "ch15",
566 "ch16", "ch17", "ch18", "ch19",
567 "ch20", "ch21", "ch22", "ch23",
568 "ch24";
569 clocks = <&cpg CPG_MOD 812>;
7e26520f 570 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 571 resets = <&cpg 812>;
572 phy-mode = "rgmii";
573 #address-cells = <1>;
574 #size-cells = <0>;
0ea5b2fd 575 status = "disabled";
df863d6f
JM		 576 };
577
2af6f5a3
YK		 578 pwm0: pwm@e6e30000 {
579 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
580 reg = <0 0xe6e30000 0 8>;
581 #pwm-cells = <2>;
582 clocks = <&cpg CPG_MOD 523>;
583 resets = <&cpg 523>;
7e26520f 584 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 585 status = "disabled";
586 };
587
588 pwm1: pwm@e6e31000 {
589 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
590 reg = <0 0xe6e31000 0 8>;
591 #pwm-cells = <2>;
592 clocks = <&cpg CPG_MOD 523>;
593 resets = <&cpg 523>;
7e26520f 594 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 595 status = "disabled";
596 };
597
598 pwm2: pwm@e6e32000 {
599 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
600 reg = <0 0xe6e32000 0 8>;
601 #pwm-cells = <2>;
602 clocks = <&cpg CPG_MOD 523>;
603 resets = <&cpg 523>;
7e26520f 604 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 605 status = "disabled";
606 };
607
608 pwm3: pwm@e6e33000 {
609 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
610 reg = <0 0xe6e33000 0 8>;
611 #pwm-cells = <2>;
612 clocks = <&cpg CPG_MOD 523>;
613 resets = <&cpg 523>;
7e26520f 614 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 615 status = "disabled";
616 };
617
618 pwm4: pwm@e6e34000 {
619 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
620 reg = <0 0xe6e34000 0 8>;
621 #pwm-cells = <2>;
622 clocks = <&cpg CPG_MOD 523>;
623 resets = <&cpg 523>;
7e26520f 624 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 625 status = "disabled";
626 };
627
628 pwm5: pwm@e6e35000 {
629 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
630 reg = <0 0xe6e35000 0 8>;
631 #pwm-cells = <2>;
632 clocks = <&cpg CPG_MOD 523>;
633 resets = <&cpg 523>;
7e26520f 634 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 635 status = "disabled";
636 };
637
638 pwm6: pwm@e6e36000 {
639 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
640 reg = <0 0xe6e36000 0 8>;
641 #pwm-cells = <2>;
642 clocks = <&cpg CPG_MOD 523>;
643 resets = <&cpg 523>;
7e26520f 644 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 645 status = "disabled";
646 };
647
648 scif0: serial@e6e60000 {
649 compatible = "renesas,scif-r8a77965",
650 "renesas,rcar-gen3-scif", "renesas,scif";
651 reg = <0 0xe6e60000 0 64>;
652 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
653 clocks = <&cpg CPG_MOD 207>,
654 <&cpg CPG_CORE 20>,
655 <&scif_clk>;
656 clock-names = "fck", "brg_int", "scif_clk";
657 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
658 <&dmac2 0x51>, <&dmac2 0x50>;
659 dma-names = "tx", "rx", "tx", "rx";
7e26520f 660 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 661 resets = <&cpg 207>;
662 status = "disabled";
663 };
664
665 scif1: serial@e6e68000 {
666 compatible = "renesas,scif-r8a77965",
667 "renesas,rcar-gen3-scif", "renesas,scif";
668 reg = <0 0xe6e68000 0 64>;
669 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
670 clocks = <&cpg CPG_MOD 206>,
671 <&cpg CPG_CORE 20>,
672 <&scif_clk>;
673 clock-names = "fck", "brg_int", "scif_clk";
674 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
675 <&dmac2 0x53>, <&dmac2 0x52>;
676 dma-names = "tx", "rx", "tx", "rx";
7e26520f 677 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 678 resets = <&cpg 206>;
679 status = "disabled";
df863d6f
JM		 680 };
681
682 scif2: serial@e6e88000 {
0ea5b2fd
JM		 683 compatible = "renesas,scif-r8a77965",
684 "renesas,rcar-gen3-scif", "renesas,scif";
685 reg = <0 0xe6e88000 0 64>;
686 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
687 clocks = <&cpg CPG_MOD 310>,
688 <&cpg CPG_CORE 20>,
689 <&scif_clk>;
690 clock-names = "fck", "brg_int", "scif_clk";
7e26520f 691 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 692 resets = <&cpg 310>;
693 status = "disabled";
df863d6f
JM		 694 };
695
696 scif3: serial@e6c50000 {
0ea5b2fd
JM		 697 compatible = "renesas,scif-r8a77965",
698 "renesas,rcar-gen3-scif", "renesas,scif";
699 reg = <0 0xe6c50000 0 64>;
700 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
701 clocks = <&cpg CPG_MOD 204>,
702 <&cpg CPG_CORE 20>,
703 <&scif_clk>;
704 clock-names = "fck", "brg_int", "scif_clk";
705 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
706 dma-names = "tx", "rx";
7e26520f 707 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 708 resets = <&cpg 204>;
709 status = "disabled";
df863d6f
JM		 710 };
711
712 scif4: serial@e6c40000 {
0ea5b2fd
JM		 713 compatible = "renesas,scif-r8a77965",
714 "renesas,rcar-gen3-scif", "renesas,scif";
715 reg = <0 0xe6c40000 0 64>;
716 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
717 clocks = <&cpg CPG_MOD 203>,
718 <&cpg CPG_CORE 20>,
719 <&scif_clk>;
720 clock-names = "fck", "brg_int", "scif_clk";
721 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
722 dma-names = "tx", "rx";
7e26520f 723 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 724 resets = <&cpg 203>;
725 status = "disabled";
df863d6f
JM		 726 };
727
728 scif5: serial@e6f30000 {
0ea5b2fd
JM		 729 compatible = "renesas,scif-r8a77965",
730 "renesas,rcar-gen3-scif", "renesas,scif";
731 reg = <0 0xe6f30000 0 64>;
732 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
733 clocks = <&cpg CPG_MOD 202>,
734 <&cpg CPG_CORE 20>,
735 <&scif_clk>;
736 clock-names = "fck", "brg_int", "scif_clk";
737 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
738 <&dmac2 0x5b>, <&dmac2 0x5a>;
739 dma-names = "tx", "rx", "tx", "rx";
7e26520f 740 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 741 resets = <&cpg 202>;
742 status = "disabled";
df863d6f
JM		 743 };
744
2af6f5a3
YK		 745 msiof0: spi@e6e90000 {
746 compatible = "renesas,msiof-r8a77965",
747 "renesas,rcar-gen3-msiof";
748 reg = <0 0xe6e90000 0 0x0064>;
749 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
750 clocks = <&cpg CPG_MOD 211>;
751 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
752 <&dmac2 0x41>, <&dmac2 0x40>;
753 dma-names = "tx", "rx", "tx", "rx";
7e26520f 754 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3 755 resets = <&cpg 211>;
ba8b5ad0
JM		 756 #address-cells = <1>;
757 #size-cells = <0>;
862a61d0 758 status = "disabled";
df863d6f
JM		 759 };
760
2af6f5a3
YK		 761 msiof1: spi@e6ea0000 {
762 compatible = "renesas,msiof-r8a77965",
763 "renesas,rcar-gen3-msiof";
764 reg = <0 0xe6ea0000 0 0x0064>;
765 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
766 clocks = <&cpg CPG_MOD 210>;
767 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
768 <&dmac2 0x43>, <&dmac2 0x42>;
769 dma-names = "tx", "rx", "tx", "rx";
7e26520f 770 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 771 resets = <&cpg 210>;
772 #address-cells = <1>;
773 #size-cells = <0>;
774 status = "disabled";
df863d6f
JM		 775 };
776
2af6f5a3
YK		 777 msiof2: spi@e6c00000 {
778 compatible = "renesas,msiof-r8a77965",
779 "renesas,rcar-gen3-msiof";
780 reg = <0 0xe6c00000 0 0x0064>;
781 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
782 clocks = <&cpg CPG_MOD 209>;
783 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
784 dma-names = "tx", "rx";
7e26520f 785 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 786 resets = <&cpg 209>;
787 #address-cells = <1>;
788 #size-cells = <0>;
789 status = "disabled";
790 };
ba8b5ad0 791
2af6f5a3
YK		 792 msiof3: spi@e6c10000 {
793 compatible = "renesas,msiof-r8a77965",
794 "renesas,rcar-gen3-msiof";
795 reg = <0 0xe6c10000 0 0x0064>;
796 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
797 clocks = <&cpg CPG_MOD 208>;
798 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
799 dma-names = "tx", "rx";
7e26520f 800 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 801 resets = <&cpg 208>;
802 #address-cells = <1>;
803 #size-cells = <0>;
804 status = "disabled";
df863d6f
JM		 805 };
806
807 vin0: video@e6ef0000 {
9e1b00a2 808 reg = <0 0xe6ef0000 0 0x1000>;
df863d6f
JM		 809 /* placeholder */
810 };
811
812 vin1: video@e6ef1000 {
9e1b00a2 813 reg = <0 0xe6ef1000 0 0x1000>;
df863d6f
JM		 814 /* placeholder */
815 };
816
817 vin2: video@e6ef2000 {
9e1b00a2 818 reg = <0 0xe6ef2000 0 0x1000>;
df863d6f
JM		 819 /* placeholder */
820 };
821
822 vin3: video@e6ef3000 {
9e1b00a2 823 reg = <0 0xe6ef3000 0 0x1000>;
df863d6f
JM		 824 /* placeholder */
825 };
826
827 vin4: video@e6ef4000 {
9e1b00a2 828 reg = <0 0xe6ef4000 0 0x1000>;
df863d6f
JM		 829 /* placeholder */
830 };
831
832 vin5: video@e6ef5000 {
9e1b00a2 833 reg = <0 0xe6ef5000 0 0x1000>;
df863d6f
JM		 834 /* placeholder */
835 };
836
837 vin6: video@e6ef6000 {
9e1b00a2 838 reg = <0 0xe6ef6000 0 0x1000>;
df863d6f
JM		 839 /* placeholder */
840 };
841
842 vin7: video@e6ef7000 {
9e1b00a2 843 reg = <0 0xe6ef7000 0 0x1000>;
df863d6f
JM		 844 /* placeholder */
845 };
846
2af6f5a3
YK		 847 rcar_sound: sound@ec500000 {
848 reg = <0 0xec500000 0 0x1000>, /* SCU */
849 <0 0xec5a0000 0 0x100>, /* ADG */
850 <0 0xec540000 0 0x1000>, /* SSIU */
851 <0 0xec541000 0 0x280>, /* SSI */
852 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
853 /* placeholder */
854
855 rcar_sound,dvc {
856 dvc0: dvc-0 {
857 };
858 dvc1: dvc-1 {
859 };
860 };
861
862 rcar_sound,src {
863 src0: src-0 {
864 };
865 src1: src-1 {
866 };
867 };
868
869 rcar_sound,ssi {
870 ssi0: ssi-0 {
871 };
872 ssi1: ssi-1 {
873 };
874 };
e94ac4c7
SH		 875
876 ports {
877 #address-cells = <1>;
878 #size-cells = <0>;
879 port@0 {
880 reg = <0>;
881 };
882 };
2af6f5a3
YK		 883 };
884
885 xhci0: usb@ee000000 {
886 compatible = "renesas,xhci-r8a77965",
887 "renesas,rcar-gen3-xhci";
888 reg = <0 0xee000000 0 0xc00>;
889 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
890 clocks = <&cpg CPG_MOD 328>;
7e26520f 891 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 892 resets = <&cpg 328>;
893 status = "disabled";
894 };
895
896 usb3_peri0: usb@ee020000 {
897 compatible = "renesas,r8a77965-usb3-peri",
898 "renesas,rcar-gen3-usb3-peri";
899 reg = <0 0xee020000 0 0x400>;
900 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
901 clocks = <&cpg CPG_MOD 328>;
7e26520f 902 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 903 resets = <&cpg 328>;
904 status = "disabled";
905 };
906
df863d6f 907 ohci0: usb@ee080000 {
1dfa66cd 908 compatible = "generic-ohci";
9e1b00a2 909 reg = <0 0xee080000 0 0x100>;
1dfa66cd
YS		 910 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
911 clocks = <&cpg CPG_MOD 703>;
912 phys = <&usb2_phy0>;
913 phy-names = "usb";
7e26520f 914 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1dfa66cd
YS		 915 resets = <&cpg 703>;
916 status = "disabled";
df863d6f
JM		 917 };
918
2af6f5a3
YK		 919 ohci1: usb@ee0a0000 {
920 compatible = "generic-ohci";
921 reg = <0 0xee0a0000 0 0x100>;
922 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
923 clocks = <&cpg CPG_MOD 702>;
924 phys = <&usb2_phy1>;
925 phy-names = "usb";
7e26520f 926 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 927 resets = <&cpg 702>;
928 status = "disabled";
929 };
930
df863d6f 931 ehci0: usb@ee080100 {
1dfa66cd 932 compatible = "generic-ehci";
9e1b00a2 933 reg = <0 0xee080100 0 0x100>;
1dfa66cd
YS		 934 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
935 clocks = <&cpg CPG_MOD 703>;
936 phys = <&usb2_phy0>;
937 phy-names = "usb";
938 companion = <&ohci0>;
7e26520f 939 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1dfa66cd
YS		 940 resets = <&cpg 703>;
941 status = "disabled";
df863d6f
JM		 942 };
943
2af6f5a3
YK		 944 ehci1: usb@ee0a0100 {
945 compatible = "generic-ehci";
946 reg = <0 0xee0a0100 0 0x100>;
947 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
948 clocks = <&cpg CPG_MOD 702>;
949 phys = <&usb2_phy1>;
950 phy-names = "usb";
951 companion = <&ohci1>;
7e26520f 952 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 953 resets = <&cpg 702>;
954 status = "disabled";
955 };
956
df863d6f 957 usb2_phy0: usb-phy@ee080200 {
b5857630
YS		 958 compatible = "renesas,usb2-phy-r8a77965",
959 "renesas,rcar-gen3-usb2-phy";
9e1b00a2 960 reg = <0 0xee080200 0 0x700>;
b5857630
YS		 961 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
962 clocks = <&cpg CPG_MOD 703>;
7e26520f 963 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
b5857630
YS		 964 resets = <&cpg 703>;
965 #phy-cells = <0>;
966 status = "disabled";
df863d6f
JM		 967 };
968
fe674605 969 usb2_phy1: usb-phy@ee0a0200 {
b5857630
YS		 970 compatible = "renesas,usb2-phy-r8a77965",
971 "renesas,rcar-gen3-usb2-phy";
fe674605 972 reg = <0 0xee0a0200 0 0x700>;
b5857630 973 clocks = <&cpg CPG_MOD 703>;
7e26520f 974 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
b5857630
YS		 975 resets = <&cpg 703>;
976 #phy-cells = <0>;
977 status = "disabled";
fe674605
JM		 978 };
979
2af6f5a3
YK		 980 sdhi0: sd@ee100000 {
981 reg = <0 0xee100000 0 0x2000>;
df863d6f
JM		 982 /* placeholder */
983 };
984
2af6f5a3
YK		 985 sdhi1: sd@ee120000 {
986 reg = <0 0xee120000 0 0x2000>;
df863d6f
JM		 987 /* placeholder */
988 };
989
2af6f5a3
YK		 990 sdhi2: sd@ee140000 {
991 reg = <0 0xee140000 0 0x2000>;
df863d6f
JM		 992 /* placeholder */
993 };
994
2af6f5a3
YK		 995 sdhi3: sd@ee160000 {
996 reg = <0 0xee160000 0 0x2000>;
df863d6f
JM		 997 /* placeholder */
998 };
999
2af6f5a3
YK		 1000 gic: interrupt-controller@f1010000 {
1001 compatible = "arm,gic-400";
1002 #interrupt-cells = <3>;
1003 #address-cells = <0>;
1004 interrupt-controller;
1005 reg = <0x0 0xf1010000 0 0x1000>,
1006 <0x0 0xf1020000 0 0x20000>,
1007 <0x0 0xf1040000 0 0x20000>,
1008 <0x0 0xf1060000 0 0x20000>;
1009 interrupts = <GIC_PPI 9
1010 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1011 clocks = <&cpg CPG_MOD 408>;
1012 clock-names = "clk";
7e26520f 1013 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3 1014 resets = <&cpg 408>;
df863d6f
JM		 1015 };
1016
2af6f5a3
YK		 1017 pciec0: pcie@fe000000 {
1018 reg = <0 0xfe000000 0 0x80000>;
df863d6f
JM		 1019 /* placeholder */
1020 };
1021
2af6f5a3
YK		 1022 pciec1: pcie@ee800000 {
1023 reg = <0 0xee800000 0 0x80000>;
df863d6f
JM		 1024 /* placeholder */
1025 };
1026
104243b2
KB		 1027 fcpf0: fcp@fe950000 {
1028 compatible = "renesas,fcpf";
1029 reg = <0 0xfe950000 0 0x200>;
1030 clocks = <&cpg CPG_MOD 615>;
1031 power-domains = <&sysc R8A77965_PD_A3VP>;
1032 resets = <&cpg 615>;
1033 };
1034
85cb3229
KB		 1035 vspb: vsp@fe960000 {
1036 compatible = "renesas,vsp2";
1037 reg = <0 0xfe960000 0 0x8000>;
1038 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1039 clocks = <&cpg CPG_MOD 626>;
1040 power-domains = <&sysc R8A77965_PD_A3VP>;
1041 resets = <&cpg 626>;
1042
1043 renesas,fcp = <&fcpvb0>;
1044 };
1045
104243b2
KB		 1046 fcpvb0: fcp@fe96f000 {
1047 compatible = "renesas,fcpv";
1048 reg = <0 0xfe96f000 0 0x200>;
1049 clocks = <&cpg CPG_MOD 607>;
1050 power-domains = <&sysc R8A77965_PD_A3VP>;
1051 resets = <&cpg 607>;
1052 };
1053
85cb3229
KB		 1054 vspi0: vsp@fe9a0000 {
1055 compatible = "renesas,vsp2";
1056 reg = <0 0xfe9a0000 0 0x8000>;
1057 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1058 clocks = <&cpg CPG_MOD 631>;
1059 power-domains = <&sysc R8A77965_PD_A3VP>;
1060 resets = <&cpg 631>;
1061
1062 renesas,fcp = <&fcpvi0>;
1063 };
1064
104243b2
KB		 1065 fcpvi0: fcp@fe9af000 {
1066 compatible = "renesas,fcpv";
1067 reg = <0 0xfe9af000 0 0x200>;
1068 clocks = <&cpg CPG_MOD 611>;
1069 power-domains = <&sysc R8A77965_PD_A3VP>;
1070 resets = <&cpg 611>;
1071 };
1072
85cb3229
KB		 1073 vspd0: vsp@fea20000 {
1074 compatible = "renesas,vsp2";
1075 reg = <0 0xfea20000 0 0x8000>;
1076 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1077 clocks = <&cpg CPG_MOD 623>;
1078 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1079 resets = <&cpg 623>;
1080
1081 renesas,fcp = <&fcpvd0>;
1082 };
1083
104243b2
KB		 1084 fcpvd0: fcp@fea27000 {
1085 compatible = "renesas,fcpv";
1086 reg = <0 0xfea27000 0 0x200>;
1087 clocks = <&cpg CPG_MOD 603>;
1088 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1089 resets = <&cpg 603>;
1090 };
1091
85cb3229
KB		 1092 vspd1: vsp@fea28000 {
1093 compatible = "renesas,vsp2";
1094 reg = <0 0xfea28000 0 0x8000>;
1095 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1096 clocks = <&cpg CPG_MOD 622>;
1097 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1098 resets = <&cpg 622>;
1099
1100 renesas,fcp = <&fcpvd1>;
1101 };
1102
104243b2
KB		 1103 fcpvd1: fcp@fea2f000 {
1104 compatible = "renesas,fcpv";
1105 reg = <0 0xfea2f000 0 0x200>;
1106 clocks = <&cpg CPG_MOD 602>;
1107 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1108 resets = <&cpg 602>;
1109 };
1110
2af6f5a3
YK		 1111 csi20: csi2@fea80000 {
1112 reg = <0 0xfea80000 0 0x10000>;
1113 /* placeholder */
93b0e564 1114
2af6f5a3
YK		 1115 ports {
1116 #address-cells = <1>;
1117 #size-cells = <0>;
1118 };
93b0e564
TK		 1119 };
1120
2af6f5a3
YK		 1121 csi40: csi2@feaa0000 {
1122 reg = <0 0xfeaa0000 0 0x10000>;
1123 /* placeholder */
93b0e564 1124
2af6f5a3
YK		 1125 ports {
1126 #address-cells = <1>;
1127 #size-cells = <0>;
1128 };
93b0e564
TK		 1129 };
1130
5daa6f9f
KB		 1131 hdmi0: hdmi@fead0000 {
1132 compatible = "renesas,r8a77965-hdmi",
1133 "renesas,rcar-gen3-hdmi";
1134 reg = <0 0xfead0000 0 0x10000>;
1135 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
1136 clocks = <&cpg CPG_MOD 729>,
1137 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
1138 clock-names = "iahb", "isfr";
1139 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1140 resets = <&cpg 729>;
1141 status = "disabled";
1142
1143 ports {
1144 #address-cells = <1>;
1145 #size-cells = <0>;
1146 port@0 {
1147 reg = <0>;
1148 dw_hdmi0_in: endpoint {
1149 remote-endpoint = <&du_out_hdmi0>;
1150 };
1151 };
1152 port@1 {
1153 reg = <1>;
1154 };
1155 };
1156 };
1157
df863d6f 1158 du: display@feb00000 {
2f2c71bf
KB		 1159 compatible = "renesas,du-r8a77965";
1160 reg = <0 0xfeb00000 0 0x80000>;
1161 reg-names = "du";
1162 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1163 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1164 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1165 clocks = <&cpg CPG_MOD 724>,
1166 <&cpg CPG_MOD 723>,
1167 <&cpg CPG_MOD 721>;
1168 clock-names = "du.0", "du.1", "du.3";
1169 status = "disabled";
1170
1171 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>;
df863d6f
JM		 1172
1173 ports {
ba8b5ad0
JM		 1174 #address-cells = <1>;
1175 #size-cells = <0>;
1176
df863d6f
JM		 1177 port@0 {
1178 reg = <0>;
1179 du_out_rgb: endpoint {
1180 };
1181 };
1182 port@1 {
1183 reg = <1>;
1184 du_out_hdmi0: endpoint {
5daa6f9f 1185 remote-endpoint = <&dw_hdmi0_in>;
df863d6f
JM		 1186 };
1187 };
1188 port@2 {
1189 reg = <2>;
1190 du_out_lvds0: endpoint {
1191 };
1192 };
1193 };
1194 };
1195
2af6f5a3
YK		 1196 prr: chipid@fff00044 {
1197 compatible = "renesas,prr";
1198 reg = <0 0xfff00044 0 4>;
df863d6f
JM		 1199 };
1200 };
001f3b03
YK		 1201
1202 timer {
1203 compatible = "arm,armv8-timer";
1204 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1205 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1206 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1207 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1208 };
1209
4c529600
NS		 1210 thermal-zones {
1211 sensor_thermal1: sensor-thermal1 {
1212 polling-delay-passive = <250>;
1213 polling-delay = <1000>;
1214 thermal-sensors = <&tsc 0>;
1215
1216 trips {
1217 sensor1_crit: sensor1-crit {
1218 temperature = <120000>;
1219 hysteresis = <1000>;
1220 type = "critical";
1221 };
1222 };
1223 };
1224
1225 sensor_thermal2: sensor-thermal2 {
1226 polling-delay-passive = <250>;
1227 polling-delay = <1000>;
1228 thermal-sensors = <&tsc 1>;
1229
1230 trips {
1231 sensor2_crit: sensor2-crit {
1232 temperature = <120000>;
1233 hysteresis = <1000>;
1234 type = "critical";
1235 };
1236 };
1237 };
1238
1239 sensor_thermal3: sensor-thermal3 {
1240 polling-delay-passive = <250>;
1241 polling-delay = <1000>;
1242 thermal-sensors = <&tsc 2>;
1243
1244 trips {
1245 sensor3_crit: sensor3-crit {
1246 temperature = <120000>;
1247 hysteresis = <1000>;
1248 type = "critical";
1249 };
1250 };
1251 };
1252 };
1253
001f3b03
YK		 1254 /* External USB clocks - can be overridden by the board */
1255 usb3s0_clk: usb3s0 {
1256 compatible = "fixed-clock";
1257 #clock-cells = <0>;
1258 clock-frequency = <0>;
1259 };
1260
1261 usb_extal_clk: usb_extal {
1262 compatible = "fixed-clock";
1263 #clock-cells = <0>;
1264 clock-frequency = <0>;
1265 };
df863d6f 1266};
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