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Merge tag 'socfpga_updates_for_v4.20_part3' of git://git.kernel.org/pub/scm/linux...
[mirror_ubuntu-focal-kernel.git] / arch / arm64 / boot / dts / renesas / r8a77965.dtsi
CommitLineData
df863d6f
JM		 1// SPDX-License-Identifier: GPL-2.0
2/*
e18a31a7 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
df863d6f
JM		 4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 *
7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */
10
5daa6f9f 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
df863d6f 12#include <dt-bindings/interrupt-controller/arm-gic.h>
104243b2 13#include <dt-bindings/power/r8a77965-sysc.h>
df863d6f 14
158928f3 15#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
df863d6f
JM		 16
17/ {
18 compatible = "renesas,r8a77965";
19 #address-cells = <2>;
20 #size-cells = <2>;
21
89527922 22 aliases {
111d3ffe
NS		 23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 i2c5 = &i2c5;
29 i2c6 = &i2c6;
89527922
GU		 30 i2c7 = &i2c_dvfs;
31 };
32
001f3b03
YK		 33 /*
34 * The external audio clocks are configured as 0 Hz fixed frequency
35 * clocks by default.
36 * Boards that provide audio clocks should override them.
37 */
38 audio_clk_a: audio_clk_a {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
42 };
43
44 audio_clk_b: audio_clk_b {
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <0>;
48 };
49
50 audio_clk_c: audio_clk_c {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
55
56 /* External CAN clock - to be overridden by boards that provide it */
57 can_clk: can {
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <0>;
df863d6f
JM		 61 };
62
62531104
DP		 63 cluster0_opp: opp_table0 {
64 compatible = "operating-points-v2";
65 opp-shared;
66
67 opp-500000000 {
68 opp-hz = /bits/ 64 <500000000>;
69 opp-microvolt = <830000>;
70 clock-latency-ns = <300000>;
71 };
72 opp-1000000000 {
73 opp-hz = /bits/ 64 <1000000000>;
74 opp-microvolt = <830000>;
75 clock-latency-ns = <300000>;
76 };
77 opp-1500000000 {
78 opp-hz = /bits/ 64 <1500000000>;
79 opp-microvolt = <830000>;
80 clock-latency-ns = <300000>;
81 opp-suspend;
82 };
83 opp-1600000000 {
84 opp-hz = /bits/ 64 <1600000000>;
85 opp-microvolt = <900000>;
86 clock-latency-ns = <300000>;
87 turbo-mode;
88 };
89 opp-1700000000 {
90 opp-hz = /bits/ 64 <1700000000>;
91 opp-microvolt = <900000>;
92 clock-latency-ns = <300000>;
93 turbo-mode;
94 };
95 opp-1800000000 {
96 opp-hz = /bits/ 64 <1800000000>;
97 opp-microvolt = <960000>;
98 clock-latency-ns = <300000>;
99 turbo-mode;
100 };
101 };
102
df863d6f
JM		 103 cpus {
104 #address-cells = <1>;
105 #size-cells = <0>;
106
107 a57_0: cpu@0 {
108 compatible = "arm,cortex-a57", "arm,armv8";
109 reg = <0x0>;
110 device_type = "cpu";
7e26520f 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
df863d6f
JM		 112 next-level-cache = <&L2_CA57>;
113 enable-method = "psci";
fced3a97 114 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
62531104 115 operating-points-v2 = <&cluster0_opp>;
df863d6f
JM		 116 };
117
118 a57_1: cpu@1 {
80f7297c 119 compatible = "arm,cortex-a57", "arm,armv8";
df863d6f
JM		 120 reg = <0x1>;
121 device_type = "cpu";
7e26520f 122 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
df863d6f
JM		 123 next-level-cache = <&L2_CA57>;
124 enable-method = "psci";
fced3a97 125 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
62531104 126 operating-points-v2 = <&cluster0_opp>;
df863d6f
JM		 127 };
128
129 L2_CA57: cache-controller-0 {
130 compatible = "cache";
7e26520f 131 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
df863d6f
JM		 132 cache-unified;
133 cache-level = <2>;
134 };
135 };
136
137 extal_clk: extal {
138 compatible = "fixed-clock";
139 #clock-cells = <0>;
140 /* This value must be overridden by the board */
141 clock-frequency = <0>;
142 };
143
144 extalr_clk: extalr {
145 compatible = "fixed-clock";
146 #clock-cells = <0>;
147 /* This value must be overridden by the board */
148 clock-frequency = <0>;
149 };
150
001f3b03
YK		 151 /* External PCIe clock - can be overridden by the board */
152 pcie_bus_clk: pcie_bus {
df863d6f
JM		 153 compatible = "fixed-clock";
154 #clock-cells = <0>;
155 clock-frequency = <0>;
156 };
157
001f3b03
YK		 158 pmu_a57 {
159 compatible = "arm,cortex-a57-pmu";
160 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
161 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
162 interrupt-affinity = <&a57_0>,
163 <&a57_1>;
df863d6f
JM		 164 };
165
001f3b03
YK		 166 psci {
167 compatible = "arm,psci-1.0", "arm,psci-0.2";
168 method = "smc";
df863d6f
JM		 169 };
170
171 /* External SCIF clock - to be overridden by boards that provide it */
172 scif_clk: scif {
173 compatible = "fixed-clock";
174 #clock-cells = <0>;
175 clock-frequency = <0>;
176 };
177
df863d6f
JM		 178 soc {
179 compatible = "simple-bus";
180 interrupt-parent = <&gic>;
181 #address-cells = <2>;
182 #size-cells = <2>;
183 ranges;
184
0b65a9ad 185 rwdt: watchdog@e6020000 {
0b3d87d1
TK		 186 compatible = "renesas,r8a77965-wdt",
187 "renesas,rcar-gen3-wdt";
2af6f5a3 188 reg = <0 0xe6020000 0 0x0c>;
0b3d87d1
TK		 189 clocks = <&cpg CPG_MOD 402>;
190 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
191 resets = <&cpg 402>;
192 status = "disabled";
df863d6f
JM		 193 };
194
195 gpio0: gpio@e6050000 {
e34ca96b
JM		 196 compatible = "renesas,gpio-r8a77965",
197 "renesas,rcar-gen3-gpio";
198 reg = <0 0xe6050000 0 0x50>;
199 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
200 #gpio-cells = <2>;
201 gpio-controller;
202 gpio-ranges = <&pfc 0 0 16>;
203 #interrupt-cells = <2>;
204 interrupt-controller;
205 clocks = <&cpg CPG_MOD 912>;
7e26520f 206 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 207 resets = <&cpg 912>;
df863d6f
JM		 208 };
209
210 gpio1: gpio@e6051000 {
e34ca96b
JM		 211 compatible = "renesas,gpio-r8a77965",
212 "renesas,rcar-gen3-gpio";
213 reg = <0 0xe6051000 0 0x50>;
214 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
215 #gpio-cells = <2>;
216 gpio-controller;
217 gpio-ranges = <&pfc 0 32 29>;
218 #interrupt-cells = <2>;
219 interrupt-controller;
220 clocks = <&cpg CPG_MOD 911>;
7e26520f 221 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 222 resets = <&cpg 911>;
df863d6f
JM		 223 };
224
225 gpio2: gpio@e6052000 {
e34ca96b
JM		 226 compatible = "renesas,gpio-r8a77965",
227 "renesas,rcar-gen3-gpio";
228 reg = <0 0xe6052000 0 0x50>;
229 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
230 #gpio-cells = <2>;
231 gpio-controller;
232 gpio-ranges = <&pfc 0 64 15>;
233 #interrupt-cells = <2>;
234 interrupt-controller;
235 clocks = <&cpg CPG_MOD 910>;
7e26520f 236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 237 resets = <&cpg 910>;
df863d6f
JM		 238 };
239
240 gpio3: gpio@e6053000 {
e34ca96b
JM		 241 compatible = "renesas,gpio-r8a77965",
242 "renesas,rcar-gen3-gpio";
243 reg = <0 0xe6053000 0 0x50>;
244 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
245 #gpio-cells = <2>;
246 gpio-controller;
247 gpio-ranges = <&pfc 0 96 16>;
248 #interrupt-cells = <2>;
249 interrupt-controller;
250 clocks = <&cpg CPG_MOD 909>;
7e26520f 251 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 252 resets = <&cpg 909>;
df863d6f
JM		 253 };
254
255 gpio4: gpio@e6054000 {
e34ca96b
JM		 256 compatible = "renesas,gpio-r8a77965",
257 "renesas,rcar-gen3-gpio";
258 reg = <0 0xe6054000 0 0x50>;
259 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
260 #gpio-cells = <2>;
261 gpio-controller;
262 gpio-ranges = <&pfc 0 128 18>;
263 #interrupt-cells = <2>;
264 interrupt-controller;
265 clocks = <&cpg CPG_MOD 908>;
7e26520f 266 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 267 resets = <&cpg 908>;
df863d6f
JM		 268 };
269
270 gpio5: gpio@e6055000 {
e34ca96b
JM		 271 compatible = "renesas,gpio-r8a77965",
272 "renesas,rcar-gen3-gpio";
273 reg = <0 0xe6055000 0 0x50>;
274 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
275 #gpio-cells = <2>;
276 gpio-controller;
277 gpio-ranges = <&pfc 0 160 26>;
278 #interrupt-cells = <2>;
279 interrupt-controller;
280 clocks = <&cpg CPG_MOD 907>;
7e26520f 281 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 282 resets = <&cpg 907>;
df863d6f
JM		 283 };
284
285 gpio6: gpio@e6055400 {
e34ca96b
JM		 286 compatible = "renesas,gpio-r8a77965",
287 "renesas,rcar-gen3-gpio";
288 reg = <0 0xe6055400 0 0x50>;
289 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
290 #gpio-cells = <2>;
291 gpio-controller;
292 gpio-ranges = <&pfc 0 192 32>;
293 #interrupt-cells = <2>;
294 interrupt-controller;
295 clocks = <&cpg CPG_MOD 906>;
7e26520f 296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 297 resets = <&cpg 906>;
df863d6f
JM		 298 };
299
300 gpio7: gpio@e6055800 {
e34ca96b
JM		 301 compatible = "renesas,gpio-r8a77965",
302 "renesas,rcar-gen3-gpio";
303 reg = <0 0xe6055800 0 0x50>;
304 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
305 #gpio-cells = <2>;
306 gpio-controller;
307 gpio-ranges = <&pfc 0 224 4>;
308 #interrupt-cells = <2>;
309 interrupt-controller;
310 clocks = <&cpg CPG_MOD 905>;
7e26520f 311 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
e34ca96b 312 resets = <&cpg 905>;
df863d6f
JM		 313 };
314
2af6f5a3
YK		 315 pfc: pin-controller@e6060000 {
316 compatible = "renesas,pfc-r8a77965";
317 reg = <0 0xe6060000 0 0x50c>;
318 };
319
320 cpg: clock-controller@e6150000 {
321 compatible = "renesas,r8a77965-cpg-mssr";
322 reg = <0 0xe6150000 0 0x1000>;
323 clocks = <&extal_clk>, <&extalr_clk>;
324 clock-names = "extal", "extalr";
325 #clock-cells = <2>;
326 #power-domain-cells = <0>;
327 #reset-cells = <1>;
328 };
329
330 rst: reset-controller@e6160000 {
331 compatible = "renesas,r8a77965-rst";
332 reg = <0 0xe6160000 0 0x0200>;
333 };
334
335 sysc: system-controller@e6180000 {
336 compatible = "renesas,r8a77965-sysc";
337 reg = <0 0xe6180000 0 0x0400>;
338 #power-domain-cells = <1>;
339 };
340
4c529600
NS		 341 tsc: thermal@e6198000 {
342 compatible = "renesas,r8a77965-thermal";
343 reg = <0 0xe6198000 0 0x100>,
344 <0 0xe61a0000 0 0x100>,
345 <0 0xe61a8000 0 0x100>;
346 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
348 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
349 clocks = <&cpg CPG_MOD 522>;
350 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
351 resets = <&cpg 522>;
352 #thermal-sensor-cells = <1>;
4c529600
NS		 353 };
354
df863d6f 355 intc_ex: interrupt-controller@e61c0000 {
ba03b432 356 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
f5af7701
JM		 357 #interrupt-cells = <2>;
358 interrupt-controller;
9e1b00a2 359 reg = <0 0xe61c0000 0 0x200>;
ba03b432
GU		 360 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
361 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
362 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
363 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
364 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
365 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
366 clocks = <&cpg CPG_MOD 407>;
7e26520f 367 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
ba03b432 368 resets = <&cpg 407>;
df863d6f
JM		 369 };
370
2af6f5a3 371 i2c0: i2c@e6500000 {
111d3ffe
NS		 372 #address-cells = <1>;
373 #size-cells = <0>;
374 compatible = "renesas,i2c-r8a77965",
375 "renesas,rcar-gen3-i2c";
2af6f5a3 376 reg = <0 0xe6500000 0 0x40>;
111d3ffe
NS		 377 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
378 clocks = <&cpg CPG_MOD 931>;
379 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
380 resets = <&cpg 931>;
381 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
382 <&dmac2 0x91>, <&dmac2 0x90>;
383 dma-names = "tx", "rx", "tx", "rx";
384 i2c-scl-internal-delay-ns = <110>;
385 status = "disabled";
2af6f5a3
YK		 386 };
387
388 i2c1: i2c@e6508000 {
111d3ffe
NS		 389 #address-cells = <1>;
390 #size-cells = <0>;
391 compatible = "renesas,i2c-r8a77965",
392 "renesas,rcar-gen3-i2c";
2af6f5a3 393 reg = <0 0xe6508000 0 0x40>;
111d3ffe
NS		 394 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
395 clocks = <&cpg CPG_MOD 930>;
396 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
397 resets = <&cpg 930>;
398 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
399 <&dmac2 0x93>, <&dmac2 0x92>;
400 dma-names = "tx", "rx", "tx", "rx";
401 i2c-scl-internal-delay-ns = <6>;
402 status = "disabled";
2af6f5a3
YK		 403 };
404
405 i2c2: i2c@e6510000 {
406 #address-cells = <1>;
407 #size-cells = <0>;
111d3ffe
NS		 408 compatible = "renesas,i2c-r8a77965",
409 "renesas,rcar-gen3-i2c";
2af6f5a3 410 reg = <0 0xe6510000 0 0x40>;
111d3ffe
NS		 411 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
412 clocks = <&cpg CPG_MOD 929>;
413 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
414 resets = <&cpg 929>;
415 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
416 <&dmac2 0x95>, <&dmac2 0x94>;
417 dma-names = "tx", "rx", "tx", "rx";
418 i2c-scl-internal-delay-ns = <6>;
419 status = "disabled";
2af6f5a3
YK		 420 };
421
422 i2c3: i2c@e66d0000 {
111d3ffe
NS		 423 #address-cells = <1>;
424 #size-cells = <0>;
425 compatible = "renesas,i2c-r8a77965",
426 "renesas,rcar-gen3-i2c";
2af6f5a3 427 reg = <0 0xe66d0000 0 0x40>;
111d3ffe
NS		 428 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
429 clocks = <&cpg CPG_MOD 928>;
430 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
431 resets = <&cpg 928>;
432 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
433 dma-names = "tx", "rx";
434 i2c-scl-internal-delay-ns = <110>;
435 status = "disabled";
2af6f5a3
YK		 436 };
437
438 i2c4: i2c@e66d8000 {
439 #address-cells = <1>;
440 #size-cells = <0>;
111d3ffe
NS		 441 compatible = "renesas,i2c-r8a77965",
442 "renesas,rcar-gen3-i2c";
2af6f5a3 443 reg = <0 0xe66d8000 0 0x40>;
111d3ffe
NS		 444 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
445 clocks = <&cpg CPG_MOD 927>;
446 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
447 resets = <&cpg 927>;
448 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
449 dma-names = "tx", "rx";
450 i2c-scl-internal-delay-ns = <110>;
451 status = "disabled";
2af6f5a3
YK		 452 };
453
454 i2c5: i2c@e66e0000 {
111d3ffe
NS		 455 #address-cells = <1>;
456 #size-cells = <0>;
457 compatible = "renesas,i2c-r8a77965",
458 "renesas,rcar-gen3-i2c";
2af6f5a3 459 reg = <0 0xe66e0000 0 0x40>;
111d3ffe
NS		 460 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
461 clocks = <&cpg CPG_MOD 919>;
462 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
463 resets = <&cpg 919>;
464 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
465 dma-names = "tx", "rx";
466 i2c-scl-internal-delay-ns = <110>;
467 status = "disabled";
2af6f5a3
YK		 468 };
469
470 i2c6: i2c@e66e8000 {
111d3ffe
NS		 471 #address-cells = <1>;
472 #size-cells = <0>;
473 compatible = "renesas,i2c-r8a77965",
474 "renesas,rcar-gen3-i2c";
2af6f5a3 475 reg = <0 0xe66e8000 0 0x40>;
111d3ffe
NS		 476 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
477 clocks = <&cpg CPG_MOD 918>;
478 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
479 resets = <&cpg 918>;
480 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
481 dma-names = "tx", "rx";
482 i2c-scl-internal-delay-ns = <6>;
483 status = "disabled";
2af6f5a3
YK		 484 };
485
486 i2c_dvfs: i2c@e60b0000 {
487 #address-cells = <1>;
488 #size-cells = <0>;
489 compatible = "renesas,iic-r8a77965",
490 "renesas,rcar-gen3-iic",
491 "renesas,rmobile-iic";
492 reg = <0 0xe60b0000 0 0x425>;
493 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
494 clocks = <&cpg CPG_MOD 926>;
7e26520f 495 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 496 resets = <&cpg 926>;
497 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
498 dma-names = "tx", "rx";
499 status = "disabled";
500 };
501
b8e3c8e1
TK		 502 hscif0: serial@e6540000 {
503 compatible = "renesas,hscif-r8a77965",
504 "renesas,rcar-gen3-hscif",
505 "renesas,hscif";
506 reg = <0 0xe6540000 0 0x60>;
507 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&cpg CPG_MOD 520>,
509 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
510 <&scif_clk>;
511 clock-names = "fck", "brg_int", "scif_clk";
512 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
513 <&dmac2 0x31>, <&dmac2 0x30>;
514 dma-names = "tx", "rx", "tx", "rx";
515 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
516 resets = <&cpg 520>;
517 status = "disabled";
518 };
519
520 hscif1: serial@e6550000 {
521 compatible = "renesas,hscif-r8a77965",
522 "renesas,rcar-gen3-hscif",
523 "renesas,hscif";
524 reg = <0 0xe6550000 0 0x60>;
525 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
526 clocks = <&cpg CPG_MOD 519>,
527 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
528 <&scif_clk>;
529 clock-names = "fck", "brg_int", "scif_clk";
530 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
531 <&dmac2 0x33>, <&dmac2 0x32>;
532 dma-names = "tx", "rx", "tx", "rx";
533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
534 resets = <&cpg 519>;
535 status = "disabled";
536 };
537
538 hscif2: serial@e6560000 {
539 compatible = "renesas,hscif-r8a77965",
540 "renesas,rcar-gen3-hscif",
541 "renesas,hscif";
542 reg = <0 0xe6560000 0 0x60>;
543 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
544 clocks = <&cpg CPG_MOD 518>,
545 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
546 <&scif_clk>;
547 clock-names = "fck", "brg_int", "scif_clk";
548 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
549 <&dmac2 0x35>, <&dmac2 0x34>;
550 dma-names = "tx", "rx", "tx", "rx";
551 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
552 resets = <&cpg 518>;
553 status = "disabled";
554 };
555
556 hscif3: serial@e66a0000 {
557 compatible = "renesas,hscif-r8a77965",
558 "renesas,rcar-gen3-hscif",
559 "renesas,hscif";
560 reg = <0 0xe66a0000 0 0x60>;
561 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
562 clocks = <&cpg CPG_MOD 517>,
563 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
564 <&scif_clk>;
565 clock-names = "fck", "brg_int", "scif_clk";
566 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
567 dma-names = "tx", "rx";
568 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
569 resets = <&cpg 517>;
570 status = "disabled";
571 };
572
573 hscif4: serial@e66b0000 {
574 compatible = "renesas,hscif-r8a77965",
575 "renesas,rcar-gen3-hscif",
576 "renesas,hscif";
577 reg = <0 0xe66b0000 0 0x60>;
578 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
579 clocks = <&cpg CPG_MOD 516>,
580 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
581 <&scif_clk>;
582 clock-names = "fck", "brg_int", "scif_clk";
583 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
584 dma-names = "tx", "rx";
585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
586 resets = <&cpg 516>;
587 status = "disabled";
588 };
589
2af6f5a3 590 hsusb: usb@e6590000 {
99584d93 591 compatible = "renesas,usbhs-r8a77965",
2af6f5a3
YK		 592 "renesas,rcar-gen3-usbhs";
593 reg = <0 0xe6590000 0 0x100>;
594 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 595 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
2af6f5a3
YK		 596 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
597 <&usb_dmac1 0>, <&usb_dmac1 1>;
598 dma-names = "ch0", "ch1", "ch2", "ch3";
599 renesas,buswait = <11>;
600 phys = <&usb2_phy0>;
601 phy-names = "usb";
7e26520f 602 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
737e05bf 603 resets = <&cpg 704>, <&cpg 703>;
2af6f5a3
YK		 604 status = "disabled";
605 };
606
607 usb_dmac0: dma-controller@e65a0000 {
608 compatible = "renesas,r8a77965-usb-dmac",
609 "renesas,usb-dmac";
610 reg = <0 0xe65a0000 0 0x100>;
611 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
612 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
613 interrupt-names = "ch0", "ch1";
614 clocks = <&cpg CPG_MOD 330>;
7e26520f 615 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 616 resets = <&cpg 330>;
617 #dma-cells = <1>;
618 dma-channels = <2>;
619 };
620
621 usb_dmac1: dma-controller@e65b0000 {
622 compatible = "renesas,r8a77965-usb-dmac",
623 "renesas,usb-dmac";
624 reg = <0 0xe65b0000 0 0x100>;
625 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
626 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
627 interrupt-names = "ch0", "ch1";
628 clocks = <&cpg CPG_MOD 331>;
7e26520f 629 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 630 resets = <&cpg 331>;
631 #dma-cells = <1>;
632 dma-channels = <2>;
633 };
634
635 usb3_phy0: usb-phy@e65ee000 {
636 compatible = "renesas,r8a77965-usb3-phy",
637 "renesas,rcar-gen3-usb3-phy";
638 reg = <0 0xe65ee000 0 0x90>;
639 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
640 <&usb_extal_clk>;
641 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
7e26520f 642 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 643 resets = <&cpg 328>;
644 #phy-cells = <0>;
645 status = "disabled";
646 };
647
df863d6f 648 dmac0: dma-controller@e6700000 {
838c1121
JM		 649 compatible = "renesas,dmac-r8a77965",
650 "renesas,rcar-dmac";
651 reg = <0 0xe6700000 0 0x10000>;
652 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
653 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
654 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
655 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
656 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
657 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
658 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
659 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
660 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
661 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
662 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
663 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
664 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
665 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
666 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
667 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
668 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
669 interrupt-names = "error",
670 "ch0", "ch1", "ch2", "ch3",
671 "ch4", "ch5", "ch6", "ch7",
672 "ch8", "ch9", "ch10", "ch11",
673 "ch12", "ch13", "ch14", "ch15";
674 clocks = <&cpg CPG_MOD 219>;
675 clock-names = "fck";
7e26520f 676 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
838c1121
JM		 677 resets = <&cpg 219>;
678 #dma-cells = <1>;
679 dma-channels = <16>;
4d76ad7d
MD		 680 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
681 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
682 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
683 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
684 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
685 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
686 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
687 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
df863d6f
JM		 688 };
689
690 dmac1: dma-controller@e7300000 {
838c1121
JM		 691 compatible = "renesas,dmac-r8a77965",
692 "renesas,rcar-dmac";
693 reg = <0 0xe7300000 0 0x10000>;
694 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
695 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
696 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
697 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
698 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
699 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
700 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
701 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
702 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
703 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
704 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
705 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
706 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
707 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
708 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
709 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
710 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
711 interrupt-names = "error",
712 "ch0", "ch1", "ch2", "ch3",
713 "ch4", "ch5", "ch6", "ch7",
714 "ch8", "ch9", "ch10", "ch11",
715 "ch12", "ch13", "ch14", "ch15";
716 clocks = <&cpg CPG_MOD 218>;
717 clock-names = "fck";
7e26520f 718 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
838c1121
JM		 719 resets = <&cpg 218>;
720 #dma-cells = <1>;
721 dma-channels = <16>;
4d76ad7d
MD		 722 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
723 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
724 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
725 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
726 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
727 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
728 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
729 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
df863d6f
JM		 730 };
731
732 dmac2: dma-controller@e7310000 {
838c1121
JM		 733 compatible = "renesas,dmac-r8a77965",
734 "renesas,rcar-dmac";
735 reg = <0 0xe7310000 0 0x10000>;
736 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
737 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
738 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
739 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
740 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
741 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
742 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
743 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
744 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
745 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
746 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
747 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
748 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
749 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
750 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
751 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
752 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
753 interrupt-names = "error",
754 "ch0", "ch1", "ch2", "ch3",
755 "ch4", "ch5", "ch6", "ch7",
756 "ch8", "ch9", "ch10", "ch11",
757 "ch12", "ch13", "ch14", "ch15";
758 clocks = <&cpg CPG_MOD 217>;
759 clock-names = "fck";
7e26520f 760 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
838c1121
JM		 761 resets = <&cpg 217>;
762 #dma-cells = <1>;
763 dma-channels = <16>;
4d76ad7d
MD		 764 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
765 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
766 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
767 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
768 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
769 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
770 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
771 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
df863d6f
JM		 772 };
773
55697cbb
MD		 774 ipmmu_ds0: mmu@e6740000 {
775 compatible = "renesas,ipmmu-r8a77965";
776 reg = <0 0xe6740000 0 0x1000>;
777 renesas,ipmmu-main = <&ipmmu_mm 0>;
778 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
779 #iommu-cells = <1>;
780 };
781
782 ipmmu_ds1: mmu@e7740000 {
783 compatible = "renesas,ipmmu-r8a77965";
784 reg = <0 0xe7740000 0 0x1000>;
785 renesas,ipmmu-main = <&ipmmu_mm 1>;
786 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
787 #iommu-cells = <1>;
788 };
789
790 ipmmu_hc: mmu@e6570000 {
791 compatible = "renesas,ipmmu-r8a77965";
792 reg = <0 0xe6570000 0 0x1000>;
793 renesas,ipmmu-main = <&ipmmu_mm 2>;
794 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
795 #iommu-cells = <1>;
796 };
797
798 ipmmu_ir: mmu@ff8b0000 {
799 compatible = "renesas,ipmmu-r8a77965";
800 reg = <0 0xff8b0000 0 0x1000>;
801 renesas,ipmmu-main = <&ipmmu_mm 3>;
802 power-domains = <&sysc R8A77965_PD_A3IR>;
803 #iommu-cells = <1>;
804 };
805
806 ipmmu_mm: mmu@e67b0000 {
807 compatible = "renesas,ipmmu-r8a77965";
808 reg = <0 0xe67b0000 0 0x1000>;
809 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
811 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
812 #iommu-cells = <1>;
813 };
814
815 ipmmu_mp: mmu@ec670000 {
816 compatible = "renesas,ipmmu-r8a77965";
817 reg = <0 0xec670000 0 0x1000>;
818 renesas,ipmmu-main = <&ipmmu_mm 4>;
819 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
820 #iommu-cells = <1>;
821 };
822
823 ipmmu_pv0: mmu@fd800000 {
824 compatible = "renesas,ipmmu-r8a77965";
825 reg = <0 0xfd800000 0 0x1000>;
826 renesas,ipmmu-main = <&ipmmu_mm 6>;
827 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
828 #iommu-cells = <1>;
829 };
830
831 ipmmu_rt: mmu@ffc80000 {
832 compatible = "renesas,ipmmu-r8a77965";
833 reg = <0 0xffc80000 0 0x1000>;
834 renesas,ipmmu-main = <&ipmmu_mm 10>;
835 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
836 #iommu-cells = <1>;
837 };
838
839 ipmmu_vc0: mmu@fe6b0000 {
840 compatible = "renesas,ipmmu-r8a77965";
841 reg = <0 0xfe6b0000 0 0x1000>;
842 renesas,ipmmu-main = <&ipmmu_mm 12>;
843 power-domains = <&sysc R8A77965_PD_A3VC>;
844 #iommu-cells = <1>;
845 };
846
847 ipmmu_vi0: mmu@febd0000 {
848 compatible = "renesas,ipmmu-r8a77965";
849 reg = <0 0xfebd0000 0 0x1000>;
850 renesas,ipmmu-main = <&ipmmu_mm 14>;
851 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
852 #iommu-cells = <1>;
853 };
854
855 ipmmu_vp0: mmu@fe990000 {
856 compatible = "renesas,ipmmu-r8a77965";
857 reg = <0 0xfe990000 0 0x1000>;
858 renesas,ipmmu-main = <&ipmmu_mm 16>;
859 power-domains = <&sysc R8A77965_PD_A3VP>;
860 #iommu-cells = <1>;
861 };
862
2af6f5a3
YK		 863 avb: ethernet@e6800000 {
864 compatible = "renesas,etheravb-r8a77965",
865 "renesas,etheravb-rcar-gen3";
866 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
867 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
868 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
869 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
870 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
871 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
872 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
873 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
874 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
875 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
876 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
877 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
878 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
879 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
880 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
881 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
882 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
883 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
884 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
885 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
886 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
887 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
888 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
889 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
890 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
891 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
892 interrupt-names = "ch0", "ch1", "ch2", "ch3",
893 "ch4", "ch5", "ch6", "ch7",
894 "ch8", "ch9", "ch10", "ch11",
895 "ch12", "ch13", "ch14", "ch15",
896 "ch16", "ch17", "ch18", "ch19",
897 "ch20", "ch21", "ch22", "ch23",
898 "ch24";
899 clocks = <&cpg CPG_MOD 812>;
7e26520f 900 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 901 resets = <&cpg 812>;
902 phy-mode = "rgmii";
903 #address-cells = <1>;
904 #size-cells = <0>;
0ea5b2fd 905 status = "disabled";
df863d6f
JM		 906 };
907
92bc66bf
ER		 908 can0: can@e6c30000 {
909 reg = <0 0xe6c30000 0 0x1000>;
910 /* placeholder */
911 };
912
913 can1: can@e6c38000 {
914 reg = <0 0xe6c38000 0 0x1000>;
915 /* placeholder */
916 };
917
2af6f5a3
YK		 918 pwm0: pwm@e6e30000 {
919 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
920 reg = <0 0xe6e30000 0 8>;
921 #pwm-cells = <2>;
922 clocks = <&cpg CPG_MOD 523>;
923 resets = <&cpg 523>;
7e26520f 924 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 925 status = "disabled";
926 };
927
928 pwm1: pwm@e6e31000 {
929 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
930 reg = <0 0xe6e31000 0 8>;
931 #pwm-cells = <2>;
932 clocks = <&cpg CPG_MOD 523>;
933 resets = <&cpg 523>;
7e26520f 934 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 935 status = "disabled";
936 };
937
938 pwm2: pwm@e6e32000 {
939 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
940 reg = <0 0xe6e32000 0 8>;
941 #pwm-cells = <2>;
942 clocks = <&cpg CPG_MOD 523>;
943 resets = <&cpg 523>;
7e26520f 944 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 945 status = "disabled";
946 };
947
948 pwm3: pwm@e6e33000 {
949 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
950 reg = <0 0xe6e33000 0 8>;
951 #pwm-cells = <2>;
952 clocks = <&cpg CPG_MOD 523>;
953 resets = <&cpg 523>;
7e26520f 954 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 955 status = "disabled";
956 };
957
958 pwm4: pwm@e6e34000 {
959 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
960 reg = <0 0xe6e34000 0 8>;
961 #pwm-cells = <2>;
962 clocks = <&cpg CPG_MOD 523>;
963 resets = <&cpg 523>;
7e26520f 964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 965 status = "disabled";
966 };
967
968 pwm5: pwm@e6e35000 {
969 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
970 reg = <0 0xe6e35000 0 8>;
971 #pwm-cells = <2>;
972 clocks = <&cpg CPG_MOD 523>;
973 resets = <&cpg 523>;
7e26520f 974 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 975 status = "disabled";
976 };
977
978 pwm6: pwm@e6e36000 {
979 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
980 reg = <0 0xe6e36000 0 8>;
981 #pwm-cells = <2>;
982 clocks = <&cpg CPG_MOD 523>;
983 resets = <&cpg 523>;
7e26520f 984 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 985 status = "disabled";
986 };
987
988 scif0: serial@e6e60000 {
989 compatible = "renesas,scif-r8a77965",
990 "renesas,rcar-gen3-scif", "renesas,scif";
991 reg = <0 0xe6e60000 0 64>;
992 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
993 clocks = <&cpg CPG_MOD 207>,
a6972dec 994 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
2af6f5a3
YK		 995 <&scif_clk>;
996 clock-names = "fck", "brg_int", "scif_clk";
997 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
998 <&dmac2 0x51>, <&dmac2 0x50>;
999 dma-names = "tx", "rx", "tx", "rx";
7e26520f 1000 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1001 resets = <&cpg 207>;
1002 status = "disabled";
1003 };
1004
1005 scif1: serial@e6e68000 {
1006 compatible = "renesas,scif-r8a77965",
1007 "renesas,rcar-gen3-scif", "renesas,scif";
1008 reg = <0 0xe6e68000 0 64>;
1009 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1010 clocks = <&cpg CPG_MOD 206>,
a6972dec 1011 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
2af6f5a3
YK		 1012 <&scif_clk>;
1013 clock-names = "fck", "brg_int", "scif_clk";
1014 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1015 <&dmac2 0x53>, <&dmac2 0x52>;
1016 dma-names = "tx", "rx", "tx", "rx";
7e26520f 1017 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 1018 resets = <&cpg 206>;
1019 status = "disabled";
df863d6f
JM		 1020 };
1021
1022 scif2: serial@e6e88000 {
0ea5b2fd
JM		 1023 compatible = "renesas,scif-r8a77965",
1024 "renesas,rcar-gen3-scif", "renesas,scif";
1025 reg = <0 0xe6e88000 0 64>;
1026 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1027 clocks = <&cpg CPG_MOD 310>,
a6972dec 1028 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0ea5b2fd
JM		 1029 <&scif_clk>;
1030 clock-names = "fck", "brg_int", "scif_clk";
7e26520f 1031 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 1032 resets = <&cpg 310>;
1033 status = "disabled";
df863d6f
JM		 1034 };
1035
1036 scif3: serial@e6c50000 {
0ea5b2fd
JM		 1037 compatible = "renesas,scif-r8a77965",
1038 "renesas,rcar-gen3-scif", "renesas,scif";
1039 reg = <0 0xe6c50000 0 64>;
1040 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1041 clocks = <&cpg CPG_MOD 204>,
a6972dec 1042 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0ea5b2fd
JM		 1043 <&scif_clk>;
1044 clock-names = "fck", "brg_int", "scif_clk";
1045 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1046 dma-names = "tx", "rx";
7e26520f 1047 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 1048 resets = <&cpg 204>;
1049 status = "disabled";
df863d6f
JM		 1050 };
1051
1052 scif4: serial@e6c40000 {
0ea5b2fd
JM		 1053 compatible = "renesas,scif-r8a77965",
1054 "renesas,rcar-gen3-scif", "renesas,scif";
1055 reg = <0 0xe6c40000 0 64>;
1056 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1057 clocks = <&cpg CPG_MOD 203>,
a6972dec 1058 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0ea5b2fd
JM		 1059 <&scif_clk>;
1060 clock-names = "fck", "brg_int", "scif_clk";
1061 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1062 dma-names = "tx", "rx";
7e26520f 1063 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 1064 resets = <&cpg 203>;
1065 status = "disabled";
df863d6f
JM		 1066 };
1067
1068 scif5: serial@e6f30000 {
0ea5b2fd
JM		 1069 compatible = "renesas,scif-r8a77965",
1070 "renesas,rcar-gen3-scif", "renesas,scif";
1071 reg = <0 0xe6f30000 0 64>;
1072 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1073 clocks = <&cpg CPG_MOD 202>,
a6972dec 1074 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0ea5b2fd
JM		 1075 <&scif_clk>;
1076 clock-names = "fck", "brg_int", "scif_clk";
1077 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1078 <&dmac2 0x5b>, <&dmac2 0x5a>;
1079 dma-names = "tx", "rx", "tx", "rx";
7e26520f 1080 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0ea5b2fd
JM		 1081 resets = <&cpg 202>;
1082 status = "disabled";
df863d6f
JM		 1083 };
1084
2af6f5a3
YK		 1085 msiof0: spi@e6e90000 {
1086 compatible = "renesas,msiof-r8a77965",
1087 "renesas,rcar-gen3-msiof";
1088 reg = <0 0xe6e90000 0 0x0064>;
1089 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1090 clocks = <&cpg CPG_MOD 211>;
1091 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1092 <&dmac2 0x41>, <&dmac2 0x40>;
1093 dma-names = "tx", "rx", "tx", "rx";
7e26520f 1094 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3 1095 resets = <&cpg 211>;
ba8b5ad0
JM		 1096 #address-cells = <1>;
1097 #size-cells = <0>;
862a61d0 1098 status = "disabled";
df863d6f
JM		 1099 };
1100
2af6f5a3
YK		 1101 msiof1: spi@e6ea0000 {
1102 compatible = "renesas,msiof-r8a77965",
1103 "renesas,rcar-gen3-msiof";
1104 reg = <0 0xe6ea0000 0 0x0064>;
1105 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1106 clocks = <&cpg CPG_MOD 210>;
1107 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1108 <&dmac2 0x43>, <&dmac2 0x42>;
1109 dma-names = "tx", "rx", "tx", "rx";
7e26520f 1110 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1111 resets = <&cpg 210>;
1112 #address-cells = <1>;
1113 #size-cells = <0>;
1114 status = "disabled";
df863d6f
JM		 1115 };
1116
2af6f5a3
YK		 1117 msiof2: spi@e6c00000 {
1118 compatible = "renesas,msiof-r8a77965",
1119 "renesas,rcar-gen3-msiof";
1120 reg = <0 0xe6c00000 0 0x0064>;
1121 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1122 clocks = <&cpg CPG_MOD 209>;
1123 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1124 dma-names = "tx", "rx";
7e26520f 1125 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1126 resets = <&cpg 209>;
1127 #address-cells = <1>;
1128 #size-cells = <0>;
1129 status = "disabled";
1130 };
ba8b5ad0 1131
2af6f5a3
YK		 1132 msiof3: spi@e6c10000 {
1133 compatible = "renesas,msiof-r8a77965",
1134 "renesas,rcar-gen3-msiof";
1135 reg = <0 0xe6c10000 0 0x0064>;
1136 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1137 clocks = <&cpg CPG_MOD 208>;
1138 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1139 dma-names = "tx", "rx";
7e26520f 1140 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1141 resets = <&cpg 208>;
1142 #address-cells = <1>;
1143 #size-cells = <0>;
1144 status = "disabled";
df863d6f
JM		 1145 };
1146
1147 vin0: video@e6ef0000 {
98b6badf 1148 compatible = "renesas,vin-r8a77965";
9e1b00a2 1149 reg = <0 0xe6ef0000 0 0x1000>;
98b6badf
NS		 1150 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1151 clocks = <&cpg CPG_MOD 811>;
1152 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1153 resets = <&cpg 811>;
1154 renesas,id = <0>;
1155 status = "disabled";
1156
1157 ports {
1158 #address-cells = <1>;
1159 #size-cells = <0>;
1160
1161 port@1 {
1162 #address-cells = <1>;
1163 #size-cells = <0>;
1164
1165 reg = <1>;
1166
1167 vin0csi20: endpoint@0 {
1168 reg = <0>;
fced3a97 1169 remote-endpoint = <&csi20vin0>;
98b6badf
NS		 1170 };
1171 vin0csi40: endpoint@2 {
1172 reg = <2>;
fced3a97 1173 remote-endpoint = <&csi40vin0>;
98b6badf
NS		 1174 };
1175 };
1176 };
df863d6f
JM		 1177 };
1178
1179 vin1: video@e6ef1000 {
98b6badf 1180 compatible = "renesas,vin-r8a77965";
9e1b00a2 1181 reg = <0 0xe6ef1000 0 0x1000>;
98b6badf
NS		 1182 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1183 clocks = <&cpg CPG_MOD 810>;
1184 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1185 resets = <&cpg 810>;
1186 renesas,id = <1>;
1187 status = "disabled";
1188
1189 ports {
1190 #address-cells = <1>;
1191 #size-cells = <0>;
1192
1193 port@1 {
1194 #address-cells = <1>;
1195 #size-cells = <0>;
1196
1197 reg = <1>;
1198
1199 vin1csi20: endpoint@0 {
1200 reg = <0>;
fced3a97 1201 remote-endpoint = <&csi20vin1>;
98b6badf
NS		 1202 };
1203 vin1csi40: endpoint@2 {
1204 reg = <2>;
fced3a97 1205 remote-endpoint = <&csi40vin1>;
98b6badf
NS		 1206 };
1207 };
1208 };
df863d6f
JM		 1209 };
1210
1211 vin2: video@e6ef2000 {
98b6badf 1212 compatible = "renesas,vin-r8a77965";
9e1b00a2 1213 reg = <0 0xe6ef2000 0 0x1000>;
98b6badf
NS		 1214 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1215 clocks = <&cpg CPG_MOD 809>;
1216 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1217 resets = <&cpg 809>;
1218 renesas,id = <2>;
1219 status = "disabled";
1220
1221 ports {
1222 #address-cells = <1>;
1223 #size-cells = <0>;
1224
1225 port@1 {
1226 #address-cells = <1>;
1227 #size-cells = <0>;
1228
1229 reg = <1>;
1230
1231 vin2csi20: endpoint@0 {
1232 reg = <0>;
fced3a97 1233 remote-endpoint = <&csi20vin2>;
98b6badf
NS		 1234 };
1235 vin2csi40: endpoint@2 {
1236 reg = <2>;
fced3a97 1237 remote-endpoint = <&csi40vin2>;
98b6badf
NS		 1238 };
1239 };
1240 };
df863d6f
JM		 1241 };
1242
1243 vin3: video@e6ef3000 {
98b6badf 1244 compatible = "renesas,vin-r8a77965";
9e1b00a2 1245 reg = <0 0xe6ef3000 0 0x1000>;
98b6badf
NS		 1246 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1247 clocks = <&cpg CPG_MOD 808>;
1248 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1249 resets = <&cpg 808>;
1250 renesas,id = <3>;
1251 status = "disabled";
1252
1253 ports {
1254 #address-cells = <1>;
1255 #size-cells = <0>;
1256
1257 port@1 {
1258 #address-cells = <1>;
1259 #size-cells = <0>;
1260
1261 reg = <1>;
1262
1263 vin3csi20: endpoint@0 {
1264 reg = <0>;
fced3a97 1265 remote-endpoint = <&csi20vin3>;
98b6badf
NS		 1266 };
1267 vin3csi40: endpoint@2 {
1268 reg = <2>;
fced3a97 1269 remote-endpoint = <&csi40vin3>;
98b6badf
NS		 1270 };
1271 };
1272 };
df863d6f
JM		 1273 };
1274
1275 vin4: video@e6ef4000 {
98b6badf 1276 compatible = "renesas,vin-r8a77965";
9e1b00a2 1277 reg = <0 0xe6ef4000 0 0x1000>;
98b6badf
NS		 1278 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1279 clocks = <&cpg CPG_MOD 807>;
1280 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1281 resets = <&cpg 807>;
1282 renesas,id = <4>;
1283 status = "disabled";
1284
1285 ports {
1286 #address-cells = <1>;
1287 #size-cells = <0>;
1288
1289 port@1 {
1290 #address-cells = <1>;
1291 #size-cells = <0>;
1292
1293 reg = <1>;
1294
1295 vin4csi20: endpoint@0 {
1296 reg = <0>;
fced3a97 1297 remote-endpoint = <&csi20vin4>;
98b6badf
NS		 1298 };
1299 vin4csi40: endpoint@2 {
1300 reg = <2>;
fced3a97 1301 remote-endpoint = <&csi40vin4>;
98b6badf
NS		 1302 };
1303 };
1304 };
df863d6f
JM		 1305 };
1306
1307 vin5: video@e6ef5000 {
98b6badf 1308 compatible = "renesas,vin-r8a77965";
9e1b00a2 1309 reg = <0 0xe6ef5000 0 0x1000>;
98b6badf
NS		 1310 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1311 clocks = <&cpg CPG_MOD 806>;
1312 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1313 resets = <&cpg 806>;
1314 renesas,id = <5>;
1315 status = "disabled";
1316
1317 ports {
1318 #address-cells = <1>;
1319 #size-cells = <0>;
1320
1321 port@1 {
1322 #address-cells = <1>;
1323 #size-cells = <0>;
1324
1325 reg = <1>;
1326
1327 vin5csi20: endpoint@0 {
1328 reg = <0>;
fced3a97 1329 remote-endpoint = <&csi20vin5>;
98b6badf
NS		 1330 };
1331 vin5csi40: endpoint@2 {
1332 reg = <2>;
fced3a97 1333 remote-endpoint = <&csi40vin5>;
98b6badf
NS		 1334 };
1335 };
1336 };
df863d6f
JM		 1337 };
1338
1339 vin6: video@e6ef6000 {
98b6badf 1340 compatible = "renesas,vin-r8a77965";
9e1b00a2 1341 reg = <0 0xe6ef6000 0 0x1000>;
98b6badf
NS		 1342 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1343 clocks = <&cpg CPG_MOD 805>;
1344 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1345 resets = <&cpg 805>;
1346 renesas,id = <6>;
1347 status = "disabled";
1348
1349 ports {
1350 #address-cells = <1>;
1351 #size-cells = <0>;
1352
1353 port@1 {
1354 #address-cells = <1>;
1355 #size-cells = <0>;
1356
1357 reg = <1>;
1358
1359 vin6csi20: endpoint@0 {
1360 reg = <0>;
fced3a97 1361 remote-endpoint = <&csi20vin6>;
98b6badf
NS		 1362 };
1363 vin6csi40: endpoint@2 {
1364 reg = <2>;
fced3a97 1365 remote-endpoint = <&csi40vin6>;
98b6badf
NS		 1366 };
1367 };
1368 };
df863d6f
JM		 1369 };
1370
1371 vin7: video@e6ef7000 {
98b6badf 1372 compatible = "renesas,vin-r8a77965";
9e1b00a2 1373 reg = <0 0xe6ef7000 0 0x1000>;
98b6badf
NS		 1374 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1375 clocks = <&cpg CPG_MOD 804>;
1376 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1377 resets = <&cpg 804>;
1378 renesas,id = <7>;
1379 status = "disabled";
1380
1381 ports {
1382 #address-cells = <1>;
1383 #size-cells = <0>;
1384
1385 port@1 {
1386 #address-cells = <1>;
1387 #size-cells = <0>;
1388
1389 reg = <1>;
1390
1391 vin7csi20: endpoint@0 {
1392 reg = <0>;
fced3a97 1393 remote-endpoint = <&csi20vin7>;
98b6badf
NS		 1394 };
1395 vin7csi40: endpoint@2 {
1396 reg = <2>;
fced3a97 1397 remote-endpoint = <&csi40vin7>;
98b6badf
NS		 1398 };
1399 };
1400 };
df863d6f
JM		 1401 };
1402
2af6f5a3 1403 rcar_sound: sound@ec500000 {
158928f3
TK		 1404 /*
1405 * #sound-dai-cells is required
1406 *
1407 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1408 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1409 */
1410 /*
1411 * #clock-cells is required for audio_clkout0/1/2/3
1412 *
1413 * clkout : #clock-cells = <0>; <&rcar_sound>;
1414 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1415 */
1416 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
2af6f5a3
YK		 1417 reg = <0 0xec500000 0 0x1000>, /* SCU */
1418 <0 0xec5a0000 0 0x100>, /* ADG */
1419 <0 0xec540000 0 0x1000>, /* SSIU */
1420 <0 0xec541000 0 0x280>, /* SSI */
1421 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
158928f3
TK		 1422 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1423
1424 clocks = <&cpg CPG_MOD 1005>,
1425 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1426 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1427 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1428 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1429 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1430 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1431 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1432 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1433 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1434 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1435 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1436 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1437 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1438 <&audio_clk_a>, <&audio_clk_b>,
1439 <&audio_clk_c>,
1440 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1441 clock-names = "ssi-all",
1442 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1443 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1444 "ssi.1", "ssi.0",
1445 "src.9", "src.8", "src.7", "src.6",
1446 "src.5", "src.4", "src.3", "src.2",
1447 "src.1", "src.0",
1448 "mix.1", "mix.0",
1449 "ctu.1", "ctu.0",
1450 "dvc.0", "dvc.1",
1451 "clk_a", "clk_b", "clk_c", "clk_i";
1452 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1453 resets = <&cpg 1005>,
1454 <&cpg 1006>, <&cpg 1007>,
1455 <&cpg 1008>, <&cpg 1009>,
1456 <&cpg 1010>, <&cpg 1011>,
1457 <&cpg 1012>, <&cpg 1013>,
1458 <&cpg 1014>, <&cpg 1015>;
1459 reset-names = "ssi-all",
1460 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1461 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1462 "ssi.1", "ssi.0";
1463 status = "disabled";
2af6f5a3
YK		 1464
1465 rcar_sound,dvc {
1466 dvc0: dvc-0 {
158928f3
TK		 1467 dmas = <&audma1 0xbc>;
1468 dma-names = "tx";
2af6f5a3
YK		 1469 };
1470 dvc1: dvc-1 {
158928f3
TK		 1471 dmas = <&audma1 0xbe>;
1472 dma-names = "tx";
2af6f5a3
YK		 1473 };
1474 };
1475
158928f3
TK		 1476 rcar_sound,mix {
1477 mix0: mix-0 { };
1478 mix1: mix-1 { };
1479 };
1480
1481 rcar_sound,ctu {
1482 ctu00: ctu-0 { };
1483 ctu01: ctu-1 { };
1484 ctu02: ctu-2 { };
1485 ctu03: ctu-3 { };
1486 ctu10: ctu-4 { };
1487 ctu11: ctu-5 { };
1488 ctu12: ctu-6 { };
1489 ctu13: ctu-7 { };
1490 };
1491
2af6f5a3
YK		 1492 rcar_sound,src {
1493 src0: src-0 {
158928f3
TK		 1494 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1495 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1496 dma-names = "rx", "tx";
2af6f5a3
YK		 1497 };
1498 src1: src-1 {
158928f3
TK		 1499 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1500 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1501 dma-names = "rx", "tx";
1502 };
1503 src2: src-2 {
1504 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1505 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1506 dma-names = "rx", "tx";
1507 };
1508 src3: src-3 {
1509 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1510 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1511 dma-names = "rx", "tx";
1512 };
1513 src4: src-4 {
1514 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1515 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1516 dma-names = "rx", "tx";
1517 };
1518 src5: src-5 {
1519 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1520 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1521 dma-names = "rx", "tx";
1522 };
1523 src6: src-6 {
1524 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1525 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1526 dma-names = "rx", "tx";
1527 };
1528 src7: src-7 {
1529 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1530 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1531 dma-names = "rx", "tx";
1532 };
1533 src8: src-8 {
1534 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1535 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1536 dma-names = "rx", "tx";
1537 };
1538 src9: src-9 {
1539 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1540 dmas = <&audma0 0x97>, <&audma1 0xba>;
1541 dma-names = "rx", "tx";
2af6f5a3
YK		 1542 };
1543 };
1544
1545 rcar_sound,ssi {
1546 ssi0: ssi-0 {
158928f3
TK		 1547 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1548 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1549 dma-names = "rx", "tx", "rxu", "txu";
2af6f5a3
YK		 1550 };
1551 ssi1: ssi-1 {
158928f3
TK		 1552 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1553 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1554 dma-names = "rx", "tx", "rxu", "txu";
2af6f5a3 1555 };
158928f3
TK		 1556 ssi2: ssi-2 {
1557 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1558 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1559 dma-names = "rx", "tx", "rxu", "txu";
e94ac4c7 1560 };
158928f3
TK		 1561 ssi3: ssi-3 {
1562 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1563 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1564 dma-names = "rx", "tx", "rxu", "txu";
1565 };
1566 ssi4: ssi-4 {
1567 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1568 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1569 dma-names = "rx", "tx", "rxu", "txu";
1570 };
1571 ssi5: ssi-5 {
1572 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1573 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1574 dma-names = "rx", "tx", "rxu", "txu";
1575 };
1576 ssi6: ssi-6 {
1577 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1578 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1579 dma-names = "rx", "tx", "rxu", "txu";
1580 };
1581 ssi7: ssi-7 {
1582 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1583 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1584 dma-names = "rx", "tx", "rxu", "txu";
1585 };
1586 ssi8: ssi-8 {
1587 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1588 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1589 dma-names = "rx", "tx", "rxu", "txu";
1590 };
1591 ssi9: ssi-9 {
1592 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1593 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1594 dma-names = "rx", "tx", "rxu", "txu";
485f8b28 1595 };
e94ac4c7 1596 };
2af6f5a3
YK		 1597 };
1598
158928f3
TK		 1599 audma0: dma-controller@ec700000 {
1600 compatible = "renesas,dmac-r8a77965",
1601 "renesas,rcar-dmac";
1602 reg = <0 0xec700000 0 0x10000>;
1603 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1604 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1605 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1606 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1607 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1608 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1609 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1610 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1611 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1612 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1613 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1614 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1615 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1616 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1617 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1618 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1619 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1620 interrupt-names = "error",
1621 "ch0", "ch1", "ch2", "ch3",
1622 "ch4", "ch5", "ch6", "ch7",
1623 "ch8", "ch9", "ch10", "ch11",
1624 "ch12", "ch13", "ch14", "ch15";
1625 clocks = <&cpg CPG_MOD 502>;
1626 clock-names = "fck";
1627 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1628 resets = <&cpg 502>;
1629 #dma-cells = <1>;
1630 dma-channels = <16>;
1631 };
1632
1633 audma1: dma-controller@ec720000 {
1634 compatible = "renesas,dmac-r8a77965",
1635 "renesas,rcar-dmac";
1636 reg = <0 0xec720000 0 0x10000>;
1637 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1638 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1639 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1640 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1641 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1642 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1643 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1644 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1645 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1646 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1647 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1648 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1649 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1650 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1651 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1652 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1653 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1654 interrupt-names = "error",
1655 "ch0", "ch1", "ch2", "ch3",
1656 "ch4", "ch5", "ch6", "ch7",
1657 "ch8", "ch9", "ch10", "ch11",
1658 "ch12", "ch13", "ch14", "ch15";
1659 clocks = <&cpg CPG_MOD 501>;
1660 clock-names = "fck";
1661 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1662 resets = <&cpg 501>;
1663 #dma-cells = <1>;
1664 dma-channels = <16>;
1665 };
1666
2af6f5a3
YK		 1667 xhci0: usb@ee000000 {
1668 compatible = "renesas,xhci-r8a77965",
1669 "renesas,rcar-gen3-xhci";
1670 reg = <0 0xee000000 0 0xc00>;
1671 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1672 clocks = <&cpg CPG_MOD 328>;
7e26520f 1673 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1674 resets = <&cpg 328>;
1675 status = "disabled";
1676 };
1677
1678 usb3_peri0: usb@ee020000 {
1679 compatible = "renesas,r8a77965-usb3-peri",
1680 "renesas,rcar-gen3-usb3-peri";
1681 reg = <0 0xee020000 0 0x400>;
1682 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1683 clocks = <&cpg CPG_MOD 328>;
7e26520f 1684 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1685 resets = <&cpg 328>;
1686 status = "disabled";
1687 };
1688
df863d6f 1689 ohci0: usb@ee080000 {
1dfa66cd 1690 compatible = "generic-ohci";
9e1b00a2 1691 reg = <0 0xee080000 0 0x100>;
1dfa66cd 1692 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 1693 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1dfa66cd
YS		 1694 phys = <&usb2_phy0>;
1695 phy-names = "usb";
7e26520f 1696 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
737e05bf 1697 resets = <&cpg 703>, <&cpg 704>;
1dfa66cd 1698 status = "disabled";
df863d6f
JM		 1699 };
1700
2af6f5a3
YK		 1701 ohci1: usb@ee0a0000 {
1702 compatible = "generic-ohci";
1703 reg = <0 0xee0a0000 0 0x100>;
1704 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1705 clocks = <&cpg CPG_MOD 702>;
1706 phys = <&usb2_phy1>;
1707 phy-names = "usb";
7e26520f 1708 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1709 resets = <&cpg 702>;
1710 status = "disabled";
1711 };
1712
df863d6f 1713 ehci0: usb@ee080100 {
1dfa66cd 1714 compatible = "generic-ehci";
9e1b00a2 1715 reg = <0 0xee080100 0 0x100>;
1dfa66cd 1716 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 1717 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1dfa66cd
YS		 1718 phys = <&usb2_phy0>;
1719 phy-names = "usb";
1720 companion = <&ohci0>;
7e26520f 1721 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
737e05bf 1722 resets = <&cpg 703>, <&cpg 704>;
1dfa66cd 1723 status = "disabled";
df863d6f
JM		 1724 };
1725
2af6f5a3
YK		 1726 ehci1: usb@ee0a0100 {
1727 compatible = "generic-ehci";
1728 reg = <0 0xee0a0100 0 0x100>;
1729 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1730 clocks = <&cpg CPG_MOD 702>;
1731 phys = <&usb2_phy1>;
1732 phy-names = "usb";
1733 companion = <&ohci1>;
7e26520f 1734 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3
YK		 1735 resets = <&cpg 702>;
1736 status = "disabled";
1737 };
1738
df863d6f 1739 usb2_phy0: usb-phy@ee080200 {
b5857630
YS		 1740 compatible = "renesas,usb2-phy-r8a77965",
1741 "renesas,rcar-gen3-usb2-phy";
9e1b00a2 1742 reg = <0 0xee080200 0 0x700>;
b5857630 1743 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
737e05bf 1744 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
7e26520f 1745 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
737e05bf 1746 resets = <&cpg 703>, <&cpg 704>;
b5857630
YS		 1747 #phy-cells = <0>;
1748 status = "disabled";
df863d6f
JM		 1749 };
1750
fe674605 1751 usb2_phy1: usb-phy@ee0a0200 {
b5857630
YS		 1752 compatible = "renesas,usb2-phy-r8a77965",
1753 "renesas,rcar-gen3-usb2-phy";
fe674605 1754 reg = <0 0xee0a0200 0 0x700>;
7a590fe3 1755 clocks = <&cpg CPG_MOD 702>;
7e26520f 1756 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
7a590fe3 1757 resets = <&cpg 702>;
b5857630
YS		 1758 #phy-cells = <0>;
1759 status = "disabled";
fe674605
JM		 1760 };
1761
2af6f5a3 1762 sdhi0: sd@ee100000 {
aa7a6365
TK		 1763 compatible = "renesas,sdhi-r8a77965",
1764 "renesas,rcar-gen3-sdhi";
2af6f5a3 1765 reg = <0 0xee100000 0 0x2000>;
aa7a6365
TK		 1766 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1767 clocks = <&cpg CPG_MOD 314>;
1768 max-frequency = <200000000>;
1769 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1770 resets = <&cpg 314>;
1771 status = "disabled";
df863d6f
JM		 1772 };
1773
2af6f5a3 1774 sdhi1: sd@ee120000 {
aa7a6365
TK		 1775 compatible = "renesas,sdhi-r8a77965",
1776 "renesas,rcar-gen3-sdhi";
2af6f5a3 1777 reg = <0 0xee120000 0 0x2000>;
aa7a6365
TK		 1778 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1779 clocks = <&cpg CPG_MOD 313>;
1780 max-frequency = <200000000>;
1781 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1782 resets = <&cpg 313>;
1783 status = "disabled";
df863d6f
JM		 1784 };
1785
2af6f5a3 1786 sdhi2: sd@ee140000 {
aa7a6365
TK		 1787 compatible = "renesas,sdhi-r8a77965",
1788 "renesas,rcar-gen3-sdhi";
2af6f5a3 1789 reg = <0 0xee140000 0 0x2000>;
aa7a6365
TK		 1790 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1791 clocks = <&cpg CPG_MOD 312>;
1792 max-frequency = <200000000>;
1793 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1794 resets = <&cpg 312>;
1795 status = "disabled";
df863d6f
JM		 1796 };
1797
2af6f5a3 1798 sdhi3: sd@ee160000 {
aa7a6365
TK		 1799 compatible = "renesas,sdhi-r8a77965",
1800 "renesas,rcar-gen3-sdhi";
2af6f5a3 1801 reg = <0 0xee160000 0 0x2000>;
aa7a6365
TK		 1802 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1803 clocks = <&cpg CPG_MOD 311>;
1804 max-frequency = <200000000>;
1805 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1806 resets = <&cpg 311>;
1807 status = "disabled";
df863d6f
JM		 1808 };
1809
346f0227
TK		 1810 sata: sata@ee300000 {
1811 compatible = "renesas,sata-r8a77965",
1812 "renesas,rcar-gen3-sata";
1813 reg = <0 0xee300000 0 0x200000>;
1814 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1815 clocks = <&cpg CPG_MOD 815>;
1816 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1817 resets = <&cpg 815>;
1818 status = "disabled";
1819 };
1820
2af6f5a3
YK		 1821 gic: interrupt-controller@f1010000 {
1822 compatible = "arm,gic-400";
1823 #interrupt-cells = <3>;
1824 #address-cells = <0>;
1825 interrupt-controller;
1826 reg = <0x0 0xf1010000 0 0x1000>,
1827 <0x0 0xf1020000 0 0x20000>,
1828 <0x0 0xf1040000 0 0x20000>,
1829 <0x0 0xf1060000 0 0x20000>;
1830 interrupts = <GIC_PPI 9
1831 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1832 clocks = <&cpg CPG_MOD 408>;
1833 clock-names = "clk";
7e26520f 1834 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2af6f5a3 1835 resets = <&cpg 408>;
df863d6f
JM		 1836 };
1837
2af6f5a3 1838 pciec0: pcie@fe000000 {
406c5ad2
TK		 1839 compatible = "renesas,pcie-r8a77965",
1840 "renesas,pcie-rcar-gen3";
2af6f5a3 1841 reg = <0 0xfe000000 0 0x80000>;
406c5ad2
TK		 1842 #address-cells = <3>;
1843 #size-cells = <2>;
1844 bus-range = <0x00 0xff>;
1845 device_type = "pci";
1846 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1847 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1848 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1849 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1850 /* Map all possible DDR as inbound ranges */
1851 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1852 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1853 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1854 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1855 #interrupt-cells = <1>;
1856 interrupt-map-mask = <0 0 0 0>;
1857 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1858 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1859 clock-names = "pcie", "pcie_bus";
1860 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1861 resets = <&cpg 319>;
1862 status = "disabled";
df863d6f
JM		 1863 };
1864
2af6f5a3 1865 pciec1: pcie@ee800000 {
406c5ad2
TK		 1866 compatible = "renesas,pcie-r8a77965",
1867 "renesas,pcie-rcar-gen3";
2af6f5a3 1868 reg = <0 0xee800000 0 0x80000>;
406c5ad2
TK		 1869 #address-cells = <3>;
1870 #size-cells = <2>;
1871 bus-range = <0x00 0xff>;
1872 device_type = "pci";
1873 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1874 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1875 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1876 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1877 /* Map all possible DDR as inbound ranges */
1878 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1879 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1880 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1881 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1882 #interrupt-cells = <1>;
1883 interrupt-map-mask = <0 0 0 0>;
1884 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1885 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1886 clock-names = "pcie", "pcie_bus";
1887 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1888 resets = <&cpg 318>;
1889 status = "disabled";
df863d6f
JM		 1890 };
1891
450d6079
HNA		 1892 fdp1@fe940000 {
1893 compatible = "renesas,fdp1";
1894 reg = <0 0xfe940000 0 0x2400>;
1895 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1896 clocks = <&cpg CPG_MOD 119>;
1897 power-domains = <&sysc R8A77965_PD_A3VP>;
1898 resets = <&cpg 119>;
1899 renesas,fcp = <&fcpf0>;
1900 };
1901
104243b2
KB		 1902 fcpf0: fcp@fe950000 {
1903 compatible = "renesas,fcpf";
1904 reg = <0 0xfe950000 0 0x200>;
1905 clocks = <&cpg CPG_MOD 615>;
1906 power-domains = <&sysc R8A77965_PD_A3VP>;
1907 resets = <&cpg 615>;
1908 };
1909
85cb3229
KB		 1910 vspb: vsp@fe960000 {
1911 compatible = "renesas,vsp2";
1912 reg = <0 0xfe960000 0 0x8000>;
1913 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1914 clocks = <&cpg CPG_MOD 626>;
1915 power-domains = <&sysc R8A77965_PD_A3VP>;
1916 resets = <&cpg 626>;
1917
1918 renesas,fcp = <&fcpvb0>;
1919 };
1920
104243b2
KB		 1921 fcpvb0: fcp@fe96f000 {
1922 compatible = "renesas,fcpv";
1923 reg = <0 0xfe96f000 0 0x200>;
1924 clocks = <&cpg CPG_MOD 607>;
1925 power-domains = <&sysc R8A77965_PD_A3VP>;
1926 resets = <&cpg 607>;
1927 };
1928
85cb3229
KB		 1929 vspi0: vsp@fe9a0000 {
1930 compatible = "renesas,vsp2";
1931 reg = <0 0xfe9a0000 0 0x8000>;
1932 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1933 clocks = <&cpg CPG_MOD 631>;
1934 power-domains = <&sysc R8A77965_PD_A3VP>;
1935 resets = <&cpg 631>;
1936
1937 renesas,fcp = <&fcpvi0>;
1938 };
1939
104243b2
KB		 1940 fcpvi0: fcp@fe9af000 {
1941 compatible = "renesas,fcpv";
1942 reg = <0 0xfe9af000 0 0x200>;
1943 clocks = <&cpg CPG_MOD 611>;
1944 power-domains = <&sysc R8A77965_PD_A3VP>;
1945 resets = <&cpg 611>;
1946 };
1947
85cb3229
KB		 1948 vspd0: vsp@fea20000 {
1949 compatible = "renesas,vsp2";
e21adc78 1950 reg = <0 0xfea20000 0 0x5000>;
85cb3229
KB		 1951 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1952 clocks = <&cpg CPG_MOD 623>;
1953 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1954 resets = <&cpg 623>;
1955
1956 renesas,fcp = <&fcpvd0>;
1957 };
1958
104243b2
KB		 1959 fcpvd0: fcp@fea27000 {
1960 compatible = "renesas,fcpv";
1961 reg = <0 0xfea27000 0 0x200>;
1962 clocks = <&cpg CPG_MOD 603>;
1963 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1964 resets = <&cpg 603>;
1965 };
1966
85cb3229
KB		 1967 vspd1: vsp@fea28000 {
1968 compatible = "renesas,vsp2";
e21adc78 1969 reg = <0 0xfea28000 0 0x5000>;
85cb3229
KB		 1970 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1971 clocks = <&cpg CPG_MOD 622>;
1972 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1973 resets = <&cpg 622>;
1974
1975 renesas,fcp = <&fcpvd1>;
1976 };
1977
104243b2
KB		 1978 fcpvd1: fcp@fea2f000 {
1979 compatible = "renesas,fcpv";
1980 reg = <0 0xfea2f000 0 0x200>;
1981 clocks = <&cpg CPG_MOD 602>;
1982 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1983 resets = <&cpg 602>;
1984 };
1985
2af6f5a3 1986 csi20: csi2@fea80000 {
98b6badf 1987 compatible = "renesas,r8a77965-csi2";
2af6f5a3 1988 reg = <0 0xfea80000 0 0x10000>;
98b6badf
NS		 1989 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1990 clocks = <&cpg CPG_MOD 714>;
1991 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1992 resets = <&cpg 714>;
1993 status = "disabled";
93b0e564 1994
2af6f5a3
YK		 1995 ports {
1996 #address-cells = <1>;
1997 #size-cells = <0>;
98b6badf
NS		 1998
1999 port@1 {
2000 #address-cells = <1>;
2001 #size-cells = <0>;
2002
2003 reg = <1>;
2004
2005 csi20vin0: endpoint@0 {
2006 reg = <0>;
2007 remote-endpoint = <&vin0csi20>;
2008 };
2009 csi20vin1: endpoint@1 {
2010 reg = <1>;
2011 remote-endpoint = <&vin1csi20>;
2012 };
2013 csi20vin2: endpoint@2 {
2014 reg = <2>;
2015 remote-endpoint = <&vin2csi20>;
2016 };
2017 csi20vin3: endpoint@3 {
2018 reg = <3>;
2019 remote-endpoint = <&vin3csi20>;
2020 };
2021 csi20vin4: endpoint@4 {
2022 reg = <4>;
2023 remote-endpoint = <&vin4csi20>;
2024 };
2025 csi20vin5: endpoint@5 {
2026 reg = <5>;
2027 remote-endpoint = <&vin5csi20>;
2028 };
2029 csi20vin6: endpoint@6 {
2030 reg = <6>;
2031 remote-endpoint = <&vin6csi20>;
2032 };
2033 csi20vin7: endpoint@7 {
2034 reg = <7>;
2035 remote-endpoint = <&vin7csi20>;
2036 };
2037 };
2af6f5a3 2038 };
93b0e564
TK		 2039 };
2040
2af6f5a3 2041 csi40: csi2@feaa0000 {
98b6badf 2042 compatible = "renesas,r8a77965-csi2";
2af6f5a3 2043 reg = <0 0xfeaa0000 0 0x10000>;
98b6badf
NS		 2044 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2045 clocks = <&cpg CPG_MOD 716>;
2046 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2047 resets = <&cpg 716>;
2048 status = "disabled";
93b0e564 2049
2af6f5a3
YK		 2050 ports {
2051 #address-cells = <1>;
2052 #size-cells = <0>;
98b6badf
NS		 2053
2054 port@1 {
2055 #address-cells = <1>;
2056 #size-cells = <0>;
2057
2058 reg = <1>;
2059
2060 csi40vin0: endpoint@0 {
2061 reg = <0>;
2062 remote-endpoint = <&vin0csi40>;
2063 };
2064 csi40vin1: endpoint@1 {
2065 reg = <1>;
2066 remote-endpoint = <&vin1csi40>;
2067 };
2068 csi40vin2: endpoint@2 {
2069 reg = <2>;
2070 remote-endpoint = <&vin2csi40>;
2071 };
2072 csi40vin3: endpoint@3 {
2073 reg = <3>;
2074 remote-endpoint = <&vin3csi40>;
2075 };
2076 csi40vin4: endpoint@4 {
2077 reg = <4>;
2078 remote-endpoint = <&vin4csi40>;
2079 };
2080 csi40vin5: endpoint@5 {
2081 reg = <5>;
2082 remote-endpoint = <&vin5csi40>;
2083 };
2084 csi40vin6: endpoint@6 {
2085 reg = <6>;
2086 remote-endpoint = <&vin6csi40>;
2087 };
2088 csi40vin7: endpoint@7 {
2089 reg = <7>;
2090 remote-endpoint = <&vin7csi40>;
2091 };
2092 };
2af6f5a3 2093 };
93b0e564
TK		 2094 };
2095
5daa6f9f
KB		 2096 hdmi0: hdmi@fead0000 {
2097 compatible = "renesas,r8a77965-hdmi",
2098 "renesas,rcar-gen3-hdmi";
2099 reg = <0 0xfead0000 0 0x10000>;
2100 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2101 clocks = <&cpg CPG_MOD 729>,
2102 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2103 clock-names = "iahb", "isfr";
2104 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2105 resets = <&cpg 729>;
2106 status = "disabled";
2107
2108 ports {
2109 #address-cells = <1>;
2110 #size-cells = <0>;
2111 port@0 {
2112 reg = <0>;
2113 dw_hdmi0_in: endpoint {
2114 remote-endpoint = <&du_out_hdmi0>;
2115 };
2116 };
2117 port@1 {
2118 reg = <1>;
2119 };
2120 };
2121 };
2122
df863d6f 2123 du: display@feb00000 {
2f2c71bf
KB		 2124 compatible = "renesas,du-r8a77965";
2125 reg = <0 0xfeb00000 0 0x80000>;
2126 reg-names = "du";
2127 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2128 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2129 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2130 clocks = <&cpg CPG_MOD 724>,
2131 <&cpg CPG_MOD 723>,
2132 <&cpg CPG_MOD 721>;
2133 clock-names = "du.0", "du.1", "du.3";
2134 status = "disabled";
2135
2136 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>;
df863d6f
JM		 2137
2138 ports {
ba8b5ad0
JM		 2139 #address-cells = <1>;
2140 #size-cells = <0>;
2141
df863d6f
JM		 2142 port@0 {
2143 reg = <0>;
2144 du_out_rgb: endpoint {
2145 };
2146 };
2147 port@1 {
2148 reg = <1>;
2149 du_out_hdmi0: endpoint {
5daa6f9f 2150 remote-endpoint = <&dw_hdmi0_in>;
df863d6f
JM		 2151 };
2152 };
2153 port@2 {
2154 reg = <2>;
2155 du_out_lvds0: endpoint {
2156 };
2157 };
2158 };
2159 };
2160
2af6f5a3
YK		 2161 prr: chipid@fff00044 {
2162 compatible = "renesas,prr";
2163 reg = <0 0xfff00044 0 4>;
df863d6f
JM		 2164 };
2165 };
001f3b03 2166
4c529600
NS		 2167 thermal-zones {
2168 sensor_thermal1: sensor-thermal1 {
2169 polling-delay-passive = <250>;
2170 polling-delay = <1000>;
2171 thermal-sensors = <&tsc 0>;
2172
2173 trips {
2174 sensor1_crit: sensor1-crit {
2175 temperature = <120000>;
2176 hysteresis = <1000>;
2177 type = "critical";
2178 };
2179 };
2180 };
2181
2182 sensor_thermal2: sensor-thermal2 {
2183 polling-delay-passive = <250>;
2184 polling-delay = <1000>;
2185 thermal-sensors = <&tsc 1>;
2186
2187 trips {
2188 sensor2_crit: sensor2-crit {
2189 temperature = <120000>;
2190 hysteresis = <1000>;
2191 type = "critical";
2192 };
2193 };
2194 };
2195
2196 sensor_thermal3: sensor-thermal3 {
2197 polling-delay-passive = <250>;
2198 polling-delay = <1000>;
2199 thermal-sensors = <&tsc 2>;
2200
2201 trips {
2202 sensor3_crit: sensor3-crit {
2203 temperature = <120000>;
2204 hysteresis = <1000>;
2205 type = "critical";
2206 };
2207 };
2208 };
2209 };
2210
ff550271
GU		 2211 timer {
2212 compatible = "arm,armv8-timer";
2213 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2214 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2215 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2216 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2217 };
2218
001f3b03
YK		 2219 /* External USB clocks - can be overridden by the board */
2220 usb3s0_clk: usb3s0 {
2221 compatible = "fixed-clock";
2222 #clock-cells = <0>;
2223 clock-frequency = <0>;
2224 };
2225
2226 usb_extal_clk: usb_extal {
2227 compatible = "fixed-clock";
2228 #clock-cells = <0>;
2229 clock-frequency = <0>;
2230 };
df863d6f 2231};
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