[mirror_ubuntu-bionic-kernel.git] / arch / arm64 / include / asm / alternative.h

#ifndef __ASM_ALTERNATIVE_H
#define __ASM_ALTERNATIVE_H

#ifndef __ASSEMBLY__

#include <linux/init.h>
#include <linux/kconfig.h>
#include <linux/types.h>
#include <linux/stddef.h>
#include <linux/stringify.h>

struct alt_instr {
	s32 orig_offset;	/* offset to original instruction */
	s32 alt_offset;		/* offset to replacement instruction */
	u16 cpufeature;		/* cpufeature bit set for replacement */
	u8  orig_len;		/* size of original instruction(s) */
	u8  alt_len;		/* size of new instruction(s), <= orig_len */
};

void __init apply_alternatives_all(void);
void apply_alternatives(void *start, size_t length);

#define ALTINSTR_ENTRY(feature)						      \
	" .word 661b - .\n"				/* label           */ \
	" .word 663f - .\n"				/* new instruction */ \
	" .hword " __stringify(feature) "\n"		/* feature bit     */ \
	" .byte 662b-661b\n"				/* source len      */ \
	" .byte 664f-663f\n"				/* replacement len */

/*
 * alternative assembly primitive:
 *
 * If any of these .org directive fail, it means that insn1 and insn2
 * don't have the same length. This used to be written as
 *
 * .if ((664b-663b) != (662b-661b))
 * 	.error "Alternatives instruction length mismatch"
 * .endif
 *
 * but most assemblers die if insn1 or insn2 have a .inst. This should
 * be fixed in a binutils release posterior to 2.25.51.0.2 (anything
 * containing commit 4e4d08cf7399b606 or c1baaddf8861).
 */
#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled)	\
	".if "__stringify(cfg_enabled)" == 1\n"				\
	"661:\n\t"							\
	oldinstr "\n"							\
	"662:\n"							\
	".pushsection .altinstructions,\"a\"\n"				\
	ALTINSTR_ENTRY(feature)						\
	".popsection\n"							\
	".pushsection .altinstr_replacement, \"a\"\n"			\
	"663:\n\t"							\
	newinstr "\n"							\
	"664:\n\t"							\
	".popsection\n\t"						\
	".org	. - (664b-663b) + (662b-661b)\n\t"			\
	".org	. - (662b-661b) + (664b-663b)\n"			\
	".endif\n"

#define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...)	\
	__ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg))

#else

.macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len
	.word \orig_offset - .
	.word \alt_offset - .
	.hword \feature
	.byte \orig_len
	.byte \alt_len
.endm

.macro alternative_insn insn1, insn2, cap, enable = 1
	.if \enable
661:	\insn1
662:	.pushsection .altinstructions, "a"
	altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f
	.popsection
	.pushsection .altinstr_replacement, "ax"
663:	\insn2
664:	.popsection
	.org	. - (664b-663b) + (662b-661b)
	.org	. - (662b-661b) + (664b-663b)
	.endif
.endm

/*
 * Begin an alternative code sequence.
 *
 * The code that follows this macro will be assembled and linked as
 * normal. There are no restrictions on this code.
 */
.macro alternative_if_not cap, enable = 1
	.if \enable
	.pushsection .altinstructions, "a"
	altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f
	.popsection
661:
	.endif
.endm

/*
 * Provide the alternative code sequence.
 *
 * The code that follows this macro is assembled into a special
 * section to be used for dynamic patching. Code that follows this
 * macro must:
 *
 * 1. Be exactly the same length (in bytes) as the default code
 *    sequence.
 *
 * 2. Not contain a branch target that is used outside of the
 *    alternative sequence it is defined in (branches into an
 *    alternative sequence are not fixed up).
 */
.macro alternative_else, enable = 1
	.if \enable
662:	.pushsection .altinstr_replacement, "ax"
663:
	.endif
.endm

/*
 * Complete an alternative code sequence.
 */
.macro alternative_endif, enable = 1
	.if \enable
664:	.popsection
	.org	. - (664b-663b) + (662b-661b)
	.org	. - (662b-661b) + (664b-663b)
	.endif
.endm

#define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...)	\
	alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)


#endif  /*  __ASSEMBLY__  */

/*
 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
 *
 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
 * N.B. If CONFIG_FOO is specified, but not selected, the whole block
 *      will be omitted, including oldinstr.
 */
#define ALTERNATIVE(oldinstr, newinstr, ...)   \
	_ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)

#endif /* __ASM_ALTERNATIVE_H */
Commit	Line	Data
e039ee4e AP	1	#ifndef __ASM_ALTERNATIVE_H
	2	#define __ASM_ALTERNATIVE_H
	3
8d883b23 MZ	4	#ifndef __ASSEMBLY__
8d883b23 MZ	5
ef5e724b	6	#include <linux/init.h>
91a5cefa	7	#include <linux/kconfig.h>
e039ee4e AP	8	#include <linux/types.h>
	9	#include <linux/stddef.h>
	10	#include <linux/stringify.h>
	11
	12	struct alt_instr {
	13	s32 orig_offset; /* offset to original instruction */
	14	s32 alt_offset; /* offset to replacement instruction */
	15	u16 cpufeature; /* cpufeature bit set for replacement */
	16	u8 orig_len; /* size of original instruction(s) */
	17	u8 alt_len; /* size of new instruction(s), <= orig_len */
	18	};
	19
ef5e724b	20	void __init apply_alternatives_all(void);
932ded4b	21	void apply_alternatives(void *start, size_t length);
e039ee4e AP	22
	23	#define ALTINSTR_ENTRY(feature) \
	24	" .word 661b - .\n" /* label */ \
	25	" .word 663f - .\n" /* new instruction */ \
	26	" .hword " __stringify(feature) "\n" /* feature bit */ \
	27	" .byte 662b-661b\n" /* source len */ \
	28	" .byte 664f-663f\n" /* replacement len */
	29
eb7c11ee MZ	30	/*
	31	* alternative assembly primitive:
	32	*
	33	* If any of these .org directive fail, it means that insn1 and insn2
	34	* don't have the same length. This used to be written as
	35	*
	36	* .if ((664b-663b) != (662b-661b))
	37	* .error "Alternatives instruction length mismatch"
	38	* .endif
	39	*
	40	* but most assemblers die if insn1 or insn2 have a .inst. This should
	41	* be fixed in a binutils release posterior to 2.25.51.0.2 (anything
	42	* containing commit 4e4d08cf7399b606 or c1baaddf8861).
	43	*/
91a5cefa JM	44	#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled) \
91a5cefa JM	45	".if "__stringify(cfg_enabled)" == 1\n" \
e039ee4e AP	46	"661:\n\t" \
	47	oldinstr "\n" \
	48	"662:\n" \
	49	".pushsection .altinstructions,\"a\"\n" \
	50	ALTINSTR_ENTRY(feature) \
	51	".popsection\n" \
	52	".pushsection .altinstr_replacement, \"a\"\n" \
	53	"663:\n\t" \
	54	newinstr "\n" \
	55	"664:\n\t" \
	56	".popsection\n\t" \
eb7c11ee	57	".org . - (664b-663b) + (662b-661b)\n\t" \
91a5cefa JM	58	".org . - (662b-661b) + (664b-663b)\n" \
	59	".endif\n"
	60
	61	#define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \
	62	__ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg))
e039ee4e	63
8d883b23 MZ	64	#else
	65
	66	.macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len
	67	.word \orig_offset - .
	68	.word \alt_offset - .
	69	.hword \feature
	70	.byte \orig_len
	71	.byte \alt_len
	72	.endm
	73
91a5cefa JM	74	.macro alternative_insn insn1, insn2, cap, enable = 1
91a5cefa JM	75	.if \enable
8d883b23 MZ	76	661: \insn1
	77	662: .pushsection .altinstructions, "a"
	78	altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f
	79	.popsection
	80	.pushsection .altinstr_replacement, "ax"
	81	663: \insn2
	82	664: .popsection
eb7c11ee MZ	83	.org . - (664b-663b) + (662b-661b)
eb7c11ee MZ	84	.org . - (662b-661b) + (664b-663b)
91a5cefa	85	.endif
8d883b23 MZ	86	.endm
8d883b23 MZ	87
63e40815 DT	88	/*
	89	* Begin an alternative code sequence.
	90	*
	91	* The code that follows this macro will be assembled and linked as
	92	* normal. There are no restrictions on this code.
	93	*/
77ee306c WD	94	.macro alternative_if_not cap, enable = 1
77ee306c WD	95	.if \enable
63e40815 DT	96	.pushsection .altinstructions, "a"
	97	altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f
	98	.popsection
	99	661:
77ee306c	100	.endif
63e40815 DT	101	.endm
	102
	103	/*
	104	* Provide the alternative code sequence.
	105	*
	106	* The code that follows this macro is assembled into a special
	107	* section to be used for dynamic patching. Code that follows this
	108	* macro must:
	109	*
	110	* 1. Be exactly the same length (in bytes) as the default code
	111	* sequence.
	112	*
	113	* 2. Not contain a branch target that is used outside of the
	114	* alternative sequence it is defined in (branches into an
	115	* alternative sequence are not fixed up).
	116	*/
77ee306c WD	117	.macro alternative_else, enable = 1
77ee306c WD	118	.if \enable
63e40815 DT	119	662: .pushsection .altinstr_replacement, "ax"
63e40815 DT	120	663:
77ee306c	121	.endif
63e40815 DT	122	.endm
	123
	124	/*
	125	* Complete an alternative code sequence.
	126	*/
77ee306c WD	127	.macro alternative_endif, enable = 1
77ee306c WD	128	.if \enable
63e40815 DT	129	664: .popsection
	130	.org . - (664b-663b) + (662b-661b)
	131	.org . - (662b-661b) + (664b-663b)
77ee306c	132	.endif
63e40815 DT	133	.endm
63e40815 DT	134
91a5cefa JM	135	#define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \
	136	alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)
	137
	138
8d883b23 MZ	139	#endif /* __ASSEMBLY__ */
8d883b23 MZ	140
91a5cefa JM	141	/*
	142	* Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
	143	*
	144	* Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
	145	* N.B. If CONFIG_FOO is specified, but not selected, the whole block
	146	* will be omitted, including oldinstr.
	147	*/
	148	#define ALTERNATIVE(oldinstr, newinstr, ...) \
	149	_ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
	150
e039ee4e	151	#endif /* __ASM_ALTERNATIVE_H */