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272d01bd CM |
1 | /* |
2 | * arch/arm64/include/asm/cpucaps.h | |
3 | * | |
4 | * Copyright (C) 2016 ARM Ltd. | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
17 | */ | |
18 | #ifndef __ASM_CPUCAPS_H | |
19 | #define __ASM_CPUCAPS_H | |
20 | ||
21 | #define ARM64_WORKAROUND_CLEAN_CACHE 0 | |
22 | #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1 | |
23 | #define ARM64_WORKAROUND_845719 2 | |
24 | #define ARM64_HAS_SYSREG_GIC_CPUIF 3 | |
25 | #define ARM64_HAS_PAN 4 | |
26 | #define ARM64_HAS_LSE_ATOMICS 5 | |
27 | #define ARM64_WORKAROUND_CAVIUM_23154 6 | |
28 | #define ARM64_WORKAROUND_834220 7 | |
29 | #define ARM64_HAS_NO_HW_PREFETCH 8 | |
30 | #define ARM64_HAS_UAO 9 | |
31 | #define ARM64_ALT_PAN_NOT_UAO 10 | |
32 | #define ARM64_HAS_VIRT_HOST_EXTN 11 | |
33 | #define ARM64_WORKAROUND_CAVIUM_27456 12 | |
34 | #define ARM64_HAS_32BIT_EL0 13 | |
71dcb8be | 35 | #define ARM64_HARDEN_EL2_VECTORS 14 |
880f7cc4 | 36 | #define ARM64_HAS_CNP 15 |
f4000cd9 | 37 | #define ARM64_HAS_NO_FPSIMD 16 |
d9ff80f8 | 38 | #define ARM64_WORKAROUND_REPEAT_TLBI 17 |
38fd94b0 | 39 | #define ARM64_WORKAROUND_QCOM_FALKOR_E1003 18 |
eeb1efbc | 40 | #define ARM64_WORKAROUND_858921 19 |
690a3415 | 41 | #define ARM64_WORKAROUND_CAVIUM_30115 20 |
d50e071f | 42 | #define ARM64_HAS_DCPOP 21 |
43994d82 | 43 | #define ARM64_SVE 22 |
ea1e3de8 | 44 | #define ARM64_UNMAP_KERNEL_AT_EL0 23 |
0f15adbb | 45 | #define ARM64_HARDEN_BRANCH_PREDICTOR 24 |
4bc352ff SD |
46 | #define ARM64_HAS_RAS_EXTN 25 |
47 | #define ARM64_WORKAROUND_843419 26 | |
48 | #define ARM64_HAS_CACHE_IDC 27 | |
49 | #define ARM64_HAS_CACHE_DIC 28 | |
50 | #define ARM64_HW_DBM 29 | |
a725e3dd | 51 | #define ARM64_SSBD 30 |
314d53d2 | 52 | #define ARM64_MISMATCHED_CACHE_TYPE 31 |
63198930 | 53 | #define ARM64_HAS_STAGE2_FWB 32 |
86d0dd34 | 54 | #define ARM64_HAS_CRC32 33 |
d71be2b6 | 55 | #define ARM64_SSBS 34 |
95b861a4 | 56 | #define ARM64_WORKAROUND_1188873 35 |
bd4fb6d2 | 57 | #define ARM64_HAS_SB 36 |
bc84a2d1 | 58 | #define ARM64_WORKAROUND_1165522 37 |
6984eb47 MR |
59 | #define ARM64_HAS_ADDRESS_AUTH_ARCH 38 |
60 | #define ARM64_HAS_ADDRESS_AUTH_IMP_DEF 39 | |
61 | #define ARM64_HAS_ADDRESS_AUTH 40 | |
62 | #define ARM64_HAS_GENERIC_AUTH_ARCH 41 | |
63 | #define ARM64_HAS_GENERIC_AUTH_IMP_DEF 42 | |
64 | #define ARM64_HAS_GENERIC_AUTH 43 | |
272d01bd | 65 | |
6984eb47 | 66 | #define ARM64_NCAPS 44 |
272d01bd CM |
67 | |
68 | #endif /* __ASM_CPUCAPS_H */ |