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3be1a5c4 AB |
1 | /* |
2 | * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org> | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | #ifndef __ASM_CPUFEATURE_H | |
10 | #define __ASM_CPUFEATURE_H | |
11 | ||
12 | #include <asm/hwcap.h> | |
13 | ||
14 | /* | |
15 | * In the arm64 world (as in the ARM world), elf_hwcap is used both internally | |
16 | * in the kernel and for user space to keep track of which optional features | |
17 | * are supported by the current system. So let's map feature 'x' to HWCAP_x. | |
18 | * Note that HWCAP_x constants are bit fields so we need to take the log. | |
19 | */ | |
20 | ||
21 | #define MAX_CPU_FEATURES (8 * sizeof(elf_hwcap)) | |
22 | #define cpu_feature(x) ilog2(HWCAP_ ## x) | |
23 | ||
5afaa1fc AP |
24 | #define ARM64_WORKAROUND_CLEAN_CACHE 0 |
25 | #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1 | |
905e8c5d | 26 | #define ARM64_WORKAROUND_845719 2 |
94a9e04a | 27 | #define ARM64_HAS_SYSREG_GIC_CPUIF 3 |
338d4f49 | 28 | #define ARM64_HAS_PAN 4 |
c739dc83 | 29 | #define ARM64_HAS_LSE_ATOMICS 5 |
301bcfac | 30 | |
d964b722 | 31 | #define ARM64_NCAPS 6 |
301bcfac AP |
32 | |
33 | #ifndef __ASSEMBLY__ | |
930da09f | 34 | |
144e9697 WD |
35 | #include <linux/kernel.h> |
36 | ||
359b7064 MZ |
37 | struct arm64_cpu_capabilities { |
38 | const char *desc; | |
39 | u16 capability; | |
40 | bool (*matches)(const struct arm64_cpu_capabilities *); | |
1c076303 | 41 | void (*enable)(void); |
359b7064 MZ |
42 | union { |
43 | struct { /* To be used for erratum handling only */ | |
44 | u32 midr_model; | |
45 | u32 midr_range_min, midr_range_max; | |
46 | }; | |
94a9e04a MZ |
47 | |
48 | struct { /* Feature register checking */ | |
18ffa046 JM |
49 | int field_pos; |
50 | int min_field_value; | |
94a9e04a | 51 | }; |
359b7064 MZ |
52 | }; |
53 | }; | |
54 | ||
06f9eb88 | 55 | extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS); |
930da09f | 56 | |
3be1a5c4 AB |
57 | static inline bool cpu_have_feature(unsigned int num) |
58 | { | |
59 | return elf_hwcap & (1UL << num); | |
60 | } | |
61 | ||
930da09f AP |
62 | static inline bool cpus_have_cap(unsigned int num) |
63 | { | |
06f9eb88 | 64 | if (num >= ARM64_NCAPS) |
930da09f AP |
65 | return false; |
66 | return test_bit(num, cpu_hwcaps); | |
67 | } | |
68 | ||
69 | static inline void cpus_set_cap(unsigned int num) | |
70 | { | |
06f9eb88 | 71 | if (num >= ARM64_NCAPS) |
930da09f | 72 | pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n", |
06f9eb88 | 73 | num, ARM64_NCAPS); |
930da09f AP |
74 | else |
75 | __set_bit(num, cpu_hwcaps); | |
76 | } | |
77 | ||
79b0e09a JM |
78 | static inline int __attribute_const__ cpuid_feature_extract_field(u64 features, |
79 | int field) | |
80 | { | |
81 | return (s64)(features << (64 - 4 - field)) >> (64 - 4); | |
82 | } | |
83 | ||
84 | ||
359b7064 MZ |
85 | void check_cpu_capabilities(const struct arm64_cpu_capabilities *caps, |
86 | const char *info); | |
e116a375 | 87 | void check_local_cpu_errata(void); |
359b7064 | 88 | void check_local_cpu_features(void); |
04597a65 SP |
89 | bool cpu_supports_mixed_endian_el0(void); |
90 | bool system_supports_mixed_endian_el0(void); | |
e116a375 | 91 | |
301bcfac AP |
92 | #endif /* __ASSEMBLY__ */ |
93 | ||
3be1a5c4 | 94 | #endif |