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9cce7a43 CM |
1 | /* |
2 | * Copyright (C) 2012 ARM Ltd. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License | |
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | #ifndef __ASM_CPUTYPE_H | |
17 | #define __ASM_CPUTYPE_H | |
18 | ||
19 | #define ID_MIDR_EL1 "midr_el1" | |
d9c1951f | 20 | #define ID_MPIDR_EL1 "mpidr_el1" |
9cce7a43 CM |
21 | #define ID_CTR_EL0 "ctr_el0" |
22 | ||
23 | #define ID_AA64PFR0_EL1 "id_aa64pfr0_el1" | |
24 | #define ID_AA64DFR0_EL1 "id_aa64dfr0_el1" | |
25 | #define ID_AA64AFR0_EL1 "id_aa64afr0_el1" | |
26 | #define ID_AA64ISAR0_EL1 "id_aa64isar0_el1" | |
27 | #define ID_AA64MMFR0_EL1 "id_aa64mmfr0_el1" | |
28 | ||
3e98fdac JM |
29 | #define INVALID_HWID ULONG_MAX |
30 | ||
4c7aa002 JM |
31 | #define MPIDR_HWID_BITMASK 0xff00ffffff |
32 | ||
9cce7a43 CM |
33 | #define read_cpuid(reg) ({ \ |
34 | u64 __val; \ | |
35 | asm("mrs %0, " reg : "=r" (__val)); \ | |
36 | __val; \ | |
37 | }) | |
38 | ||
d9c1951f MZ |
39 | #define ARM_CPU_IMP_ARM 0x41 |
40 | ||
41 | #define ARM_CPU_PART_AEM_V8 0xD0F0 | |
42 | #define ARM_CPU_PART_FOUNDATION 0xD000 | |
43 | #define ARM_CPU_PART_CORTEX_A57 0xD070 | |
44 | ||
0359b0e2 JM |
45 | #ifndef __ASSEMBLY__ |
46 | ||
9cce7a43 CM |
47 | /* |
48 | * The CPU ID never changes at run time, so we might as well tell the | |
49 | * compiler that it's constant. Use this function to read the CPU ID | |
50 | * rather than directly reading processor_id or read_cpuid() directly. | |
51 | */ | |
52 | static inline u32 __attribute_const__ read_cpuid_id(void) | |
53 | { | |
54 | return read_cpuid(ID_MIDR_EL1); | |
55 | } | |
56 | ||
d9c1951f MZ |
57 | static inline u64 __attribute_const__ read_cpuid_mpidr(void) |
58 | { | |
59 | return read_cpuid(ID_MPIDR_EL1); | |
60 | } | |
61 | ||
62 | static inline unsigned int __attribute_const__ read_cpuid_implementor(void) | |
63 | { | |
64 | return (read_cpuid_id() & 0xFF000000) >> 24; | |
65 | } | |
66 | ||
67 | static inline unsigned int __attribute_const__ read_cpuid_part_number(void) | |
68 | { | |
69 | return (read_cpuid_id() & 0xFFF0); | |
70 | } | |
71 | ||
9cce7a43 CM |
72 | static inline u32 __attribute_const__ read_cpuid_cachetype(void) |
73 | { | |
74 | return read_cpuid(ID_CTR_EL0); | |
75 | } | |
76 | ||
0359b0e2 JM |
77 | #endif /* __ASSEMBLY__ */ |
78 | ||
9cce7a43 | 79 | #endif |