[mirror_ubuntu-artful-kernel.git] / arch / arm64 / include / asm / debug-monitors.h

/*
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#ifndef __ASM_DEBUG_MONITORS_H
#define __ASM_DEBUG_MONITORS_H

#ifdef __KERNEL__

#include <asm/insn.h>

/* Low-level stepping controls. */
#define DBG_MDSCR_SS		(1 << 0)
#define DBG_SPSR_SS		(1 << 21)

/* MDSCR_EL1 enabling bits */
#define DBG_MDSCR_KDE		(1 << 13)
#define DBG_MDSCR_MDE		(1 << 15)
#define DBG_MDSCR_MASK		~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)

#define	DBG_ESR_EVT(x)		(((x) >> 27) & 0x7)

/* AArch64 */
#define DBG_ESR_EVT_HWBP	0x0
#define DBG_ESR_EVT_HWSS	0x1
#define DBG_ESR_EVT_HWWP	0x2
#define DBG_ESR_EVT_BRK		0x6

/*
 * Break point instruction encoding
 */
#define BREAK_INSTR_SIZE		AARCH64_INSN_SIZE

/*
 * ESR values expected for dynamic and compile time BRK instruction
 */
#define DBG_ESR_VAL_BRK(x)	(0xf2000000 | ((x) & 0xffff))

/*
 * #imm16 values used for BRK instruction generation
 * Allowed values for kgbd are 0x400 - 0x7ff
 * 0x100: for triggering a fault on purpose (reserved)
 * 0x400: for dynamic BRK instruction
 * 0x401: for compile time BRK instruction
 */
#define FAULT_BRK_IMM			0x100
#define KGDB_DYN_DBG_BRK_IMM		0x400
#define KGDB_COMPILED_DBG_BRK_IMM	0x401

/*
 * BRK instruction encoding
 * The #imm16 value should be placed at bits[20:5] within BRK ins
 */
#define AARCH64_BREAK_MON	0xd4200000

/*
 * BRK instruction for provoking a fault on purpose
 * Unlike kgdb, #imm16 value with unallocated handler is used for faulting.
 */
#define AARCH64_BREAK_FAULT	(AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5))

/*
 * Extract byte from BRK instruction
 */
#define KGDB_DYN_DBG_BRK_INS_BYTE(x) \
	((((AARCH64_BREAK_MON) & 0xffe0001f) >> (x * 8)) & 0xff)

/*
 * Extract byte from BRK #imm16
 */
#define KGBD_DYN_DBG_BRK_IMM_BYTE(x) \
	(((((KGDB_DYN_DBG_BRK_IMM) & 0xffff) << 5) >> (x * 8)) & 0xff)

#define KGDB_DYN_DBG_BRK_BYTE(x) \
	(KGDB_DYN_DBG_BRK_INS_BYTE(x) | KGBD_DYN_DBG_BRK_IMM_BYTE(x))

#define  KGDB_DYN_BRK_INS_BYTE0  KGDB_DYN_DBG_BRK_BYTE(0)
#define  KGDB_DYN_BRK_INS_BYTE1  KGDB_DYN_DBG_BRK_BYTE(1)
#define  KGDB_DYN_BRK_INS_BYTE2  KGDB_DYN_DBG_BRK_BYTE(2)
#define  KGDB_DYN_BRK_INS_BYTE3  KGDB_DYN_DBG_BRK_BYTE(3)

#define CACHE_FLUSH_IS_SAFE		1

/* AArch32 */
#define DBG_ESR_EVT_BKPT	0x4
#define DBG_ESR_EVT_VECC	0x5

#define AARCH32_BREAK_ARM	0x07f001f0
#define AARCH32_BREAK_THUMB	0xde01
#define AARCH32_BREAK_THUMB2_LO	0xf7f0
#define AARCH32_BREAK_THUMB2_HI	0xa000

#ifndef __ASSEMBLY__
struct task_struct;

#define DBG_ARCH_ID_RESERVED	0	/* In case of ptrace ABI updates. */

#define DBG_HOOK_HANDLED	0
#define DBG_HOOK_ERROR		1

struct step_hook {
	struct list_head node;
	int (*fn)(struct pt_regs *regs, unsigned int esr);
};

void register_step_hook(struct step_hook *hook);
void unregister_step_hook(struct step_hook *hook);

struct break_hook {
	struct list_head node;
	u32 esr_val;
	u32 esr_mask;
	int (*fn)(struct pt_regs *regs, unsigned int esr);
};

void register_break_hook(struct break_hook *hook);
void unregister_break_hook(struct break_hook *hook);

u8 debug_monitors_arch(void);

enum debug_el {
	DBG_ACTIVE_EL0 = 0,
	DBG_ACTIVE_EL1,
};

void enable_debug_monitors(enum debug_el el);
void disable_debug_monitors(enum debug_el el);

void user_rewind_single_step(struct task_struct *task);
void user_fastforward_single_step(struct task_struct *task);

void kernel_enable_single_step(struct pt_regs *regs);
void kernel_disable_single_step(void);
int kernel_active_single_step(void);

#ifdef CONFIG_HAVE_HW_BREAKPOINT
int reinstall_suspended_bps(struct pt_regs *regs);
#else
static inline int reinstall_suspended_bps(struct pt_regs *regs)
{
	return -ENODEV;
}
#endif

int aarch32_break_handler(struct pt_regs *regs);

#endif	/* __ASSEMBLY */
#endif	/* __KERNEL__ */
#endif	/* __ASM_DEBUG_MONITORS_H */
Commit	Line	Data
478fcb2c WD	1	/*
	2	* Copyright (C) 2012 ARM Ltd.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*
	13	* You should have received a copy of the GNU General Public License
	14	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	15	*/
	16	#ifndef __ASM_DEBUG_MONITORS_H
	17	#define __ASM_DEBUG_MONITORS_H
	18
	19	#ifdef __KERNEL__
	20
951757ae DM	21	#include <asm/insn.h>
951757ae DM	22
51ba2481 MZ	23	/* Low-level stepping controls. */
	24	#define DBG_MDSCR_SS (1 << 0)
	25	#define DBG_SPSR_SS (1 << 21)
	26
	27	/* MDSCR_EL1 enabling bits */
	28	#define DBG_MDSCR_KDE (1 << 13)
	29	#define DBG_MDSCR_MDE (1 << 15)
	30	#define DBG_MDSCR_MASK ~(DBG_MDSCR_KDE \| DBG_MDSCR_MDE)
	31
478fcb2c WD	32	#define DBG_ESR_EVT(x) (((x) >> 27) & 0x7)
	33
	34	/* AArch64 */
	35	#define DBG_ESR_EVT_HWBP 0x0
	36	#define DBG_ESR_EVT_HWSS 0x1
	37	#define DBG_ESR_EVT_HWWP 0x2
	38	#define DBG_ESR_EVT_BRK 0x6
	39
bcf5763b VK	40	/*
	41	* Break point instruction encoding
	42	*/
951757ae	43	#define BREAK_INSTR_SIZE AARCH64_INSN_SIZE
bcf5763b VK	44
	45	/*
	46	* ESR values expected for dynamic and compile time BRK instruction
	47	*/
dfac6831	48	#define DBG_ESR_VAL_BRK(x) (0xf2000000 \| ((x) & 0xffff))
bcf5763b VK	49
	50	/*
	51	* #imm16 values used for BRK instruction generation
	52	* Allowed values for kgbd are 0x400 - 0x7ff
a9ae04c9	53	* 0x100: for triggering a fault on purpose (reserved)
bcf5763b VK	54	* 0x400: for dynamic BRK instruction
	55	* 0x401: for compile time BRK instruction
	56	*/
a9ae04c9	57	#define FAULT_BRK_IMM 0x100
7acf71d1 CM	58	#define KGDB_DYN_DBG_BRK_IMM 0x400
7acf71d1 CM	59	#define KGDB_COMPILED_DBG_BRK_IMM 0x401
bcf5763b VK	60
	61	/*
	62	* BRK instruction encoding
	63	* The #imm16 value should be placed at bits[20:5] within BRK ins
	64	*/
	65	#define AARCH64_BREAK_MON 0xd4200000
	66
a9ae04c9 MB	67	/*
	68	* BRK instruction for provoking a fault on purpose
	69	* Unlike kgdb, #imm16 value with unallocated handler is used for faulting.
	70	*/
	71	#define AARCH64_BREAK_FAULT (AARCH64_BREAK_MON \| (FAULT_BRK_IMM << 5))
	72
bcf5763b VK	73	/*
	74	* Extract byte from BRK instruction
	75	*/
7acf71d1	76	#define KGDB_DYN_DBG_BRK_INS_BYTE(x) \
bcf5763b VK	77	((((AARCH64_BREAK_MON) & 0xffe0001f) >> (x * 8)) & 0xff)
	78
	79	/*
	80	* Extract byte from BRK #imm16
	81	*/
7acf71d1 CM	82	#define KGBD_DYN_DBG_BRK_IMM_BYTE(x) \
7acf71d1 CM	83	(((((KGDB_DYN_DBG_BRK_IMM) & 0xffff) << 5) >> (x * 8)) & 0xff)
bcf5763b	84
7acf71d1 CM	85	#define KGDB_DYN_DBG_BRK_BYTE(x) \
7acf71d1 CM	86	(KGDB_DYN_DBG_BRK_INS_BYTE(x) \| KGBD_DYN_DBG_BRK_IMM_BYTE(x))
bcf5763b	87
7acf71d1 CM	88	#define KGDB_DYN_BRK_INS_BYTE0 KGDB_DYN_DBG_BRK_BYTE(0)
	89	#define KGDB_DYN_BRK_INS_BYTE1 KGDB_DYN_DBG_BRK_BYTE(1)
	90	#define KGDB_DYN_BRK_INS_BYTE2 KGDB_DYN_DBG_BRK_BYTE(2)
	91	#define KGDB_DYN_BRK_INS_BYTE3 KGDB_DYN_DBG_BRK_BYTE(3)
bcf5763b VK	92
	93	#define CACHE_FLUSH_IS_SAFE 1
	94
478fcb2c WD	95	/* AArch32 */
	96	#define DBG_ESR_EVT_BKPT 0x4
	97	#define DBG_ESR_EVT_VECC 0x5
	98
	99	#define AARCH32_BREAK_ARM 0x07f001f0
	100	#define AARCH32_BREAK_THUMB 0xde01
	101	#define AARCH32_BREAK_THUMB2_LO 0xf7f0
	102	#define AARCH32_BREAK_THUMB2_HI 0xa000
	103
	104	#ifndef __ASSEMBLY__
	105	struct task_struct;
	106
478fcb2c WD	107	#define DBG_ARCH_ID_RESERVED 0 /* In case of ptrace ABI updates. */
478fcb2c WD	108
ee6214ce SP	109	#define DBG_HOOK_HANDLED 0
	110	#define DBG_HOOK_ERROR 1
	111
	112	struct step_hook {
	113	struct list_head node;
	114	int (fn)(struct pt_regs regs, unsigned int esr);
	115	};
	116
	117	void register_step_hook(struct step_hook *hook);
	118	void unregister_step_hook(struct step_hook *hook);
	119
	120	struct break_hook {
	121	struct list_head node;
	122	u32 esr_val;
	123	u32 esr_mask;
	124	int (fn)(struct pt_regs regs, unsigned int esr);
	125	};
	126
	127	void register_break_hook(struct break_hook *hook);
	128	void unregister_break_hook(struct break_hook *hook);
	129
478fcb2c WD	130	u8 debug_monitors_arch(void);
478fcb2c WD	131
51ba2481 MZ	132	enum debug_el {
	133	DBG_ACTIVE_EL0 = 0,
	134	DBG_ACTIVE_EL1,
	135	};
	136
478fcb2c WD	137	void enable_debug_monitors(enum debug_el el);
	138	void disable_debug_monitors(enum debug_el el);
	139
	140	void user_rewind_single_step(struct task_struct *task);
	141	void user_fastforward_single_step(struct task_struct *task);
	142
	143	void kernel_enable_single_step(struct pt_regs *regs);
	144	void kernel_disable_single_step(void);
	145	int kernel_active_single_step(void);
	146
	147	#ifdef CONFIG_HAVE_HW_BREAKPOINT
	148	int reinstall_suspended_bps(struct pt_regs *regs);
	149	#else
	150	static inline int reinstall_suspended_bps(struct pt_regs *regs)
	151	{
	152	return -ENODEV;
	153	}
	154	#endif
	155
1442b6ed	156	int aarch32_break_handler(struct pt_regs *regs);
1442b6ed	157
478fcb2c WD	158	#endif /* __ASSEMBLY */
	159	#endif /* __KERNEL__ */
	160	#endif /* __ASM_DEBUG_MONITORS_H */