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09b55412 CM |
1 | /* |
2 | * Copyright (C) 2012 ARM Ltd. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License | |
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | #ifndef __ASM_DMA_MAPPING_H | |
17 | #define __ASM_DMA_MAPPING_H | |
18 | ||
19 | #ifdef __KERNEL__ | |
20 | ||
21 | #include <linux/types.h> | |
22 | #include <linux/vmalloc.h> | |
23 | ||
58c8b269 SS |
24 | #include <xen/xen.h> |
25 | #include <asm/xen/hypervisor.h> | |
26 | ||
25b719d7 | 27 | #define DMA_ERROR_CODE (~(dma_addr_t)0) |
5299709d | 28 | extern const struct dma_map_ops dummy_dma_ops; |
09b55412 | 29 | |
5299709d | 30 | static inline const struct dma_map_ops *__generic_dma_ops(struct device *dev) |
09b55412 | 31 | { |
5657933d BVA |
32 | if (dev && dev->dma_ops) |
33 | return dev->dma_ops; | |
b6197b93 SS |
34 | |
35 | /* | |
1dccb598 AB |
36 | * We expect no ISA devices, and all other DMA masters are expected to |
37 | * have someone call arch_setup_dma_ops at device creation time. | |
b6197b93 SS |
38 | */ |
39 | return &dummy_dma_ops; | |
09b55412 CM |
40 | } |
41 | ||
815dd187 | 42 | static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) |
58c8b269 SS |
43 | { |
44 | if (xen_initial_domain()) | |
45 | return xen_dma_ops; | |
46 | else | |
815dd187 | 47 | return __generic_dma_ops(NULL); |
58c8b269 SS |
48 | } |
49 | ||
876945db | 50 | void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, |
53c92d79 | 51 | const struct iommu_ops *iommu, bool coherent); |
31dde116 | 52 | #define arch_setup_dma_ops arch_setup_dma_ops |
21890647 | 53 | |
876945db RM |
54 | #ifdef CONFIG_IOMMU_DMA |
55 | void arch_teardown_dma_ops(struct device *dev); | |
56 | #define arch_teardown_dma_ops arch_teardown_dma_ops | |
57 | #endif | |
58 | ||
de7ee503 SS |
59 | /* do not use this function in a driver */ |
60 | static inline bool is_device_dma_coherent(struct device *dev) | |
61 | { | |
9d3bfbb4 CM |
62 | if (!dev) |
63 | return false; | |
de7ee503 SS |
64 | return dev->archdata.dma_coherent; |
65 | } | |
66 | ||
09b55412 CM |
67 | static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) |
68 | { | |
1a9a0536 AG |
69 | dma_addr_t dev_addr = (dma_addr_t)paddr; |
70 | ||
71 | return dev_addr - ((dma_addr_t)dev->dma_pfn_offset << PAGE_SHIFT); | |
09b55412 CM |
72 | } |
73 | ||
74 | static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr) | |
75 | { | |
1a9a0536 AG |
76 | phys_addr_t paddr = (phys_addr_t)dev_addr; |
77 | ||
78 | return paddr + ((phys_addr_t)dev->dma_pfn_offset << PAGE_SHIFT); | |
09b55412 CM |
79 | } |
80 | ||
09b55412 CM |
81 | static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) |
82 | { | |
83 | if (!dev->dma_mask) | |
cc3979b5 | 84 | return false; |
09b55412 CM |
85 | |
86 | return addr + size - 1 <= *dev->dma_mask; | |
87 | } | |
88 | ||
89 | static inline void dma_mark_clean(void *addr, size_t size) | |
90 | { | |
91 | } | |
92 | ||
1a9a0536 AG |
93 | /* Override for dma_max_pfn() */ |
94 | static inline unsigned long dma_max_pfn(struct device *dev) | |
95 | { | |
96 | dma_addr_t dma_max = (dma_addr_t)*dev->dma_mask; | |
97 | ||
98 | return (ulong)dma_to_phys(dev, dma_max) >> PAGE_SHIFT; | |
99 | } | |
100 | #define dma_max_pfn(dev) dma_max_pfn(dev) | |
101 | ||
09b55412 CM |
102 | #endif /* __KERNEL__ */ |
103 | #endif /* __ASM_DMA_MAPPING_H */ |