projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 5c1ce6f7 MZ |
1 | /* |
| 2 | * Copyright (C) 2013 - ARM Ltd | |
| 3 | * Author: Marc Zyngier <marc.zyngier@arm.com> | |
| 4 | * | |
| 5 | * This program is free software; you can redistribute it and/or modify | |
| 6 | * it under the terms of the GNU General Public License version 2 as | |
| 7 | * published by the Free Software Foundation. | |
| 8 | * | |
| 9 | * This program is distributed in the hope that it will be useful, | |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 12 | * GNU General Public License for more details. | |
| 13 | * | |
| 14 | * You should have received a copy of the GNU General Public License | |
| 15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
| 16 | */ | |
| 17 | ||
| 18 | #ifndef __ASM_ESR_H | |
| 19 | #define __ASM_ESR_H | |
| 20 | ||
| 9141300a CM |
21 | #define ESR_EL1_WRITE (1 << 6) |
| 22 | #define ESR_EL1_CM (1 << 8) | |
| 23 | #define ESR_EL1_IL (1 << 25) | |
| 5c1ce6f7 | 24 | |
| 9141300a | 25 | #define ESR_EL1_EC_SHIFT (26) |
| 5c1ce6f7 MZ |
26 | #define ESR_EL1_EC_UNKNOWN (0x00) |
| 27 | #define ESR_EL1_EC_WFI (0x01) | |
| 28 | #define ESR_EL1_EC_CP15_32 (0x03) | |
| 29 | #define ESR_EL1_EC_CP15_64 (0x04) | |
| 30 | #define ESR_EL1_EC_CP14_MR (0x05) | |
| 31 | #define ESR_EL1_EC_CP14_LS (0x06) | |
| 32 | #define ESR_EL1_EC_FP_ASIMD (0x07) | |
| 33 | #define ESR_EL1_EC_CP10_ID (0x08) | |
| 34 | #define ESR_EL1_EC_CP14_64 (0x0C) | |
| 35 | #define ESR_EL1_EC_ILL_ISS (0x0E) | |
| 36 | #define ESR_EL1_EC_SVC32 (0x11) | |
| 37 | #define ESR_EL1_EC_SVC64 (0x15) | |
| 38 | #define ESR_EL1_EC_SYS64 (0x18) | |
| 39 | #define ESR_EL1_EC_IABT_EL0 (0x20) | |
| 40 | #define ESR_EL1_EC_IABT_EL1 (0x21) | |
| 41 | #define ESR_EL1_EC_PC_ALIGN (0x22) | |
| 42 | #define ESR_EL1_EC_DABT_EL0 (0x24) | |
| 43 | #define ESR_EL1_EC_DABT_EL1 (0x25) | |
| 44 | #define ESR_EL1_EC_SP_ALIGN (0x26) | |
| 45 | #define ESR_EL1_EC_FP_EXC32 (0x28) | |
| 46 | #define ESR_EL1_EC_FP_EXC64 (0x2C) | |
| bfb67a56 | 47 | #define ESR_EL1_EC_SERROR (0x2F) |
| 5c1ce6f7 MZ |
48 | #define ESR_EL1_EC_BREAKPT_EL0 (0x30) |
| 49 | #define ESR_EL1_EC_BREAKPT_EL1 (0x31) | |
| 50 | #define ESR_EL1_EC_SOFTSTP_EL0 (0x32) | |
| 51 | #define ESR_EL1_EC_SOFTSTP_EL1 (0x33) | |
| 52 | #define ESR_EL1_EC_WATCHPT_EL0 (0x34) | |
| 53 | #define ESR_EL1_EC_WATCHPT_EL1 (0x35) | |
| 54 | #define ESR_EL1_EC_BKPT32 (0x38) | |
| 55 | #define ESR_EL1_EC_BRK64 (0x3C) | |
| 56 | ||
| 57 | #endif /* __ASM_ESR_H */ |