[mirror_ubuntu-jammy-kernel.git] / arch / arm64 / include / asm / futex.h

/*
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#ifndef __ASM_FUTEX_H
#define __ASM_FUTEX_H

#ifdef __KERNEL__

#include <linux/futex.h>
#include <linux/uaccess.h>
#include <asm/errno.h>

#define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg)		\
	asm volatile(							\
"1:	ldxr	%w1, %2\n"						\
	insn "\n"							\
"2:	stlxr	%w3, %w0, %2\n"						\
"	cbnz	%w3, 1b\n"						\
"	dmb	ish\n"							\
"3:\n"									\
"	.pushsection .fixup,\"ax\"\n"					\
"	.align	2\n"							\
"4:	mov	%w0, %w5\n"						\
"	b	3b\n"							\
"	.popsection\n"							\
"	.pushsection __ex_table,\"a\"\n"				\
"	.align	3\n"							\
"	.quad	1b, 4b, 2b, 4b\n"					\
"	.popsection\n"							\
	: "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp)	\
	: "r" (oparg), "Ir" (-EFAULT)					\
	: "memory")

static inline int
futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
{
	int op = (encoded_op >> 28) & 7;
	int cmp = (encoded_op >> 24) & 15;
	int oparg = (encoded_op << 8) >> 20;
	int cmparg = (encoded_op << 20) >> 20;
	int oldval = 0, ret, tmp;

	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
		oparg = 1 << oparg;

	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
		return -EFAULT;

	pagefault_disable();	/* implies preempt_disable() */

	switch (op) {
	case FUTEX_OP_SET:
		__futex_atomic_op("mov	%w0, %w4",
				  ret, oldval, uaddr, tmp, oparg);
		break;
	case FUTEX_OP_ADD:
		__futex_atomic_op("add	%w0, %w1, %w4",
				  ret, oldval, uaddr, tmp, oparg);
		break;
	case FUTEX_OP_OR:
		__futex_atomic_op("orr	%w0, %w1, %w4",
				  ret, oldval, uaddr, tmp, oparg);
		break;
	case FUTEX_OP_ANDN:
		__futex_atomic_op("and	%w0, %w1, %w4",
				  ret, oldval, uaddr, tmp, ~oparg);
		break;
	case FUTEX_OP_XOR:
		__futex_atomic_op("eor	%w0, %w1, %w4",
				  ret, oldval, uaddr, tmp, oparg);
		break;
	default:
		ret = -ENOSYS;
	}

	pagefault_enable();	/* subsumes preempt_enable() */

	if (!ret) {
		switch (cmp) {
		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
		default: ret = -ENOSYS;
		}
	}
	return ret;
}

static inline int
futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
			      u32 oldval, u32 newval)
{
	int ret = 0;
	u32 val, tmp;

	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
		return -EFAULT;

	asm volatile("// futex_atomic_cmpxchg_inatomic\n"
"1:	ldxr	%w1, %2\n"
"	sub	%w3, %w1, %w4\n"
"	cbnz	%w3, 3f\n"
"2:	stlxr	%w3, %w5, %2\n"
"	cbnz	%w3, 1b\n"
"	dmb	ish\n"
"3:\n"
"	.pushsection .fixup,\"ax\"\n"
"4:	mov	%w0, %w6\n"
"	b	3b\n"
"	.popsection\n"
"	.pushsection __ex_table,\"a\"\n"
"	.align	3\n"
"	.quad	1b, 4b, 2b, 4b\n"
"	.popsection\n"
	: "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
	: "r" (oldval), "r" (newval), "Ir" (-EFAULT)
	: "memory");

	*uval = val;
	return ret;
}

#endif /* __KERNEL__ */
#endif /* __ASM_FUTEX_H */
Commit	Line	Data
6170a974 CM	1	/*
	2	* Copyright (C) 2012 ARM Ltd.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*
	13	* You should have received a copy of the GNU General Public License
	14	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	15	*/
	16	#ifndef __ASM_FUTEX_H
	17	#define __ASM_FUTEX_H
	18
	19	#ifdef __KERNEL__
	20
	21	#include <linux/futex.h>
	22	#include <linux/uaccess.h>
	23	#include <asm/errno.h>
	24
	25	#define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \
	26	asm volatile( \
8e86f0b4	27	"1: ldxr %w1, %2\n" \
6170a974 CM	28	insn "\n" \
	29	"2: stlxr %w3, %w0, %2\n" \
	30	" cbnz %w3, 1b\n" \
8e86f0b4	31	" dmb ish\n" \
6170a974 CM	32	"3:\n" \
6170a974 CM	33	" .pushsection .fixup,\"ax\"\n" \
4da7a56c	34	" .align 2\n" \
6170a974 CM	35	"4: mov %w0, %w5\n" \
	36	" b 3b\n" \
	37	" .popsection\n" \
	38	" .pushsection __ex_table,\"a\"\n" \
	39	" .align 3\n" \
	40	" .quad 1b, 4b, 2b, 4b\n" \
	41	" .popsection\n" \
	42	: "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \
	43	: "r" (oparg), "Ir" (-EFAULT) \
95c41896	44	: "memory")
6170a974 CM	45
	46	static inline int
	47	futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
	48	{
	49	int op = (encoded_op >> 28) & 7;
	50	int cmp = (encoded_op >> 24) & 15;
	51	int oparg = (encoded_op << 8) >> 20;
	52	int cmparg = (encoded_op << 20) >> 20;
	53	int oldval = 0, ret, tmp;
	54
	55	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
	56	oparg = 1 << oparg;
	57
	58	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
	59	return -EFAULT;
	60
	61	pagefault_disable(); /* implies preempt_disable() */
	62
	63	switch (op) {
	64	case FUTEX_OP_SET:
	65	__futex_atomic_op("mov %w0, %w4",
	66	ret, oldval, uaddr, tmp, oparg);
	67	break;
	68	case FUTEX_OP_ADD:
	69	__futex_atomic_op("add %w0, %w1, %w4",
	70	ret, oldval, uaddr, tmp, oparg);
	71	break;
	72	case FUTEX_OP_OR:
	73	__futex_atomic_op("orr %w0, %w1, %w4",
	74	ret, oldval, uaddr, tmp, oparg);
	75	break;
	76	case FUTEX_OP_ANDN:
	77	__futex_atomic_op("and %w0, %w1, %w4",
	78	ret, oldval, uaddr, tmp, ~oparg);
	79	break;
	80	case FUTEX_OP_XOR:
	81	__futex_atomic_op("eor %w0, %w1, %w4",
	82	ret, oldval, uaddr, tmp, oparg);
	83	break;
	84	default:
	85	ret = -ENOSYS;
	86	}
	87
	88	pagefault_enable(); /* subsumes preempt_enable() */
	89
	90	if (!ret) {
	91	switch (cmp) {
	92	case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
	93	case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
	94	case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
	95	case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
	96	case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
	97	case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
	98	default: ret = -ENOSYS;
	99	}
	100	}
	101	return ret;
	102	}
	103
	104	static inline int
	105	futex_atomic_cmpxchg_inatomic(u32 uval, u32 __user uaddr,
	106	u32 oldval, u32 newval)
	107	{
	108	int ret = 0;
109	u32 val, tmp;
110
111	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
112	return -EFAULT;
113
114	asm volatile("// futex_atomic_cmpxchg_inatomic\n"
8e86f0b4	115	"1: ldxr %w1, %2\n"
6170a974 CM	116	" sub %w3, %w1, %w4\n"
	117	" cbnz %w3, 3f\n"
	118	"2: stlxr %w3, %w5, %2\n"
	119	" cbnz %w3, 1b\n"
8e86f0b4	120	" dmb ish\n"
6170a974 CM	121	"3:\n"
	122	" .pushsection .fixup,\"ax\"\n"
	123	"4: mov %w0, %w6\n"
	124	" b 3b\n"
	125	" .popsection\n"
	126	" .pushsection __ex_table,\"a\"\n"
	127	" .align 3\n"
	128	" .quad 1b, 4b, 2b, 4b\n"
	129	" .popsection\n"
	130	: "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
	131	: "r" (oldval), "r" (newval), "Ir" (-EFAULT)
95c41896	132	: "memory");
6170a974 CM	133
	134	*uval = val;
	135	return ret;
	136	}
	137
	138	#endif /* __KERNEL__ */
	139	#endif /* __ASM_FUTEX_H */