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arm64: KVM: 32bit guest fault injection
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1/*
2 * Copyright (C) 2012,2013 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * Derived from arch/arm/include/uapi/asm/kvm.h:
6 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
7 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#ifndef __ARM_KVM_H__
23#define __ARM_KVM_H__
24
25#define KVM_SPSR_EL1 0
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26#define KVM_SPSR_SVC KVM_SPSR_EL1
27#define KVM_SPSR_ABT 1
28#define KVM_SPSR_UND 2
29#define KVM_SPSR_IRQ 3
30#define KVM_SPSR_FIQ 4
31#define KVM_NR_SPSR 5
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32
33#ifndef __ASSEMBLY__
34#include <asm/types.h>
35#include <asm/ptrace.h>
36
37#define __KVM_HAVE_GUEST_DEBUG
38#define __KVM_HAVE_IRQ_LINE
39
40#define KVM_REG_SIZE(id) \
41 (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
42
43struct kvm_regs {
44 struct user_pt_regs regs; /* sp = sp_el0 */
45
46 __u64 sp_el1;
47 __u64 elr_el1;
48
49 __u64 spsr[KVM_NR_SPSR];
50
51 struct user_fpsimd_state fp_regs;
52};
53
54/* Supported Processor Types */
55#define KVM_ARM_TARGET_AEM_V8 0
56#define KVM_ARM_TARGET_FOUNDATION_V8 1
57#define KVM_ARM_TARGET_CORTEX_A57 2
58
59#define KVM_ARM_NUM_TARGETS 3
60
61/* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */
62#define KVM_ARM_DEVICE_TYPE_SHIFT 0
63#define KVM_ARM_DEVICE_TYPE_MASK (0xffff << KVM_ARM_DEVICE_TYPE_SHIFT)
64#define KVM_ARM_DEVICE_ID_SHIFT 16
65#define KVM_ARM_DEVICE_ID_MASK (0xffff << KVM_ARM_DEVICE_ID_SHIFT)
66
67/* Supported device IDs */
68#define KVM_ARM_DEVICE_VGIC_V2 0
69
70/* Supported VGIC address types */
71#define KVM_VGIC_V2_ADDR_TYPE_DIST 0
72#define KVM_VGIC_V2_ADDR_TYPE_CPU 1
73
74#define KVM_VGIC_V2_DIST_SIZE 0x1000
75#define KVM_VGIC_V2_CPU_SIZE 0x2000
76
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77#define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */
78
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79struct kvm_vcpu_init {
80 __u32 target;
81 __u32 features[7];
82};
83
84struct kvm_sregs {
85};
86
87struct kvm_fpu {
88};
89
90struct kvm_guest_debug_arch {
91};
92
93struct kvm_debug_exit_arch {
94};
95
96struct kvm_sync_regs {
97};
98
99struct kvm_arch_memory_slot {
100};
101
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102/* If you need to interpret the index values, here is the key: */
103#define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000
104#define KVM_REG_ARM_COPROC_SHIFT 16
105
106/* Normal registers are mapped as coprocessor 16. */
107#define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT)
108#define KVM_REG_ARM_CORE_REG(name) (offsetof(struct kvm_regs, name) / sizeof(__u32))
109
110/* Some registers need more space to represent values. */
111#define KVM_REG_ARM_DEMUX (0x0011 << KVM_REG_ARM_COPROC_SHIFT)
112#define KVM_REG_ARM_DEMUX_ID_MASK 0x000000000000FF00
113#define KVM_REG_ARM_DEMUX_ID_SHIFT 8
114#define KVM_REG_ARM_DEMUX_ID_CCSIDR (0x00 << KVM_REG_ARM_DEMUX_ID_SHIFT)
115#define KVM_REG_ARM_DEMUX_VAL_MASK 0x00000000000000FF
116#define KVM_REG_ARM_DEMUX_VAL_SHIFT 0
117
118/* AArch64 system registers */
119#define KVM_REG_ARM64_SYSREG (0x0013 << KVM_REG_ARM_COPROC_SHIFT)
120#define KVM_REG_ARM64_SYSREG_OP0_MASK 0x000000000000c000
121#define KVM_REG_ARM64_SYSREG_OP0_SHIFT 14
122#define KVM_REG_ARM64_SYSREG_OP1_MASK 0x0000000000003800
123#define KVM_REG_ARM64_SYSREG_OP1_SHIFT 11
124#define KVM_REG_ARM64_SYSREG_CRN_MASK 0x0000000000000780
125#define KVM_REG_ARM64_SYSREG_CRN_SHIFT 7
126#define KVM_REG_ARM64_SYSREG_CRM_MASK 0x0000000000000078
127#define KVM_REG_ARM64_SYSREG_CRM_SHIFT 3
128#define KVM_REG_ARM64_SYSREG_OP2_MASK 0x0000000000000007
129#define KVM_REG_ARM64_SYSREG_OP2_SHIFT 0
130
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131/* KVM_IRQ_LINE irq field index values */
132#define KVM_ARM_IRQ_TYPE_SHIFT 24
133#define KVM_ARM_IRQ_TYPE_MASK 0xff
134#define KVM_ARM_IRQ_VCPU_SHIFT 16
135#define KVM_ARM_IRQ_VCPU_MASK 0xff
136#define KVM_ARM_IRQ_NUM_SHIFT 0
137#define KVM_ARM_IRQ_NUM_MASK 0xffff
138
139/* irq_type field */
140#define KVM_ARM_IRQ_TYPE_CPU 0
141#define KVM_ARM_IRQ_TYPE_SPI 1
142#define KVM_ARM_IRQ_TYPE_PPI 2
143
144/* out-of-kernel GIC cpu interrupt injection irq_number field */
145#define KVM_ARM_IRQ_CPU_IRQ 0
146#define KVM_ARM_IRQ_CPU_FIQ 1
147
148/* Highest supported SPI, from VGIC_NR_IRQS */
149#define KVM_ARM_IRQ_GIC_MAX 127
150
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151/* PSCI interface */
152#define KVM_PSCI_FN_BASE 0x95c1ba5e
153#define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n))
154
155#define KVM_PSCI_FN_CPU_SUSPEND KVM_PSCI_FN(0)
156#define KVM_PSCI_FN_CPU_OFF KVM_PSCI_FN(1)
157#define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2)
158#define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3)
159
160#define KVM_PSCI_RET_SUCCESS 0
161#define KVM_PSCI_RET_NI ((unsigned long)-1)
162#define KVM_PSCI_RET_INVAL ((unsigned long)-2)
163#define KVM_PSCI_RET_DENIED ((unsigned long)-3)
164
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165#endif
166
167#endif /* __ARM_KVM_H__ */