[mirror_ubuntu-bionic-kernel.git] / arch / arm64 / kernel / asm-offsets.c

/*
 * Based on arch/arm/kernel/asm-offsets.c
 *
 * Copyright (C) 1995-2003 Russell King
 *               2001-2002 Keith Owens
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/arm_sdei.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/dma-mapping.h>
#include <linux/kvm_host.h>
#include <linux/suspend.h>
#include <asm/cpufeature.h>
#include <asm/fixmap.h>
#include <asm/thread_info.h>
#include <asm/memory.h>
#include <asm/smp_plat.h>
#include <asm/suspend.h>
#include <asm/vdso_datapage.h>
#include <linux/kbuild.h>
#include <linux/arm-smccc.h>

int main(void)
{
  DEFINE(TSK_ACTIVE_MM,		offsetof(struct task_struct, active_mm));
  BLANK();
  DEFINE(TSK_TI_FLAGS,		offsetof(struct task_struct, thread_info.flags));
  DEFINE(TSK_TI_PREEMPT,	offsetof(struct task_struct, thread_info.preempt_count));
  DEFINE(TSK_TI_ADDR_LIMIT,	offsetof(struct task_struct, thread_info.addr_limit));
#ifdef CONFIG_ARM64_SW_TTBR0_PAN
  DEFINE(TSK_TI_TTBR0,		offsetof(struct task_struct, thread_info.ttbr0));
#endif
  DEFINE(TSK_STACK,		offsetof(struct task_struct, stack));
  BLANK();
  DEFINE(THREAD_CPU_CONTEXT,	offsetof(struct task_struct, thread.cpu_context));
  BLANK();
  DEFINE(S_X0,			offsetof(struct pt_regs, regs[0]));
  DEFINE(S_X1,			offsetof(struct pt_regs, regs[1]));
  DEFINE(S_X2,			offsetof(struct pt_regs, regs[2]));
  DEFINE(S_X3,			offsetof(struct pt_regs, regs[3]));
  DEFINE(S_X4,			offsetof(struct pt_regs, regs[4]));
  DEFINE(S_X5,			offsetof(struct pt_regs, regs[5]));
  DEFINE(S_X6,			offsetof(struct pt_regs, regs[6]));
  DEFINE(S_X7,			offsetof(struct pt_regs, regs[7]));
  DEFINE(S_X8,			offsetof(struct pt_regs, regs[8]));
  DEFINE(S_X10,			offsetof(struct pt_regs, regs[10]));
  DEFINE(S_X12,			offsetof(struct pt_regs, regs[12]));
  DEFINE(S_X14,			offsetof(struct pt_regs, regs[14]));
  DEFINE(S_X16,			offsetof(struct pt_regs, regs[16]));
  DEFINE(S_X18,			offsetof(struct pt_regs, regs[18]));
  DEFINE(S_X20,			offsetof(struct pt_regs, regs[20]));
  DEFINE(S_X22,			offsetof(struct pt_regs, regs[22]));
  DEFINE(S_X24,			offsetof(struct pt_regs, regs[24]));
  DEFINE(S_X26,			offsetof(struct pt_regs, regs[26]));
  DEFINE(S_X28,			offsetof(struct pt_regs, regs[28]));
  DEFINE(S_LR,			offsetof(struct pt_regs, regs[30]));
  DEFINE(S_SP,			offsetof(struct pt_regs, sp));
#ifdef CONFIG_COMPAT
  DEFINE(S_COMPAT_SP,		offsetof(struct pt_regs, compat_sp));
#endif
  DEFINE(S_PSTATE,		offsetof(struct pt_regs, pstate));
  DEFINE(S_PC,			offsetof(struct pt_regs, pc));
  DEFINE(S_ORIG_X0,		offsetof(struct pt_regs, orig_x0));
  DEFINE(S_SYSCALLNO,		offsetof(struct pt_regs, syscallno));
  DEFINE(S_ORIG_ADDR_LIMIT,	offsetof(struct pt_regs, orig_addr_limit));
  DEFINE(S_STACKFRAME,		offsetof(struct pt_regs, stackframe));
  DEFINE(S_FRAME_SIZE,		sizeof(struct pt_regs));
  BLANK();
  DEFINE(MM_CONTEXT_ID,		offsetof(struct mm_struct, context.id.counter));
  BLANK();
  DEFINE(VMA_VM_MM,		offsetof(struct vm_area_struct, vm_mm));
  DEFINE(VMA_VM_FLAGS,		offsetof(struct vm_area_struct, vm_flags));
  BLANK();
  DEFINE(VM_EXEC,	       	VM_EXEC);
  BLANK();
  DEFINE(PAGE_SZ,	       	PAGE_SIZE);
  BLANK();
  DEFINE(DMA_BIDIRECTIONAL,	DMA_BIDIRECTIONAL);
  DEFINE(DMA_TO_DEVICE,		DMA_TO_DEVICE);
  DEFINE(DMA_FROM_DEVICE,	DMA_FROM_DEVICE);
  BLANK();
  DEFINE(CLOCK_REALTIME,	CLOCK_REALTIME);
  DEFINE(CLOCK_MONOTONIC,	CLOCK_MONOTONIC);
  DEFINE(CLOCK_MONOTONIC_RAW,	CLOCK_MONOTONIC_RAW);
  DEFINE(CLOCK_REALTIME_RES,	offsetof(struct vdso_data, hrtimer_res));
  DEFINE(CLOCK_REALTIME_COARSE,	CLOCK_REALTIME_COARSE);
  DEFINE(CLOCK_MONOTONIC_COARSE,CLOCK_MONOTONIC_COARSE);
  DEFINE(CLOCK_COARSE_RES,	LOW_RES_NSEC);
  DEFINE(NSEC_PER_SEC,		NSEC_PER_SEC);
  BLANK();
  DEFINE(VDSO_CS_CYCLE_LAST,	offsetof(struct vdso_data, cs_cycle_last));
  DEFINE(VDSO_RAW_TIME_SEC,	offsetof(struct vdso_data, raw_time_sec));
  DEFINE(VDSO_RAW_TIME_NSEC,	offsetof(struct vdso_data, raw_time_nsec));
  DEFINE(VDSO_XTIME_CLK_SEC,	offsetof(struct vdso_data, xtime_clock_sec));
  DEFINE(VDSO_XTIME_CLK_NSEC,	offsetof(struct vdso_data, xtime_clock_nsec));
  DEFINE(VDSO_XTIME_CRS_SEC,	offsetof(struct vdso_data, xtime_coarse_sec));
  DEFINE(VDSO_XTIME_CRS_NSEC,	offsetof(struct vdso_data, xtime_coarse_nsec));
  DEFINE(VDSO_WTM_CLK_SEC,	offsetof(struct vdso_data, wtm_clock_sec));
  DEFINE(VDSO_WTM_CLK_NSEC,	offsetof(struct vdso_data, wtm_clock_nsec));
  DEFINE(VDSO_TB_SEQ_COUNT,	offsetof(struct vdso_data, tb_seq_count));
  DEFINE(VDSO_CS_MONO_MULT,	offsetof(struct vdso_data, cs_mono_mult));
  DEFINE(VDSO_CS_RAW_MULT,	offsetof(struct vdso_data, cs_raw_mult));
  DEFINE(VDSO_CS_SHIFT,		offsetof(struct vdso_data, cs_shift));
  DEFINE(VDSO_TZ_MINWEST,	offsetof(struct vdso_data, tz_minuteswest));
  DEFINE(VDSO_TZ_DSTTIME,	offsetof(struct vdso_data, tz_dsttime));
  DEFINE(VDSO_USE_SYSCALL,	offsetof(struct vdso_data, use_syscall));
  BLANK();
  DEFINE(TVAL_TV_SEC,		offsetof(struct timeval, tv_sec));
  DEFINE(TVAL_TV_USEC,		offsetof(struct timeval, tv_usec));
  DEFINE(TSPEC_TV_SEC,		offsetof(struct timespec, tv_sec));
  DEFINE(TSPEC_TV_NSEC,		offsetof(struct timespec, tv_nsec));
  BLANK();
  DEFINE(TZ_MINWEST,		offsetof(struct timezone, tz_minuteswest));
  DEFINE(TZ_DSTTIME,		offsetof(struct timezone, tz_dsttime));
  BLANK();
  DEFINE(CPU_BOOT_STACK,	offsetof(struct secondary_data, stack));
  DEFINE(CPU_BOOT_TASK,		offsetof(struct secondary_data, task));
  BLANK();
#ifdef CONFIG_KVM_ARM_HOST
  DEFINE(VCPU_CONTEXT,		offsetof(struct kvm_vcpu, arch.ctxt));
  DEFINE(VCPU_FAULT_DISR,	offsetof(struct kvm_vcpu, arch.fault.disr_el1));
  DEFINE(VCPU_WORKAROUND_FLAGS,	offsetof(struct kvm_vcpu, arch.workaround_flags));
  DEFINE(CPU_GP_REGS,		offsetof(struct kvm_cpu_context, gp_regs));
  DEFINE(CPU_USER_PT_REGS,	offsetof(struct kvm_regs, regs));
  DEFINE(CPU_FP_REGS,		offsetof(struct kvm_regs, fp_regs));
  DEFINE(VCPU_FPEXC32_EL2,	offsetof(struct kvm_vcpu, arch.ctxt.sys_regs[FPEXC32_EL2]));
  DEFINE(VCPU_HOST_CONTEXT,	offsetof(struct kvm_vcpu, arch.host_cpu_context));
  DEFINE(HOST_CONTEXT_VCPU,	offsetof(struct kvm_cpu_context, __hyp_running_vcpu));
#endif
#ifdef CONFIG_CPU_PM
  DEFINE(CPU_SUSPEND_SZ,	sizeof(struct cpu_suspend_ctx));
  DEFINE(CPU_CTX_SP,		offsetof(struct cpu_suspend_ctx, sp));
  DEFINE(MPIDR_HASH_MASK,	offsetof(struct mpidr_hash, mask));
  DEFINE(MPIDR_HASH_SHIFTS,	offsetof(struct mpidr_hash, shift_aff));
  DEFINE(SLEEP_STACK_DATA_SYSTEM_REGS,	offsetof(struct sleep_stack_data, system_regs));
  DEFINE(SLEEP_STACK_DATA_CALLEE_REGS,	offsetof(struct sleep_stack_data, callee_saved_regs));
#endif
  DEFINE(ARM_SMCCC_RES_X0_OFFS,		offsetof(struct arm_smccc_res, a0));
  DEFINE(ARM_SMCCC_RES_X2_OFFS,		offsetof(struct arm_smccc_res, a2));
  DEFINE(ARM_SMCCC_QUIRK_ID_OFFS,	offsetof(struct arm_smccc_quirk, id));
  DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS,	offsetof(struct arm_smccc_quirk, state));
  BLANK();
  DEFINE(HIBERN_PBE_ORIG,	offsetof(struct pbe, orig_address));
  DEFINE(HIBERN_PBE_ADDR,	offsetof(struct pbe, address));
  DEFINE(HIBERN_PBE_NEXT,	offsetof(struct pbe, next));
  DEFINE(ARM64_FTR_SYSVAL,	offsetof(struct arm64_ftr_reg, sys_val));
  BLANK();
#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
  DEFINE(TRAMP_VALIAS,		TRAMP_VALIAS);
#endif
#ifdef CONFIG_ARM_SDE_INTERFACE
  DEFINE(SDEI_EVENT_INTREGS,	offsetof(struct sdei_registered_event, interrupted_regs));
  DEFINE(SDEI_EVENT_PRIORITY,	offsetof(struct sdei_registered_event, priority));
#endif
  return 0;
}
Commit	Line	Data
0be7320a CM	1	/*
	2	* Based on arch/arm/kernel/asm-offsets.c
	3	*
	4	* Copyright (C) 1995-2003 Russell King
	5	* 2001-2002 Keith Owens
	6	* Copyright (C) 2012 ARM Ltd.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
0cfe6ab1	21	#include <linux/arm_sdei.h>
0be7320a CM	22	#include <linux/sched.h>
	23	#include <linux/mm.h>
	24	#include <linux/dma-mapping.h>
c3eb5b14	25	#include <linux/kvm_host.h>
82869ac5	26	#include <linux/suspend.h>
116c81f4	27	#include <asm/cpufeature.h>
f9365fa9	28	#include <asm/fixmap.h>
0be7320a CM	29	#include <asm/thread_info.h>
0be7320a CM	30	#include <asm/memory.h>
95322526 LP	31	#include <asm/smp_plat.h>
95322526 LP	32	#include <asm/suspend.h>
0be7320a CM	33	#include <asm/vdso_datapage.h>
0be7320a CM	34	#include <linux/kbuild.h>
14457459	35	#include <linux/arm-smccc.h>
0be7320a CM	36
	37	int main(void)
	38	{
	39	DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
	40	BLANK();
c02433dd MR	41	DEFINE(TSK_TI_FLAGS, offsetof(struct task_struct, thread_info.flags));
	42	DEFINE(TSK_TI_PREEMPT, offsetof(struct task_struct, thread_info.preempt_count));
	43	DEFINE(TSK_TI_ADDR_LIMIT, offsetof(struct task_struct, thread_info.addr_limit));
4b65a5db CM	44	#ifdef CONFIG_ARM64_SW_TTBR0_PAN
	45	DEFINE(TSK_TI_TTBR0, offsetof(struct task_struct, thread_info.ttbr0));
	46	#endif
c02433dd	47	DEFINE(TSK_STACK, offsetof(struct task_struct, stack));
0be7320a CM	48	BLANK();
	49	DEFINE(THREAD_CPU_CONTEXT, offsetof(struct task_struct, thread.cpu_context));
	50	BLANK();
	51	DEFINE(S_X0, offsetof(struct pt_regs, regs[0]));
	52	DEFINE(S_X1, offsetof(struct pt_regs, regs[1]));
	53	DEFINE(S_X2, offsetof(struct pt_regs, regs[2]));
	54	DEFINE(S_X3, offsetof(struct pt_regs, regs[3]));
	55	DEFINE(S_X4, offsetof(struct pt_regs, regs[4]));
	56	DEFINE(S_X5, offsetof(struct pt_regs, regs[5]));
	57	DEFINE(S_X6, offsetof(struct pt_regs, regs[6]));
	58	DEFINE(S_X7, offsetof(struct pt_regs, regs[7]));
da6a9125 WC	59	DEFINE(S_X8, offsetof(struct pt_regs, regs[8]));
	60	DEFINE(S_X10, offsetof(struct pt_regs, regs[10]));
	61	DEFINE(S_X12, offsetof(struct pt_regs, regs[12]));
	62	DEFINE(S_X14, offsetof(struct pt_regs, regs[14]));
	63	DEFINE(S_X16, offsetof(struct pt_regs, regs[16]));
	64	DEFINE(S_X18, offsetof(struct pt_regs, regs[18]));
	65	DEFINE(S_X20, offsetof(struct pt_regs, regs[20]));
	66	DEFINE(S_X22, offsetof(struct pt_regs, regs[22]));
	67	DEFINE(S_X24, offsetof(struct pt_regs, regs[24]));
	68	DEFINE(S_X26, offsetof(struct pt_regs, regs[26]));
	69	DEFINE(S_X28, offsetof(struct pt_regs, regs[28]));
0be7320a CM	70	DEFINE(S_LR, offsetof(struct pt_regs, regs[30]));
	71	DEFINE(S_SP, offsetof(struct pt_regs, sp));
	72	#ifdef CONFIG_COMPAT
	73	DEFINE(S_COMPAT_SP, offsetof(struct pt_regs, compat_sp));
	74	#endif
	75	DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate));
	76	DEFINE(S_PC, offsetof(struct pt_regs, pc));
	77	DEFINE(S_ORIG_X0, offsetof(struct pt_regs, orig_x0));
	78	DEFINE(S_SYSCALLNO, offsetof(struct pt_regs, syscallno));
e19a6ee2	79	DEFINE(S_ORIG_ADDR_LIMIT, offsetof(struct pt_regs, orig_addr_limit));
73267498	80	DEFINE(S_STACKFRAME, offsetof(struct pt_regs, stackframe));
0be7320a CM	81	DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
0be7320a CM	82	BLANK();
5aec715d	83	DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
0be7320a CM	84	BLANK();
	85	DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
	86	DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
	87	BLANK();
	88	DEFINE(VM_EXEC, VM_EXEC);
	89	BLANK();
	90	DEFINE(PAGE_SZ, PAGE_SIZE);
	91	BLANK();
0be7320a CM	92	DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
	93	DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
	94	DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
	95	BLANK();
	96	DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
	97	DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
49eea433	98	DEFINE(CLOCK_MONOTONIC_RAW, CLOCK_MONOTONIC_RAW);
b2aed72f	99	DEFINE(CLOCK_REALTIME_RES, offsetof(struct vdso_data, hrtimer_res));
0be7320a CM	100	DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
	101	DEFINE(CLOCK_MONOTONIC_COARSE,CLOCK_MONOTONIC_COARSE);
	102	DEFINE(CLOCK_COARSE_RES, LOW_RES_NSEC);
	103	DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
	104	BLANK();
	105	DEFINE(VDSO_CS_CYCLE_LAST, offsetof(struct vdso_data, cs_cycle_last));
49eea433 KB	106	DEFINE(VDSO_RAW_TIME_SEC, offsetof(struct vdso_data, raw_time_sec));
49eea433 KB	107	DEFINE(VDSO_RAW_TIME_NSEC, offsetof(struct vdso_data, raw_time_nsec));
0be7320a CM	108	DEFINE(VDSO_XTIME_CLK_SEC, offsetof(struct vdso_data, xtime_clock_sec));
	109	DEFINE(VDSO_XTIME_CLK_NSEC, offsetof(struct vdso_data, xtime_clock_nsec));
	110	DEFINE(VDSO_XTIME_CRS_SEC, offsetof(struct vdso_data, xtime_coarse_sec));
	111	DEFINE(VDSO_XTIME_CRS_NSEC, offsetof(struct vdso_data, xtime_coarse_nsec));
	112	DEFINE(VDSO_WTM_CLK_SEC, offsetof(struct vdso_data, wtm_clock_sec));
	113	DEFINE(VDSO_WTM_CLK_NSEC, offsetof(struct vdso_data, wtm_clock_nsec));
	114	DEFINE(VDSO_TB_SEQ_COUNT, offsetof(struct vdso_data, tb_seq_count));
49eea433 KB	115	DEFINE(VDSO_CS_MONO_MULT, offsetof(struct vdso_data, cs_mono_mult));
49eea433 KB	116	DEFINE(VDSO_CS_RAW_MULT, offsetof(struct vdso_data, cs_raw_mult));
0be7320a CM	117	DEFINE(VDSO_CS_SHIFT, offsetof(struct vdso_data, cs_shift));
	118	DEFINE(VDSO_TZ_MINWEST, offsetof(struct vdso_data, tz_minuteswest));
	119	DEFINE(VDSO_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
	120	DEFINE(VDSO_USE_SYSCALL, offsetof(struct vdso_data, use_syscall));
	121	BLANK();
	122	DEFINE(TVAL_TV_SEC, offsetof(struct timeval, tv_sec));
	123	DEFINE(TVAL_TV_USEC, offsetof(struct timeval, tv_usec));
	124	DEFINE(TSPEC_TV_SEC, offsetof(struct timespec, tv_sec));
	125	DEFINE(TSPEC_TV_NSEC, offsetof(struct timespec, tv_nsec));
	126	BLANK();
	127	DEFINE(TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
	128	DEFINE(TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
55c7401d	129	BLANK();
bb905274	130	DEFINE(CPU_BOOT_STACK, offsetof(struct secondary_data, stack));
c02433dd	131	DEFINE(CPU_BOOT_TASK, offsetof(struct secondary_data, task));
bb905274	132	BLANK();
55c7401d MZ	133	#ifdef CONFIG_KVM_ARM_HOST
55c7401d MZ	134	DEFINE(VCPU_CONTEXT, offsetof(struct kvm_vcpu, arch.ctxt));
2e66e3af	135	DEFINE(VCPU_FAULT_DISR, offsetof(struct kvm_vcpu, arch.fault.disr_el1));
2a1e0640	136	DEFINE(VCPU_WORKAROUND_FLAGS, offsetof(struct kvm_vcpu, arch.workaround_flags));
55c7401d MZ	137	DEFINE(CPU_GP_REGS, offsetof(struct kvm_cpu_context, gp_regs));
	138	DEFINE(CPU_USER_PT_REGS, offsetof(struct kvm_regs, regs));
	139	DEFINE(CPU_FP_REGS, offsetof(struct kvm_regs, fp_regs));
9d8415d6	140	DEFINE(VCPU_FPEXC32_EL2, offsetof(struct kvm_vcpu, arch.ctxt.sys_regs[FPEXC32_EL2]));
55c7401d	141	DEFINE(VCPU_HOST_CONTEXT, offsetof(struct kvm_vcpu, arch.host_cpu_context));
47e02f07	142	DEFINE(HOST_CONTEXT_VCPU, offsetof(struct kvm_cpu_context, __hyp_running_vcpu));
95322526	143	#endif
af3cfdbf	144	#ifdef CONFIG_CPU_PM
95322526 LP	145	DEFINE(CPU_SUSPEND_SZ, sizeof(struct cpu_suspend_ctx));
	146	DEFINE(CPU_CTX_SP, offsetof(struct cpu_suspend_ctx, sp));
	147	DEFINE(MPIDR_HASH_MASK, offsetof(struct mpidr_hash, mask));
	148	DEFINE(MPIDR_HASH_SHIFTS, offsetof(struct mpidr_hash, shift_aff));
adc9b2df JM	149	DEFINE(SLEEP_STACK_DATA_SYSTEM_REGS, offsetof(struct sleep_stack_data, system_regs));
adc9b2df JM	150	DEFINE(SLEEP_STACK_DATA_CALLEE_REGS, offsetof(struct sleep_stack_data, callee_saved_regs));
55c7401d	151	#endif
680a0873 AG	152	DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0));
	153	DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2));
	154	DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id));
	155	DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state));
82869ac5 JM	156	BLANK();
	157	DEFINE(HIBERN_PBE_ORIG, offsetof(struct pbe, orig_address));
	158	DEFINE(HIBERN_PBE_ADDR, offsetof(struct pbe, address));
	159	DEFINE(HIBERN_PBE_NEXT, offsetof(struct pbe, next));
116c81f4	160	DEFINE(ARM64_FTR_SYSVAL, offsetof(struct arm64_ftr_reg, sys_val));
f9365fa9 WD	161	BLANK();
	162	#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
	163	DEFINE(TRAMP_VALIAS, TRAMP_VALIAS);
0cfe6ab1 JM	164	#endif
	165	#ifdef CONFIG_ARM_SDE_INTERFACE
	166	DEFINE(SDEI_EVENT_INTREGS, offsetof(struct sdei_registered_event, interrupted_regs));
	167	DEFINE(SDEI_EVENT_PRIORITY, offsetof(struct sdei_registered_event, priority));
f9365fa9	168	#endif
0be7320a CM	169	return 0;
0be7320a CM	170	}