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478fcb2c WD |
1 | /* |
2 | * ARMv8 single-step debug support and mdscr context switching. | |
3 | * | |
4 | * Copyright (C) 2012 ARM Limited | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
17 | * | |
18 | * Author: Will Deacon <will.deacon@arm.com> | |
19 | */ | |
20 | ||
21 | #include <linux/cpu.h> | |
22 | #include <linux/debugfs.h> | |
23 | #include <linux/hardirq.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/ptrace.h> | |
2dd0e8d2 | 26 | #include <linux/kprobes.h> |
478fcb2c | 27 | #include <linux/stat.h> |
1442b6ed | 28 | #include <linux/uaccess.h> |
68db0cf1 | 29 | #include <linux/sched/task_stack.h> |
478fcb2c | 30 | |
3085bb01 | 31 | #include <asm/cpufeature.h> |
478fcb2c | 32 | #include <asm/cputype.h> |
3085bb01 | 33 | #include <asm/debug-monitors.h> |
478fcb2c WD |
34 | #include <asm/system_misc.h> |
35 | ||
478fcb2c WD |
36 | /* Determine debug architecture. */ |
37 | u8 debug_monitors_arch(void) | |
38 | { | |
28c5dcb2 | 39 | return cpuid_feature_extract_unsigned_field(read_system_reg(SYS_ID_AA64DFR0_EL1), |
3085bb01 | 40 | ID_AA64DFR0_DEBUGVER_SHIFT); |
478fcb2c WD |
41 | } |
42 | ||
43 | /* | |
44 | * MDSCR access routines. | |
45 | */ | |
46 | static void mdscr_write(u32 mdscr) | |
47 | { | |
48 | unsigned long flags; | |
49 | local_dbg_save(flags); | |
adf75899 | 50 | write_sysreg(mdscr, mdscr_el1); |
478fcb2c WD |
51 | local_dbg_restore(flags); |
52 | } | |
44b53f67 | 53 | NOKPROBE_SYMBOL(mdscr_write); |
478fcb2c WD |
54 | |
55 | static u32 mdscr_read(void) | |
56 | { | |
adf75899 | 57 | return read_sysreg(mdscr_el1); |
478fcb2c | 58 | } |
44b53f67 | 59 | NOKPROBE_SYMBOL(mdscr_read); |
478fcb2c WD |
60 | |
61 | /* | |
62 | * Allow root to disable self-hosted debug from userspace. | |
63 | * This is useful if you want to connect an external JTAG debugger. | |
64 | */ | |
621a5f7a | 65 | static bool debug_enabled = true; |
478fcb2c WD |
66 | |
67 | static int create_debug_debugfs_entry(void) | |
68 | { | |
69 | debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled); | |
70 | return 0; | |
71 | } | |
72 | fs_initcall(create_debug_debugfs_entry); | |
73 | ||
74 | static int __init early_debug_disable(char *buf) | |
75 | { | |
621a5f7a | 76 | debug_enabled = false; |
478fcb2c WD |
77 | return 0; |
78 | } | |
79 | ||
80 | early_param("nodebugmon", early_debug_disable); | |
81 | ||
82 | /* | |
83 | * Keep track of debug users on each core. | |
84 | * The ref counts are per-cpu so we use a local_t type. | |
85 | */ | |
1436c1aa CL |
86 | static DEFINE_PER_CPU(int, mde_ref_count); |
87 | static DEFINE_PER_CPU(int, kde_ref_count); | |
478fcb2c | 88 | |
6f883d10 | 89 | void enable_debug_monitors(enum dbg_active_el el) |
478fcb2c WD |
90 | { |
91 | u32 mdscr, enable = 0; | |
92 | ||
93 | WARN_ON(preemptible()); | |
94 | ||
1436c1aa | 95 | if (this_cpu_inc_return(mde_ref_count) == 1) |
478fcb2c WD |
96 | enable = DBG_MDSCR_MDE; |
97 | ||
98 | if (el == DBG_ACTIVE_EL1 && | |
1436c1aa | 99 | this_cpu_inc_return(kde_ref_count) == 1) |
478fcb2c WD |
100 | enable |= DBG_MDSCR_KDE; |
101 | ||
102 | if (enable && debug_enabled) { | |
103 | mdscr = mdscr_read(); | |
104 | mdscr |= enable; | |
105 | mdscr_write(mdscr); | |
106 | } | |
107 | } | |
44b53f67 | 108 | NOKPROBE_SYMBOL(enable_debug_monitors); |
478fcb2c | 109 | |
6f883d10 | 110 | void disable_debug_monitors(enum dbg_active_el el) |
478fcb2c WD |
111 | { |
112 | u32 mdscr, disable = 0; | |
113 | ||
114 | WARN_ON(preemptible()); | |
115 | ||
1436c1aa | 116 | if (this_cpu_dec_return(mde_ref_count) == 0) |
478fcb2c WD |
117 | disable = ~DBG_MDSCR_MDE; |
118 | ||
119 | if (el == DBG_ACTIVE_EL1 && | |
1436c1aa | 120 | this_cpu_dec_return(kde_ref_count) == 0) |
478fcb2c WD |
121 | disable &= ~DBG_MDSCR_KDE; |
122 | ||
123 | if (disable) { | |
124 | mdscr = mdscr_read(); | |
125 | mdscr &= disable; | |
126 | mdscr_write(mdscr); | |
127 | } | |
128 | } | |
44b53f67 | 129 | NOKPROBE_SYMBOL(disable_debug_monitors); |
478fcb2c WD |
130 | |
131 | /* | |
132 | * OS lock clearing. | |
133 | */ | |
e937dd57 | 134 | static int clear_os_lock(unsigned int cpu) |
478fcb2c | 135 | { |
adf75899 | 136 | write_sysreg(0, oslar_el1); |
e937dd57 WD |
137 | isb(); |
138 | return 0; | |
478fcb2c WD |
139 | } |
140 | ||
b8c6453a | 141 | static int debug_monitors_init(void) |
478fcb2c | 142 | { |
e937dd57 | 143 | return cpuhp_setup_state(CPUHP_AP_ARM64_DEBUG_MONITORS_STARTING, |
73c1b41e | 144 | "arm64/debug_monitors:starting", |
e937dd57 | 145 | clear_os_lock, NULL); |
478fcb2c WD |
146 | } |
147 | postcore_initcall(debug_monitors_init); | |
148 | ||
149 | /* | |
150 | * Single step API and exception handling. | |
151 | */ | |
152 | static void set_regs_spsr_ss(struct pt_regs *regs) | |
153 | { | |
6b68e14e | 154 | regs->pstate |= DBG_SPSR_SS; |
478fcb2c | 155 | } |
44b53f67 | 156 | NOKPROBE_SYMBOL(set_regs_spsr_ss); |
478fcb2c WD |
157 | |
158 | static void clear_regs_spsr_ss(struct pt_regs *regs) | |
159 | { | |
6b68e14e | 160 | regs->pstate &= ~DBG_SPSR_SS; |
478fcb2c | 161 | } |
44b53f67 | 162 | NOKPROBE_SYMBOL(clear_regs_spsr_ss); |
478fcb2c | 163 | |
ee6214ce SP |
164 | /* EL1 Single Step Handler hooks */ |
165 | static LIST_HEAD(step_hook); | |
cf0a2543 | 166 | static DEFINE_SPINLOCK(step_hook_lock); |
ee6214ce SP |
167 | |
168 | void register_step_hook(struct step_hook *hook) | |
169 | { | |
cf0a2543 YS |
170 | spin_lock(&step_hook_lock); |
171 | list_add_rcu(&hook->node, &step_hook); | |
172 | spin_unlock(&step_hook_lock); | |
ee6214ce SP |
173 | } |
174 | ||
175 | void unregister_step_hook(struct step_hook *hook) | |
176 | { | |
cf0a2543 YS |
177 | spin_lock(&step_hook_lock); |
178 | list_del_rcu(&hook->node); | |
179 | spin_unlock(&step_hook_lock); | |
180 | synchronize_rcu(); | |
ee6214ce SP |
181 | } |
182 | ||
183 | /* | |
95485fdc | 184 | * Call registered single step handlers |
ee6214ce SP |
185 | * There is no Syndrome info to check for determining the handler. |
186 | * So we call all the registered handlers, until the right handler is | |
187 | * found which returns zero. | |
188 | */ | |
189 | static int call_step_hook(struct pt_regs *regs, unsigned int esr) | |
190 | { | |
191 | struct step_hook *hook; | |
192 | int retval = DBG_HOOK_ERROR; | |
193 | ||
cf0a2543 | 194 | rcu_read_lock(); |
ee6214ce | 195 | |
cf0a2543 | 196 | list_for_each_entry_rcu(hook, &step_hook, node) { |
ee6214ce SP |
197 | retval = hook->fn(regs, esr); |
198 | if (retval == DBG_HOOK_HANDLED) | |
199 | break; | |
200 | } | |
201 | ||
cf0a2543 | 202 | rcu_read_unlock(); |
ee6214ce SP |
203 | |
204 | return retval; | |
205 | } | |
44b53f67 | 206 | NOKPROBE_SYMBOL(call_step_hook); |
ee6214ce | 207 | |
e04a28d4 WD |
208 | static void send_user_sigtrap(int si_code) |
209 | { | |
210 | struct pt_regs *regs = current_pt_regs(); | |
211 | siginfo_t info = { | |
212 | .si_signo = SIGTRAP, | |
213 | .si_errno = 0, | |
214 | .si_code = si_code, | |
215 | .si_addr = (void __user *)instruction_pointer(regs), | |
216 | }; | |
217 | ||
218 | if (WARN_ON(!user_mode(regs))) | |
219 | return; | |
220 | ||
221 | if (interrupts_enabled(regs)) | |
222 | local_irq_enable(); | |
223 | ||
224 | force_sig_info(SIGTRAP, &info, current); | |
225 | } | |
226 | ||
478fcb2c WD |
227 | static int single_step_handler(unsigned long addr, unsigned int esr, |
228 | struct pt_regs *regs) | |
229 | { | |
3fb69640 PA |
230 | bool handler_found = false; |
231 | ||
478fcb2c WD |
232 | /* |
233 | * If we are stepping a pending breakpoint, call the hw_breakpoint | |
234 | * handler first. | |
235 | */ | |
236 | if (!reinstall_suspended_bps(regs)) | |
237 | return 0; | |
238 | ||
3fb69640 PA |
239 | #ifdef CONFIG_KPROBES |
240 | if (kprobe_single_step_handler(regs, esr) == DBG_HOOK_HANDLED) | |
241 | handler_found = true; | |
242 | #endif | |
243 | if (!handler_found && call_step_hook(regs, esr) == DBG_HOOK_HANDLED) | |
244 | handler_found = true; | |
245 | ||
246 | if (!handler_found && user_mode(regs)) { | |
adeb68ef | 247 | send_user_sigtrap(TRAP_TRACE); |
478fcb2c WD |
248 | |
249 | /* | |
250 | * ptrace will disable single step unless explicitly | |
251 | * asked to re-enable it. For other clients, it makes | |
252 | * sense to leave it enabled (i.e. rewind the controls | |
253 | * to the active-not-pending state). | |
254 | */ | |
255 | user_rewind_single_step(current); | |
3fb69640 PA |
256 | } else if (!handler_found) { |
257 | pr_warn("Unexpected kernel single-step exception at EL1\n"); | |
478fcb2c WD |
258 | /* |
259 | * Re-enable stepping since we know that we will be | |
260 | * returning to regs. | |
261 | */ | |
262 | set_regs_spsr_ss(regs); | |
263 | } | |
264 | ||
265 | return 0; | |
266 | } | |
44b53f67 | 267 | NOKPROBE_SYMBOL(single_step_handler); |
478fcb2c | 268 | |
ee6214ce SP |
269 | /* |
270 | * Breakpoint handler is re-entrant as another breakpoint can | |
271 | * hit within breakpoint handler, especically in kprobes. | |
272 | * Use reader/writer locks instead of plain spinlock. | |
273 | */ | |
274 | static LIST_HEAD(break_hook); | |
62c6c61a | 275 | static DEFINE_SPINLOCK(break_hook_lock); |
ee6214ce SP |
276 | |
277 | void register_break_hook(struct break_hook *hook) | |
278 | { | |
62c6c61a YS |
279 | spin_lock(&break_hook_lock); |
280 | list_add_rcu(&hook->node, &break_hook); | |
281 | spin_unlock(&break_hook_lock); | |
ee6214ce SP |
282 | } |
283 | ||
284 | void unregister_break_hook(struct break_hook *hook) | |
285 | { | |
62c6c61a YS |
286 | spin_lock(&break_hook_lock); |
287 | list_del_rcu(&hook->node); | |
288 | spin_unlock(&break_hook_lock); | |
289 | synchronize_rcu(); | |
ee6214ce SP |
290 | } |
291 | ||
292 | static int call_break_hook(struct pt_regs *regs, unsigned int esr) | |
293 | { | |
294 | struct break_hook *hook; | |
295 | int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL; | |
296 | ||
62c6c61a YS |
297 | rcu_read_lock(); |
298 | list_for_each_entry_rcu(hook, &break_hook, node) | |
ee6214ce SP |
299 | if ((esr & hook->esr_mask) == hook->esr_val) |
300 | fn = hook->fn; | |
62c6c61a | 301 | rcu_read_unlock(); |
ee6214ce SP |
302 | |
303 | return fn ? fn(regs, esr) : DBG_HOOK_ERROR; | |
304 | } | |
44b53f67 | 305 | NOKPROBE_SYMBOL(call_break_hook); |
ee6214ce | 306 | |
1442b6ed WD |
307 | static int brk_handler(unsigned long addr, unsigned int esr, |
308 | struct pt_regs *regs) | |
309 | { | |
53d07e21 PA |
310 | bool handler_found = false; |
311 | ||
2dd0e8d2 | 312 | #ifdef CONFIG_KPROBES |
53d07e21 PA |
313 | if ((esr & BRK64_ESR_MASK) == BRK64_ESR_KPROBES) { |
314 | if (kprobe_breakpoint_handler(regs, esr) == DBG_HOOK_HANDLED) | |
315 | handler_found = true; | |
2dd0e8d2 SP |
316 | } |
317 | #endif | |
53d07e21 PA |
318 | if (!handler_found && call_break_hook(regs, esr) == DBG_HOOK_HANDLED) |
319 | handler_found = true; | |
320 | ||
321 | if (!handler_found && user_mode(regs)) { | |
322 | send_user_sigtrap(TRAP_BRKPT); | |
323 | } else if (!handler_found) { | |
2dd0e8d2 | 324 | pr_warn("Unexpected kernel BRK exception at EL1\n"); |
1442b6ed | 325 | return -EFAULT; |
c878e0cf | 326 | } |
1442b6ed | 327 | |
1442b6ed WD |
328 | return 0; |
329 | } | |
44b53f67 | 330 | NOKPROBE_SYMBOL(brk_handler); |
1442b6ed WD |
331 | |
332 | int aarch32_break_handler(struct pt_regs *regs) | |
333 | { | |
2dacab73 ML |
334 | u32 arm_instr; |
335 | u16 thumb_instr; | |
1442b6ed WD |
336 | bool bp = false; |
337 | void __user *pc = (void __user *)instruction_pointer(regs); | |
338 | ||
339 | if (!compat_user_mode(regs)) | |
340 | return -EFAULT; | |
341 | ||
342 | if (compat_thumb_mode(regs)) { | |
343 | /* get 16-bit Thumb instruction */ | |
2dacab73 ML |
344 | get_user(thumb_instr, (u16 __user *)pc); |
345 | thumb_instr = le16_to_cpu(thumb_instr); | |
346 | if (thumb_instr == AARCH32_BREAK_THUMB2_LO) { | |
1442b6ed | 347 | /* get second half of 32-bit Thumb-2 instruction */ |
2dacab73 ML |
348 | get_user(thumb_instr, (u16 __user *)(pc + 2)); |
349 | thumb_instr = le16_to_cpu(thumb_instr); | |
350 | bp = thumb_instr == AARCH32_BREAK_THUMB2_HI; | |
1442b6ed | 351 | } else { |
2dacab73 | 352 | bp = thumb_instr == AARCH32_BREAK_THUMB; |
1442b6ed WD |
353 | } |
354 | } else { | |
355 | /* 32-bit ARM instruction */ | |
2dacab73 ML |
356 | get_user(arm_instr, (u32 __user *)pc); |
357 | arm_instr = le32_to_cpu(arm_instr); | |
358 | bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM; | |
1442b6ed WD |
359 | } |
360 | ||
361 | if (!bp) | |
362 | return -EFAULT; | |
363 | ||
e04a28d4 | 364 | send_user_sigtrap(TRAP_BRKPT); |
1442b6ed WD |
365 | return 0; |
366 | } | |
44b53f67 | 367 | NOKPROBE_SYMBOL(aarch32_break_handler); |
1442b6ed WD |
368 | |
369 | static int __init debug_traps_init(void) | |
478fcb2c WD |
370 | { |
371 | hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP, | |
adeb68ef | 372 | TRAP_TRACE, "single-step handler"); |
1442b6ed WD |
373 | hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP, |
374 | TRAP_BRKPT, "ptrace BRK handler"); | |
478fcb2c WD |
375 | return 0; |
376 | } | |
1442b6ed | 377 | arch_initcall(debug_traps_init); |
478fcb2c WD |
378 | |
379 | /* Re-enable single step for syscall restarting. */ | |
380 | void user_rewind_single_step(struct task_struct *task) | |
381 | { | |
382 | /* | |
383 | * If single step is active for this thread, then set SPSR.SS | |
384 | * to 1 to avoid returning to the active-pending state. | |
385 | */ | |
386 | if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP)) | |
387 | set_regs_spsr_ss(task_pt_regs(task)); | |
388 | } | |
44b53f67 | 389 | NOKPROBE_SYMBOL(user_rewind_single_step); |
478fcb2c WD |
390 | |
391 | void user_fastforward_single_step(struct task_struct *task) | |
392 | { | |
393 | if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP)) | |
394 | clear_regs_spsr_ss(task_pt_regs(task)); | |
395 | } | |
396 | ||
397 | /* Kernel API */ | |
398 | void kernel_enable_single_step(struct pt_regs *regs) | |
399 | { | |
400 | WARN_ON(!irqs_disabled()); | |
401 | set_regs_spsr_ss(regs); | |
402 | mdscr_write(mdscr_read() | DBG_MDSCR_SS); | |
403 | enable_debug_monitors(DBG_ACTIVE_EL1); | |
404 | } | |
44b53f67 | 405 | NOKPROBE_SYMBOL(kernel_enable_single_step); |
478fcb2c WD |
406 | |
407 | void kernel_disable_single_step(void) | |
408 | { | |
409 | WARN_ON(!irqs_disabled()); | |
410 | mdscr_write(mdscr_read() & ~DBG_MDSCR_SS); | |
411 | disable_debug_monitors(DBG_ACTIVE_EL1); | |
412 | } | |
44b53f67 | 413 | NOKPROBE_SYMBOL(kernel_disable_single_step); |
478fcb2c WD |
414 | |
415 | int kernel_active_single_step(void) | |
416 | { | |
417 | WARN_ON(!irqs_disabled()); | |
418 | return mdscr_read() & DBG_MDSCR_SS; | |
419 | } | |
44b53f67 | 420 | NOKPROBE_SYMBOL(kernel_active_single_step); |
478fcb2c WD |
421 | |
422 | /* ptrace API */ | |
423 | void user_enable_single_step(struct task_struct *task) | |
424 | { | |
3a402a70 WD |
425 | struct thread_info *ti = task_thread_info(task); |
426 | ||
427 | if (!test_and_set_ti_thread_flag(ti, TIF_SINGLESTEP)) | |
428 | set_regs_spsr_ss(task_pt_regs(task)); | |
478fcb2c | 429 | } |
44b53f67 | 430 | NOKPROBE_SYMBOL(user_enable_single_step); |
478fcb2c WD |
431 | |
432 | void user_disable_single_step(struct task_struct *task) | |
433 | { | |
434 | clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP); | |
435 | } | |
44b53f67 | 436 | NOKPROBE_SYMBOL(user_disable_single_step); |