]>
Commit | Line | Data |
---|---|---|
478fcb2c WD |
1 | /* |
2 | * ARMv8 single-step debug support and mdscr context switching. | |
3 | * | |
4 | * Copyright (C) 2012 ARM Limited | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
17 | * | |
18 | * Author: Will Deacon <will.deacon@arm.com> | |
19 | */ | |
20 | ||
21 | #include <linux/cpu.h> | |
22 | #include <linux/debugfs.h> | |
23 | #include <linux/hardirq.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/ptrace.h> | |
2dd0e8d2 | 26 | #include <linux/kprobes.h> |
478fcb2c | 27 | #include <linux/stat.h> |
1442b6ed | 28 | #include <linux/uaccess.h> |
68db0cf1 | 29 | #include <linux/sched/task_stack.h> |
478fcb2c | 30 | |
3085bb01 | 31 | #include <asm/cpufeature.h> |
478fcb2c | 32 | #include <asm/cputype.h> |
65be7a1b | 33 | #include <asm/daifflags.h> |
3085bb01 | 34 | #include <asm/debug-monitors.h> |
478fcb2c WD |
35 | #include <asm/system_misc.h> |
36 | ||
478fcb2c WD |
37 | /* Determine debug architecture. */ |
38 | u8 debug_monitors_arch(void) | |
39 | { | |
46823dd1 | 40 | return cpuid_feature_extract_unsigned_field(read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1), |
3085bb01 | 41 | ID_AA64DFR0_DEBUGVER_SHIFT); |
478fcb2c WD |
42 | } |
43 | ||
44 | /* | |
45 | * MDSCR access routines. | |
46 | */ | |
47 | static void mdscr_write(u32 mdscr) | |
48 | { | |
49 | unsigned long flags; | |
65be7a1b | 50 | flags = local_daif_save(); |
adf75899 | 51 | write_sysreg(mdscr, mdscr_el1); |
65be7a1b | 52 | local_daif_restore(flags); |
478fcb2c | 53 | } |
44b53f67 | 54 | NOKPROBE_SYMBOL(mdscr_write); |
478fcb2c WD |
55 | |
56 | static u32 mdscr_read(void) | |
57 | { | |
adf75899 | 58 | return read_sysreg(mdscr_el1); |
478fcb2c | 59 | } |
44b53f67 | 60 | NOKPROBE_SYMBOL(mdscr_read); |
478fcb2c WD |
61 | |
62 | /* | |
63 | * Allow root to disable self-hosted debug from userspace. | |
64 | * This is useful if you want to connect an external JTAG debugger. | |
65 | */ | |
621a5f7a | 66 | static bool debug_enabled = true; |
478fcb2c WD |
67 | |
68 | static int create_debug_debugfs_entry(void) | |
69 | { | |
70 | debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled); | |
71 | return 0; | |
72 | } | |
73 | fs_initcall(create_debug_debugfs_entry); | |
74 | ||
75 | static int __init early_debug_disable(char *buf) | |
76 | { | |
621a5f7a | 77 | debug_enabled = false; |
478fcb2c WD |
78 | return 0; |
79 | } | |
80 | ||
81 | early_param("nodebugmon", early_debug_disable); | |
82 | ||
83 | /* | |
84 | * Keep track of debug users on each core. | |
85 | * The ref counts are per-cpu so we use a local_t type. | |
86 | */ | |
1436c1aa CL |
87 | static DEFINE_PER_CPU(int, mde_ref_count); |
88 | static DEFINE_PER_CPU(int, kde_ref_count); | |
478fcb2c | 89 | |
6f883d10 | 90 | void enable_debug_monitors(enum dbg_active_el el) |
478fcb2c WD |
91 | { |
92 | u32 mdscr, enable = 0; | |
93 | ||
94 | WARN_ON(preemptible()); | |
95 | ||
1436c1aa | 96 | if (this_cpu_inc_return(mde_ref_count) == 1) |
478fcb2c WD |
97 | enable = DBG_MDSCR_MDE; |
98 | ||
99 | if (el == DBG_ACTIVE_EL1 && | |
1436c1aa | 100 | this_cpu_inc_return(kde_ref_count) == 1) |
478fcb2c WD |
101 | enable |= DBG_MDSCR_KDE; |
102 | ||
103 | if (enable && debug_enabled) { | |
104 | mdscr = mdscr_read(); | |
105 | mdscr |= enable; | |
106 | mdscr_write(mdscr); | |
107 | } | |
108 | } | |
44b53f67 | 109 | NOKPROBE_SYMBOL(enable_debug_monitors); |
478fcb2c | 110 | |
6f883d10 | 111 | void disable_debug_monitors(enum dbg_active_el el) |
478fcb2c WD |
112 | { |
113 | u32 mdscr, disable = 0; | |
114 | ||
115 | WARN_ON(preemptible()); | |
116 | ||
1436c1aa | 117 | if (this_cpu_dec_return(mde_ref_count) == 0) |
478fcb2c WD |
118 | disable = ~DBG_MDSCR_MDE; |
119 | ||
120 | if (el == DBG_ACTIVE_EL1 && | |
1436c1aa | 121 | this_cpu_dec_return(kde_ref_count) == 0) |
478fcb2c WD |
122 | disable &= ~DBG_MDSCR_KDE; |
123 | ||
124 | if (disable) { | |
125 | mdscr = mdscr_read(); | |
126 | mdscr &= disable; | |
127 | mdscr_write(mdscr); | |
128 | } | |
129 | } | |
44b53f67 | 130 | NOKPROBE_SYMBOL(disable_debug_monitors); |
478fcb2c WD |
131 | |
132 | /* | |
133 | * OS lock clearing. | |
134 | */ | |
e937dd57 | 135 | static int clear_os_lock(unsigned int cpu) |
478fcb2c | 136 | { |
d971ce33 | 137 | write_sysreg(0, osdlr_el1); |
adf75899 | 138 | write_sysreg(0, oslar_el1); |
e937dd57 WD |
139 | isb(); |
140 | return 0; | |
478fcb2c WD |
141 | } |
142 | ||
b8c6453a | 143 | static int debug_monitors_init(void) |
478fcb2c | 144 | { |
e937dd57 | 145 | return cpuhp_setup_state(CPUHP_AP_ARM64_DEBUG_MONITORS_STARTING, |
73c1b41e | 146 | "arm64/debug_monitors:starting", |
e937dd57 | 147 | clear_os_lock, NULL); |
478fcb2c WD |
148 | } |
149 | postcore_initcall(debug_monitors_init); | |
150 | ||
151 | /* | |
152 | * Single step API and exception handling. | |
153 | */ | |
154 | static void set_regs_spsr_ss(struct pt_regs *regs) | |
155 | { | |
6b68e14e | 156 | regs->pstate |= DBG_SPSR_SS; |
478fcb2c | 157 | } |
44b53f67 | 158 | NOKPROBE_SYMBOL(set_regs_spsr_ss); |
478fcb2c WD |
159 | |
160 | static void clear_regs_spsr_ss(struct pt_regs *regs) | |
161 | { | |
6b68e14e | 162 | regs->pstate &= ~DBG_SPSR_SS; |
478fcb2c | 163 | } |
44b53f67 | 164 | NOKPROBE_SYMBOL(clear_regs_spsr_ss); |
478fcb2c | 165 | |
ee6214ce SP |
166 | /* EL1 Single Step Handler hooks */ |
167 | static LIST_HEAD(step_hook); | |
cf0a2543 | 168 | static DEFINE_SPINLOCK(step_hook_lock); |
ee6214ce SP |
169 | |
170 | void register_step_hook(struct step_hook *hook) | |
171 | { | |
cf0a2543 YS |
172 | spin_lock(&step_hook_lock); |
173 | list_add_rcu(&hook->node, &step_hook); | |
174 | spin_unlock(&step_hook_lock); | |
ee6214ce SP |
175 | } |
176 | ||
177 | void unregister_step_hook(struct step_hook *hook) | |
178 | { | |
cf0a2543 YS |
179 | spin_lock(&step_hook_lock); |
180 | list_del_rcu(&hook->node); | |
181 | spin_unlock(&step_hook_lock); | |
182 | synchronize_rcu(); | |
ee6214ce SP |
183 | } |
184 | ||
185 | /* | |
95485fdc | 186 | * Call registered single step handlers |
ee6214ce SP |
187 | * There is no Syndrome info to check for determining the handler. |
188 | * So we call all the registered handlers, until the right handler is | |
189 | * found which returns zero. | |
190 | */ | |
191 | static int call_step_hook(struct pt_regs *regs, unsigned int esr) | |
192 | { | |
193 | struct step_hook *hook; | |
194 | int retval = DBG_HOOK_ERROR; | |
195 | ||
cf0a2543 | 196 | rcu_read_lock(); |
ee6214ce | 197 | |
cf0a2543 | 198 | list_for_each_entry_rcu(hook, &step_hook, node) { |
ee6214ce SP |
199 | retval = hook->fn(regs, esr); |
200 | if (retval == DBG_HOOK_HANDLED) | |
201 | break; | |
202 | } | |
203 | ||
cf0a2543 | 204 | rcu_read_unlock(); |
ee6214ce SP |
205 | |
206 | return retval; | |
207 | } | |
44b53f67 | 208 | NOKPROBE_SYMBOL(call_step_hook); |
ee6214ce | 209 | |
e04a28d4 WD |
210 | static void send_user_sigtrap(int si_code) |
211 | { | |
212 | struct pt_regs *regs = current_pt_regs(); | |
213 | siginfo_t info = { | |
214 | .si_signo = SIGTRAP, | |
215 | .si_errno = 0, | |
216 | .si_code = si_code, | |
217 | .si_addr = (void __user *)instruction_pointer(regs), | |
218 | }; | |
219 | ||
220 | if (WARN_ON(!user_mode(regs))) | |
221 | return; | |
222 | ||
223 | if (interrupts_enabled(regs)) | |
224 | local_irq_enable(); | |
225 | ||
226 | force_sig_info(SIGTRAP, &info, current); | |
227 | } | |
228 | ||
478fcb2c WD |
229 | static int single_step_handler(unsigned long addr, unsigned int esr, |
230 | struct pt_regs *regs) | |
231 | { | |
3fb69640 PA |
232 | bool handler_found = false; |
233 | ||
478fcb2c WD |
234 | /* |
235 | * If we are stepping a pending breakpoint, call the hw_breakpoint | |
236 | * handler first. | |
237 | */ | |
238 | if (!reinstall_suspended_bps(regs)) | |
239 | return 0; | |
240 | ||
3fb69640 PA |
241 | #ifdef CONFIG_KPROBES |
242 | if (kprobe_single_step_handler(regs, esr) == DBG_HOOK_HANDLED) | |
243 | handler_found = true; | |
244 | #endif | |
245 | if (!handler_found && call_step_hook(regs, esr) == DBG_HOOK_HANDLED) | |
246 | handler_found = true; | |
247 | ||
248 | if (!handler_found && user_mode(regs)) { | |
adeb68ef | 249 | send_user_sigtrap(TRAP_TRACE); |
478fcb2c WD |
250 | |
251 | /* | |
252 | * ptrace will disable single step unless explicitly | |
253 | * asked to re-enable it. For other clients, it makes | |
254 | * sense to leave it enabled (i.e. rewind the controls | |
255 | * to the active-not-pending state). | |
256 | */ | |
257 | user_rewind_single_step(current); | |
3fb69640 PA |
258 | } else if (!handler_found) { |
259 | pr_warn("Unexpected kernel single-step exception at EL1\n"); | |
478fcb2c WD |
260 | /* |
261 | * Re-enable stepping since we know that we will be | |
262 | * returning to regs. | |
263 | */ | |
264 | set_regs_spsr_ss(regs); | |
265 | } | |
266 | ||
267 | return 0; | |
268 | } | |
44b53f67 | 269 | NOKPROBE_SYMBOL(single_step_handler); |
478fcb2c | 270 | |
ee6214ce SP |
271 | /* |
272 | * Breakpoint handler is re-entrant as another breakpoint can | |
273 | * hit within breakpoint handler, especically in kprobes. | |
274 | * Use reader/writer locks instead of plain spinlock. | |
275 | */ | |
276 | static LIST_HEAD(break_hook); | |
62c6c61a | 277 | static DEFINE_SPINLOCK(break_hook_lock); |
ee6214ce SP |
278 | |
279 | void register_break_hook(struct break_hook *hook) | |
280 | { | |
62c6c61a YS |
281 | spin_lock(&break_hook_lock); |
282 | list_add_rcu(&hook->node, &break_hook); | |
283 | spin_unlock(&break_hook_lock); | |
ee6214ce SP |
284 | } |
285 | ||
286 | void unregister_break_hook(struct break_hook *hook) | |
287 | { | |
62c6c61a YS |
288 | spin_lock(&break_hook_lock); |
289 | list_del_rcu(&hook->node); | |
290 | spin_unlock(&break_hook_lock); | |
291 | synchronize_rcu(); | |
ee6214ce SP |
292 | } |
293 | ||
294 | static int call_break_hook(struct pt_regs *regs, unsigned int esr) | |
295 | { | |
296 | struct break_hook *hook; | |
297 | int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL; | |
298 | ||
62c6c61a YS |
299 | rcu_read_lock(); |
300 | list_for_each_entry_rcu(hook, &break_hook, node) | |
ee6214ce SP |
301 | if ((esr & hook->esr_mask) == hook->esr_val) |
302 | fn = hook->fn; | |
62c6c61a | 303 | rcu_read_unlock(); |
ee6214ce SP |
304 | |
305 | return fn ? fn(regs, esr) : DBG_HOOK_ERROR; | |
306 | } | |
44b53f67 | 307 | NOKPROBE_SYMBOL(call_break_hook); |
ee6214ce | 308 | |
1442b6ed WD |
309 | static int brk_handler(unsigned long addr, unsigned int esr, |
310 | struct pt_regs *regs) | |
311 | { | |
53d07e21 PA |
312 | bool handler_found = false; |
313 | ||
2dd0e8d2 | 314 | #ifdef CONFIG_KPROBES |
53d07e21 PA |
315 | if ((esr & BRK64_ESR_MASK) == BRK64_ESR_KPROBES) { |
316 | if (kprobe_breakpoint_handler(regs, esr) == DBG_HOOK_HANDLED) | |
317 | handler_found = true; | |
2dd0e8d2 SP |
318 | } |
319 | #endif | |
53d07e21 PA |
320 | if (!handler_found && call_break_hook(regs, esr) == DBG_HOOK_HANDLED) |
321 | handler_found = true; | |
322 | ||
323 | if (!handler_found && user_mode(regs)) { | |
324 | send_user_sigtrap(TRAP_BRKPT); | |
325 | } else if (!handler_found) { | |
2dd0e8d2 | 326 | pr_warn("Unexpected kernel BRK exception at EL1\n"); |
1442b6ed | 327 | return -EFAULT; |
c878e0cf | 328 | } |
1442b6ed | 329 | |
1442b6ed WD |
330 | return 0; |
331 | } | |
44b53f67 | 332 | NOKPROBE_SYMBOL(brk_handler); |
1442b6ed WD |
333 | |
334 | int aarch32_break_handler(struct pt_regs *regs) | |
335 | { | |
2dacab73 ML |
336 | u32 arm_instr; |
337 | u16 thumb_instr; | |
1442b6ed WD |
338 | bool bp = false; |
339 | void __user *pc = (void __user *)instruction_pointer(regs); | |
340 | ||
341 | if (!compat_user_mode(regs)) | |
342 | return -EFAULT; | |
343 | ||
344 | if (compat_thumb_mode(regs)) { | |
345 | /* get 16-bit Thumb instruction */ | |
a5018b0e LVO |
346 | __le16 instr; |
347 | get_user(instr, (__le16 __user *)pc); | |
348 | thumb_instr = le16_to_cpu(instr); | |
2dacab73 | 349 | if (thumb_instr == AARCH32_BREAK_THUMB2_LO) { |
1442b6ed | 350 | /* get second half of 32-bit Thumb-2 instruction */ |
a5018b0e LVO |
351 | get_user(instr, (__le16 __user *)(pc + 2)); |
352 | thumb_instr = le16_to_cpu(instr); | |
2dacab73 | 353 | bp = thumb_instr == AARCH32_BREAK_THUMB2_HI; |
1442b6ed | 354 | } else { |
2dacab73 | 355 | bp = thumb_instr == AARCH32_BREAK_THUMB; |
1442b6ed WD |
356 | } |
357 | } else { | |
358 | /* 32-bit ARM instruction */ | |
a5018b0e LVO |
359 | __le32 instr; |
360 | get_user(instr, (__le32 __user *)pc); | |
361 | arm_instr = le32_to_cpu(instr); | |
2dacab73 | 362 | bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM; |
1442b6ed WD |
363 | } |
364 | ||
365 | if (!bp) | |
366 | return -EFAULT; | |
367 | ||
e04a28d4 | 368 | send_user_sigtrap(TRAP_BRKPT); |
1442b6ed WD |
369 | return 0; |
370 | } | |
44b53f67 | 371 | NOKPROBE_SYMBOL(aarch32_break_handler); |
1442b6ed WD |
372 | |
373 | static int __init debug_traps_init(void) | |
478fcb2c WD |
374 | { |
375 | hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP, | |
adeb68ef | 376 | TRAP_TRACE, "single-step handler"); |
1442b6ed WD |
377 | hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP, |
378 | TRAP_BRKPT, "ptrace BRK handler"); | |
478fcb2c WD |
379 | return 0; |
380 | } | |
1442b6ed | 381 | arch_initcall(debug_traps_init); |
478fcb2c WD |
382 | |
383 | /* Re-enable single step for syscall restarting. */ | |
384 | void user_rewind_single_step(struct task_struct *task) | |
385 | { | |
386 | /* | |
387 | * If single step is active for this thread, then set SPSR.SS | |
388 | * to 1 to avoid returning to the active-pending state. | |
389 | */ | |
390 | if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP)) | |
391 | set_regs_spsr_ss(task_pt_regs(task)); | |
392 | } | |
44b53f67 | 393 | NOKPROBE_SYMBOL(user_rewind_single_step); |
478fcb2c WD |
394 | |
395 | void user_fastforward_single_step(struct task_struct *task) | |
396 | { | |
397 | if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP)) | |
398 | clear_regs_spsr_ss(task_pt_regs(task)); | |
399 | } | |
400 | ||
401 | /* Kernel API */ | |
402 | void kernel_enable_single_step(struct pt_regs *regs) | |
403 | { | |
404 | WARN_ON(!irqs_disabled()); | |
405 | set_regs_spsr_ss(regs); | |
406 | mdscr_write(mdscr_read() | DBG_MDSCR_SS); | |
407 | enable_debug_monitors(DBG_ACTIVE_EL1); | |
408 | } | |
44b53f67 | 409 | NOKPROBE_SYMBOL(kernel_enable_single_step); |
478fcb2c WD |
410 | |
411 | void kernel_disable_single_step(void) | |
412 | { | |
413 | WARN_ON(!irqs_disabled()); | |
414 | mdscr_write(mdscr_read() & ~DBG_MDSCR_SS); | |
415 | disable_debug_monitors(DBG_ACTIVE_EL1); | |
416 | } | |
44b53f67 | 417 | NOKPROBE_SYMBOL(kernel_disable_single_step); |
478fcb2c WD |
418 | |
419 | int kernel_active_single_step(void) | |
420 | { | |
421 | WARN_ON(!irqs_disabled()); | |
422 | return mdscr_read() & DBG_MDSCR_SS; | |
423 | } | |
44b53f67 | 424 | NOKPROBE_SYMBOL(kernel_active_single_step); |
478fcb2c WD |
425 | |
426 | /* ptrace API */ | |
427 | void user_enable_single_step(struct task_struct *task) | |
428 | { | |
3a402a70 WD |
429 | struct thread_info *ti = task_thread_info(task); |
430 | ||
431 | if (!test_and_set_ti_thread_flag(ti, TIF_SINGLESTEP)) | |
432 | set_regs_spsr_ss(task_pt_regs(task)); | |
478fcb2c | 433 | } |
44b53f67 | 434 | NOKPROBE_SYMBOL(user_enable_single_step); |
478fcb2c WD |
435 | |
436 | void user_disable_single_step(struct task_struct *task) | |
437 | { | |
438 | clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP); | |
439 | } | |
44b53f67 | 440 | NOKPROBE_SYMBOL(user_disable_single_step); |