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53631b54 CM |
1 | /* |
2 | * FP/SIMD context switching and fault handling | |
3 | * | |
4 | * Copyright (C) 2012 ARM Ltd. | |
5 | * Author: Catalin Marinas <catalin.marinas@arm.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
32365e64 | 20 | #include <linux/cpu.h> |
fb1ab1ab | 21 | #include <linux/cpu_pm.h> |
53631b54 CM |
22 | #include <linux/kernel.h> |
23 | #include <linux/init.h> | |
24 | #include <linux/sched.h> | |
25 | #include <linux/signal.h> | |
4cfb3613 | 26 | #include <linux/hardirq.h> |
53631b54 CM |
27 | |
28 | #include <asm/fpsimd.h> | |
29 | #include <asm/cputype.h> | |
30 | ||
31 | #define FPEXC_IOF (1 << 0) | |
32 | #define FPEXC_DZF (1 << 1) | |
33 | #define FPEXC_OFF (1 << 2) | |
34 | #define FPEXC_UFF (1 << 3) | |
35 | #define FPEXC_IXF (1 << 4) | |
36 | #define FPEXC_IDF (1 << 7) | |
37 | ||
005f78cd AB |
38 | /* |
39 | * In order to reduce the number of times the FPSIMD state is needlessly saved | |
40 | * and restored, we need to keep track of two things: | |
41 | * (a) for each task, we need to remember which CPU was the last one to have | |
42 | * the task's FPSIMD state loaded into its FPSIMD registers; | |
43 | * (b) for each CPU, we need to remember which task's userland FPSIMD state has | |
44 | * been loaded into its FPSIMD registers most recently, or whether it has | |
45 | * been used to perform kernel mode NEON in the meantime. | |
46 | * | |
47 | * For (a), we add a 'cpu' field to struct fpsimd_state, which gets updated to | |
ef769e32 | 48 | * the id of the current CPU every time the state is loaded onto a CPU. For (b), |
005f78cd AB |
49 | * we add the per-cpu variable 'fpsimd_last_state' (below), which contains the |
50 | * address of the userland FPSIMD state of the task that was loaded onto the CPU | |
51 | * the most recently, or NULL if kernel mode NEON has been performed after that. | |
52 | * | |
53 | * With this in place, we no longer have to restore the next FPSIMD state right | |
54 | * when switching between tasks. Instead, we can defer this check to userland | |
55 | * resume, at which time we verify whether the CPU's fpsimd_last_state and the | |
56 | * task's fpsimd_state.cpu are still mutually in sync. If this is the case, we | |
57 | * can omit the FPSIMD restore. | |
58 | * | |
59 | * As an optimization, we use the thread_info flag TIF_FOREIGN_FPSTATE to | |
60 | * indicate whether or not the userland FPSIMD state of the current task is | |
61 | * present in the registers. The flag is set unless the FPSIMD registers of this | |
62 | * CPU currently contain the most recent userland FPSIMD state of the current | |
63 | * task. | |
64 | * | |
65 | * For a certain task, the sequence may look something like this: | |
66 | * - the task gets scheduled in; if both the task's fpsimd_state.cpu field | |
67 | * contains the id of the current CPU, and the CPU's fpsimd_last_state per-cpu | |
68 | * variable points to the task's fpsimd_state, the TIF_FOREIGN_FPSTATE flag is | |
69 | * cleared, otherwise it is set; | |
70 | * | |
71 | * - the task returns to userland; if TIF_FOREIGN_FPSTATE is set, the task's | |
72 | * userland FPSIMD state is copied from memory to the registers, the task's | |
73 | * fpsimd_state.cpu field is set to the id of the current CPU, the current | |
74 | * CPU's fpsimd_last_state pointer is set to this task's fpsimd_state and the | |
75 | * TIF_FOREIGN_FPSTATE flag is cleared; | |
76 | * | |
77 | * - the task executes an ordinary syscall; upon return to userland, the | |
78 | * TIF_FOREIGN_FPSTATE flag will still be cleared, so no FPSIMD state is | |
79 | * restored; | |
80 | * | |
81 | * - the task executes a syscall which executes some NEON instructions; this is | |
82 | * preceded by a call to kernel_neon_begin(), which copies the task's FPSIMD | |
83 | * register contents to memory, clears the fpsimd_last_state per-cpu variable | |
84 | * and sets the TIF_FOREIGN_FPSTATE flag; | |
85 | * | |
86 | * - the task gets preempted after kernel_neon_end() is called; as we have not | |
87 | * returned from the 2nd syscall yet, TIF_FOREIGN_FPSTATE is still set so | |
88 | * whatever is in the FPSIMD registers is not saved to memory, but discarded. | |
89 | */ | |
90 | static DEFINE_PER_CPU(struct fpsimd_state *, fpsimd_last_state); | |
91 | ||
53631b54 CM |
92 | /* |
93 | * Trapped FP/ASIMD access. | |
94 | */ | |
95 | void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs) | |
96 | { | |
97 | /* TODO: implement lazy context saving/restoring */ | |
98 | WARN_ON(1); | |
99 | } | |
100 | ||
101 | /* | |
102 | * Raise a SIGFPE for the current process. | |
103 | */ | |
104 | void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs) | |
105 | { | |
106 | siginfo_t info; | |
107 | unsigned int si_code = 0; | |
108 | ||
109 | if (esr & FPEXC_IOF) | |
110 | si_code = FPE_FLTINV; | |
111 | else if (esr & FPEXC_DZF) | |
112 | si_code = FPE_FLTDIV; | |
113 | else if (esr & FPEXC_OFF) | |
114 | si_code = FPE_FLTOVF; | |
115 | else if (esr & FPEXC_UFF) | |
116 | si_code = FPE_FLTUND; | |
117 | else if (esr & FPEXC_IXF) | |
118 | si_code = FPE_FLTRES; | |
119 | ||
120 | memset(&info, 0, sizeof(info)); | |
121 | info.si_signo = SIGFPE; | |
122 | info.si_code = si_code; | |
123 | info.si_addr = (void __user *)instruction_pointer(regs); | |
124 | ||
125 | send_sig_info(SIGFPE, &info, current); | |
126 | } | |
127 | ||
128 | void fpsimd_thread_switch(struct task_struct *next) | |
129 | { | |
82e0191a SP |
130 | if (!system_supports_fpsimd()) |
131 | return; | |
005f78cd AB |
132 | /* |
133 | * Save the current FPSIMD state to memory, but only if whatever is in | |
134 | * the registers is in fact the most recent userland FPSIMD state of | |
135 | * 'current'. | |
136 | */ | |
137 | if (current->mm && !test_thread_flag(TIF_FOREIGN_FPSTATE)) | |
53631b54 | 138 | fpsimd_save_state(¤t->thread.fpsimd_state); |
005f78cd AB |
139 | |
140 | if (next->mm) { | |
141 | /* | |
142 | * If we are switching to a task whose most recent userland | |
143 | * FPSIMD state is already in the registers of *this* cpu, | |
144 | * we can skip loading the state from memory. Otherwise, set | |
145 | * the TIF_FOREIGN_FPSTATE flag so the state will be loaded | |
146 | * upon the next return to userland. | |
147 | */ | |
148 | struct fpsimd_state *st = &next->thread.fpsimd_state; | |
149 | ||
150 | if (__this_cpu_read(fpsimd_last_state) == st | |
151 | && st->cpu == smp_processor_id()) | |
152 | clear_ti_thread_flag(task_thread_info(next), | |
153 | TIF_FOREIGN_FPSTATE); | |
154 | else | |
155 | set_ti_thread_flag(task_thread_info(next), | |
156 | TIF_FOREIGN_FPSTATE); | |
157 | } | |
53631b54 CM |
158 | } |
159 | ||
160 | void fpsimd_flush_thread(void) | |
161 | { | |
82e0191a SP |
162 | if (!system_supports_fpsimd()) |
163 | return; | |
53631b54 | 164 | memset(¤t->thread.fpsimd_state, 0, sizeof(struct fpsimd_state)); |
674c242c | 165 | fpsimd_flush_task_state(current); |
005f78cd | 166 | set_thread_flag(TIF_FOREIGN_FPSTATE); |
53631b54 CM |
167 | } |
168 | ||
c51f9269 | 169 | /* |
005f78cd AB |
170 | * Save the userland FPSIMD state of 'current' to memory, but only if the state |
171 | * currently held in the registers does in fact belong to 'current' | |
c51f9269 AB |
172 | */ |
173 | void fpsimd_preserve_current_state(void) | |
174 | { | |
82e0191a SP |
175 | if (!system_supports_fpsimd()) |
176 | return; | |
c51f9269 | 177 | preempt_disable(); |
005f78cd AB |
178 | if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) |
179 | fpsimd_save_state(¤t->thread.fpsimd_state); | |
c51f9269 AB |
180 | preempt_enable(); |
181 | } | |
182 | ||
183 | /* | |
005f78cd AB |
184 | * Load the userland FPSIMD state of 'current' from memory, but only if the |
185 | * FPSIMD state already held in the registers is /not/ the most recent FPSIMD | |
186 | * state of 'current' | |
187 | */ | |
188 | void fpsimd_restore_current_state(void) | |
189 | { | |
82e0191a SP |
190 | if (!system_supports_fpsimd()) |
191 | return; | |
005f78cd AB |
192 | preempt_disable(); |
193 | if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) { | |
194 | struct fpsimd_state *st = ¤t->thread.fpsimd_state; | |
195 | ||
196 | fpsimd_load_state(st); | |
197 | this_cpu_write(fpsimd_last_state, st); | |
198 | st->cpu = smp_processor_id(); | |
199 | } | |
200 | preempt_enable(); | |
201 | } | |
202 | ||
203 | /* | |
204 | * Load an updated userland FPSIMD state for 'current' from memory and set the | |
205 | * flag that indicates that the FPSIMD register contents are the most recent | |
206 | * FPSIMD state of 'current' | |
c51f9269 AB |
207 | */ |
208 | void fpsimd_update_current_state(struct fpsimd_state *state) | |
209 | { | |
82e0191a SP |
210 | if (!system_supports_fpsimd()) |
211 | return; | |
c51f9269 AB |
212 | preempt_disable(); |
213 | fpsimd_load_state(state); | |
005f78cd AB |
214 | if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) { |
215 | struct fpsimd_state *st = ¤t->thread.fpsimd_state; | |
216 | ||
217 | this_cpu_write(fpsimd_last_state, st); | |
218 | st->cpu = smp_processor_id(); | |
219 | } | |
c51f9269 AB |
220 | preempt_enable(); |
221 | } | |
222 | ||
005f78cd AB |
223 | /* |
224 | * Invalidate live CPU copies of task t's FPSIMD state | |
225 | */ | |
226 | void fpsimd_flush_task_state(struct task_struct *t) | |
227 | { | |
228 | t->thread.fpsimd_state.cpu = NR_CPUS; | |
229 | } | |
230 | ||
4cfb3613 AB |
231 | #ifdef CONFIG_KERNEL_MODE_NEON |
232 | ||
190f1ca8 AB |
233 | static DEFINE_PER_CPU(struct fpsimd_partial_state, hardirq_fpsimdstate); |
234 | static DEFINE_PER_CPU(struct fpsimd_partial_state, softirq_fpsimdstate); | |
235 | ||
4cfb3613 AB |
236 | /* |
237 | * Kernel-side NEON support functions | |
238 | */ | |
190f1ca8 | 239 | void kernel_neon_begin_partial(u32 num_regs) |
4cfb3613 | 240 | { |
82e0191a SP |
241 | if (WARN_ON(!system_supports_fpsimd())) |
242 | return; | |
190f1ca8 AB |
243 | if (in_interrupt()) { |
244 | struct fpsimd_partial_state *s = this_cpu_ptr( | |
245 | in_irq() ? &hardirq_fpsimdstate : &softirq_fpsimdstate); | |
4cfb3613 | 246 | |
190f1ca8 AB |
247 | BUG_ON(num_regs > 32); |
248 | fpsimd_save_partial_state(s, roundup(num_regs, 2)); | |
249 | } else { | |
250 | /* | |
251 | * Save the userland FPSIMD state if we have one and if we | |
252 | * haven't done so already. Clear fpsimd_last_state to indicate | |
253 | * that there is no longer userland FPSIMD state in the | |
254 | * registers. | |
255 | */ | |
256 | preempt_disable(); | |
257 | if (current->mm && | |
258 | !test_and_set_thread_flag(TIF_FOREIGN_FPSTATE)) | |
259 | fpsimd_save_state(¤t->thread.fpsimd_state); | |
260 | this_cpu_write(fpsimd_last_state, NULL); | |
261 | } | |
4cfb3613 | 262 | } |
190f1ca8 | 263 | EXPORT_SYMBOL(kernel_neon_begin_partial); |
4cfb3613 AB |
264 | |
265 | void kernel_neon_end(void) | |
266 | { | |
82e0191a SP |
267 | if (!system_supports_fpsimd()) |
268 | return; | |
190f1ca8 AB |
269 | if (in_interrupt()) { |
270 | struct fpsimd_partial_state *s = this_cpu_ptr( | |
271 | in_irq() ? &hardirq_fpsimdstate : &softirq_fpsimdstate); | |
272 | fpsimd_load_partial_state(s); | |
273 | } else { | |
274 | preempt_enable(); | |
275 | } | |
4cfb3613 AB |
276 | } |
277 | EXPORT_SYMBOL(kernel_neon_end); | |
278 | ||
279 | #endif /* CONFIG_KERNEL_MODE_NEON */ | |
280 | ||
fb1ab1ab LP |
281 | #ifdef CONFIG_CPU_PM |
282 | static int fpsimd_cpu_pm_notifier(struct notifier_block *self, | |
283 | unsigned long cmd, void *v) | |
284 | { | |
285 | switch (cmd) { | |
286 | case CPU_PM_ENTER: | |
005f78cd | 287 | if (current->mm && !test_thread_flag(TIF_FOREIGN_FPSTATE)) |
fb1ab1ab | 288 | fpsimd_save_state(¤t->thread.fpsimd_state); |
7c68a9cc | 289 | this_cpu_write(fpsimd_last_state, NULL); |
fb1ab1ab LP |
290 | break; |
291 | case CPU_PM_EXIT: | |
292 | if (current->mm) | |
005f78cd | 293 | set_thread_flag(TIF_FOREIGN_FPSTATE); |
fb1ab1ab LP |
294 | break; |
295 | case CPU_PM_ENTER_FAILED: | |
296 | default: | |
297 | return NOTIFY_DONE; | |
298 | } | |
299 | return NOTIFY_OK; | |
300 | } | |
301 | ||
302 | static struct notifier_block fpsimd_cpu_pm_notifier_block = { | |
303 | .notifier_call = fpsimd_cpu_pm_notifier, | |
304 | }; | |
305 | ||
a7c61a34 | 306 | static void __init fpsimd_pm_init(void) |
fb1ab1ab LP |
307 | { |
308 | cpu_pm_register_notifier(&fpsimd_cpu_pm_notifier_block); | |
309 | } | |
310 | ||
311 | #else | |
312 | static inline void fpsimd_pm_init(void) { } | |
313 | #endif /* CONFIG_CPU_PM */ | |
314 | ||
32365e64 | 315 | #ifdef CONFIG_HOTPLUG_CPU |
c23a7266 | 316 | static int fpsimd_cpu_dead(unsigned int cpu) |
32365e64 | 317 | { |
c23a7266 SAS |
318 | per_cpu(fpsimd_last_state, cpu) = NULL; |
319 | return 0; | |
32365e64 JL |
320 | } |
321 | ||
32365e64 JL |
322 | static inline void fpsimd_hotplug_init(void) |
323 | { | |
c23a7266 SAS |
324 | cpuhp_setup_state_nocalls(CPUHP_ARM64_FPSIMD_DEAD, "arm64/fpsimd:dead", |
325 | NULL, fpsimd_cpu_dead); | |
32365e64 JL |
326 | } |
327 | ||
328 | #else | |
329 | static inline void fpsimd_hotplug_init(void) { } | |
330 | #endif | |
331 | ||
53631b54 CM |
332 | /* |
333 | * FP/SIMD support code initialisation. | |
334 | */ | |
335 | static int __init fpsimd_init(void) | |
336 | { | |
fe80f9f2 SP |
337 | if (elf_hwcap & HWCAP_FP) { |
338 | fpsimd_pm_init(); | |
339 | fpsimd_hotplug_init(); | |
340 | } else { | |
53631b54 | 341 | pr_notice("Floating-point is not implemented\n"); |
53631b54 | 342 | } |
53631b54 | 343 | |
fe80f9f2 | 344 | if (!(elf_hwcap & HWCAP_ASIMD)) |
53631b54 | 345 | pr_notice("Advanced SIMD is not implemented\n"); |
fb1ab1ab | 346 | |
53631b54 CM |
347 | return 0; |
348 | } | |
349 | late_initcall(fpsimd_init); |