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b3901d54 CM |
1 | /* |
2 | * Based on arch/arm/kernel/process.c | |
3 | * | |
4 | * Original Copyright (C) 1995 Linus Torvalds | |
5 | * Copyright (C) 1996-2000 Russell King - Converted to ARM. | |
6 | * Copyright (C) 2012 ARM Ltd. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
21 | #include <stdarg.h> | |
22 | ||
23 | #include <linux/export.h> | |
24 | #include <linux/sched.h> | |
25 | #include <linux/kernel.h> | |
26 | #include <linux/mm.h> | |
27 | #include <linux/stddef.h> | |
28 | #include <linux/unistd.h> | |
29 | #include <linux/user.h> | |
30 | #include <linux/delay.h> | |
31 | #include <linux/reboot.h> | |
32 | #include <linux/interrupt.h> | |
33 | #include <linux/kallsyms.h> | |
34 | #include <linux/init.h> | |
35 | #include <linux/cpu.h> | |
36 | #include <linux/elfcore.h> | |
37 | #include <linux/pm.h> | |
38 | #include <linux/tick.h> | |
39 | #include <linux/utsname.h> | |
40 | #include <linux/uaccess.h> | |
41 | #include <linux/random.h> | |
42 | #include <linux/hw_breakpoint.h> | |
43 | #include <linux/personality.h> | |
44 | #include <linux/notifier.h> | |
45 | ||
46 | #include <asm/compat.h> | |
47 | #include <asm/cacheflush.h> | |
ec45d1cf WD |
48 | #include <asm/fpsimd.h> |
49 | #include <asm/mmu_context.h> | |
b3901d54 CM |
50 | #include <asm/processor.h> |
51 | #include <asm/stacktrace.h> | |
b3901d54 CM |
52 | |
53 | static void setup_restart(void) | |
54 | { | |
55 | /* | |
56 | * Tell the mm system that we are going to reboot - | |
57 | * we may need it to insert some 1:1 mappings so that | |
58 | * soft boot works. | |
59 | */ | |
60 | setup_mm_for_reboot(); | |
61 | ||
62 | /* Clean and invalidate caches */ | |
63 | flush_cache_all(); | |
64 | ||
65 | /* Turn D-cache off */ | |
66 | cpu_cache_off(); | |
67 | ||
68 | /* Push out any further dirty data, and ensure cache is empty */ | |
69 | flush_cache_all(); | |
70 | } | |
71 | ||
72 | void soft_restart(unsigned long addr) | |
73 | { | |
74 | setup_restart(); | |
75 | cpu_reset(addr); | |
76 | } | |
77 | ||
78 | /* | |
79 | * Function pointers to optional machine specific functions | |
80 | */ | |
81 | void (*pm_power_off)(void); | |
82 | EXPORT_SYMBOL_GPL(pm_power_off); | |
83 | ||
b0946fc8 | 84 | void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd); |
aa1e8ec1 | 85 | EXPORT_SYMBOL_GPL(arm_pm_restart); |
b3901d54 | 86 | |
0087298f TG |
87 | void arch_cpu_idle_prepare(void) |
88 | { | |
89 | local_fiq_enable(); | |
90 | } | |
b3901d54 CM |
91 | |
92 | /* | |
93 | * This is our default idle handler. | |
94 | */ | |
0087298f | 95 | void arch_cpu_idle(void) |
b3901d54 CM |
96 | { |
97 | /* | |
98 | * This should do all the clock switching and wait for interrupt | |
99 | * tricks | |
100 | */ | |
101 | cpu_do_idle(); | |
102 | local_irq_enable(); | |
103 | } | |
104 | ||
b3901d54 CM |
105 | void machine_shutdown(void) |
106 | { | |
107 | #ifdef CONFIG_SMP | |
108 | smp_send_stop(); | |
109 | #endif | |
110 | } | |
111 | ||
112 | void machine_halt(void) | |
113 | { | |
114 | machine_shutdown(); | |
115 | while (1); | |
116 | } | |
117 | ||
118 | void machine_power_off(void) | |
119 | { | |
120 | machine_shutdown(); | |
121 | if (pm_power_off) | |
122 | pm_power_off(); | |
123 | } | |
124 | ||
125 | void machine_restart(char *cmd) | |
126 | { | |
127 | machine_shutdown(); | |
128 | ||
129 | /* Disable interrupts first */ | |
130 | local_irq_disable(); | |
131 | local_fiq_disable(); | |
132 | ||
133 | /* Now call the architecture specific reboot code. */ | |
aa1e8ec1 | 134 | if (arm_pm_restart) |
ff701306 | 135 | arm_pm_restart(reboot_mode, cmd); |
b3901d54 CM |
136 | |
137 | /* | |
138 | * Whoops - the architecture was unable to reboot. | |
139 | */ | |
140 | printk("Reboot failed -- System halted\n"); | |
141 | while (1); | |
142 | } | |
143 | ||
144 | void __show_regs(struct pt_regs *regs) | |
145 | { | |
6ca68e80 CM |
146 | int i, top_reg; |
147 | u64 lr, sp; | |
148 | ||
149 | if (compat_user_mode(regs)) { | |
150 | lr = regs->compat_lr; | |
151 | sp = regs->compat_sp; | |
152 | top_reg = 12; | |
153 | } else { | |
154 | lr = regs->regs[30]; | |
155 | sp = regs->sp; | |
156 | top_reg = 29; | |
157 | } | |
b3901d54 | 158 | |
a43cb95d | 159 | show_regs_print_info(KERN_DEFAULT); |
b3901d54 | 160 | print_symbol("PC is at %s\n", instruction_pointer(regs)); |
6ca68e80 | 161 | print_symbol("LR is at %s\n", lr); |
b3901d54 | 162 | printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n", |
6ca68e80 CM |
163 | regs->pc, lr, regs->pstate); |
164 | printk("sp : %016llx\n", sp); | |
165 | for (i = top_reg; i >= 0; i--) { | |
b3901d54 CM |
166 | printk("x%-2d: %016llx ", i, regs->regs[i]); |
167 | if (i % 2 == 0) | |
168 | printk("\n"); | |
169 | } | |
170 | printk("\n"); | |
171 | } | |
172 | ||
173 | void show_regs(struct pt_regs * regs) | |
174 | { | |
175 | printk("\n"); | |
b3901d54 CM |
176 | __show_regs(regs); |
177 | } | |
178 | ||
179 | /* | |
180 | * Free current thread data structures etc.. | |
181 | */ | |
182 | void exit_thread(void) | |
183 | { | |
184 | } | |
185 | ||
186 | void flush_thread(void) | |
187 | { | |
188 | fpsimd_flush_thread(); | |
189 | flush_ptrace_hw_breakpoint(current); | |
190 | } | |
191 | ||
192 | void release_thread(struct task_struct *dead_task) | |
193 | { | |
194 | } | |
195 | ||
196 | int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) | |
197 | { | |
198 | fpsimd_save_state(¤t->thread.fpsimd_state); | |
199 | *dst = *src; | |
200 | return 0; | |
201 | } | |
202 | ||
203 | asmlinkage void ret_from_fork(void) asm("ret_from_fork"); | |
204 | ||
205 | int copy_thread(unsigned long clone_flags, unsigned long stack_start, | |
afa86fc4 | 206 | unsigned long stk_sz, struct task_struct *p) |
b3901d54 CM |
207 | { |
208 | struct pt_regs *childregs = task_pt_regs(p); | |
209 | unsigned long tls = p->thread.tp_value; | |
210 | ||
c34501d2 | 211 | memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context)); |
b3901d54 | 212 | |
9ac08002 AV |
213 | if (likely(!(p->flags & PF_KTHREAD))) { |
214 | *childregs = *current_pt_regs(); | |
c34501d2 CM |
215 | childregs->regs[0] = 0; |
216 | if (is_compat_thread(task_thread_info(p))) { | |
e0fd18ce AV |
217 | if (stack_start) |
218 | childregs->compat_sp = stack_start; | |
c34501d2 CM |
219 | } else { |
220 | /* | |
221 | * Read the current TLS pointer from tpidr_el0 as it may be | |
222 | * out-of-sync with the saved value. | |
223 | */ | |
224 | asm("mrs %0, tpidr_el0" : "=r" (tls)); | |
e0fd18ce AV |
225 | if (stack_start) { |
226 | /* 16-byte aligned stack mandatory on AArch64 */ | |
227 | if (stack_start & 15) | |
228 | return -EINVAL; | |
229 | childregs->sp = stack_start; | |
230 | } | |
c34501d2 | 231 | } |
b3901d54 | 232 | /* |
c34501d2 CM |
233 | * If a TLS pointer was passed to clone (4th argument), use it |
234 | * for the new thread. | |
b3901d54 | 235 | */ |
c34501d2 | 236 | if (clone_flags & CLONE_SETTLS) |
9ac08002 | 237 | tls = childregs->regs[3]; |
c34501d2 CM |
238 | } else { |
239 | memset(childregs, 0, sizeof(struct pt_regs)); | |
240 | childregs->pstate = PSR_MODE_EL1h; | |
241 | p->thread.cpu_context.x19 = stack_start; | |
242 | p->thread.cpu_context.x20 = stk_sz; | |
b3901d54 | 243 | } |
b3901d54 | 244 | p->thread.cpu_context.pc = (unsigned long)ret_from_fork; |
c34501d2 | 245 | p->thread.cpu_context.sp = (unsigned long)childregs; |
b3901d54 CM |
246 | p->thread.tp_value = tls; |
247 | ||
248 | ptrace_hw_copy_thread(p); | |
249 | ||
250 | return 0; | |
251 | } | |
252 | ||
253 | static void tls_thread_switch(struct task_struct *next) | |
254 | { | |
255 | unsigned long tpidr, tpidrro; | |
256 | ||
257 | if (!is_compat_task()) { | |
258 | asm("mrs %0, tpidr_el0" : "=r" (tpidr)); | |
259 | current->thread.tp_value = tpidr; | |
260 | } | |
261 | ||
262 | if (is_compat_thread(task_thread_info(next))) { | |
263 | tpidr = 0; | |
264 | tpidrro = next->thread.tp_value; | |
265 | } else { | |
266 | tpidr = next->thread.tp_value; | |
267 | tpidrro = 0; | |
268 | } | |
269 | ||
270 | asm( | |
271 | " msr tpidr_el0, %0\n" | |
272 | " msr tpidrro_el0, %1" | |
273 | : : "r" (tpidr), "r" (tpidrro)); | |
274 | } | |
275 | ||
276 | /* | |
277 | * Thread switching. | |
278 | */ | |
279 | struct task_struct *__switch_to(struct task_struct *prev, | |
280 | struct task_struct *next) | |
281 | { | |
282 | struct task_struct *last; | |
283 | ||
284 | fpsimd_thread_switch(next); | |
285 | tls_thread_switch(next); | |
286 | hw_breakpoint_thread_switch(next); | |
3325732f | 287 | contextidr_thread_switch(next); |
b3901d54 | 288 | |
5108c67c CM |
289 | /* |
290 | * Complete any pending TLB or cache maintenance on this CPU in case | |
291 | * the thread migrates to a different CPU. | |
292 | */ | |
293 | dsb(); | |
b3901d54 CM |
294 | |
295 | /* the actual thread switch */ | |
296 | last = cpu_switch_to(prev, next); | |
297 | ||
298 | return last; | |
299 | } | |
300 | ||
b3901d54 CM |
301 | unsigned long get_wchan(struct task_struct *p) |
302 | { | |
303 | struct stackframe frame; | |
304 | int count = 0; | |
305 | if (!p || p == current || p->state == TASK_RUNNING) | |
306 | return 0; | |
307 | ||
308 | frame.fp = thread_saved_fp(p); | |
309 | frame.sp = thread_saved_sp(p); | |
310 | frame.pc = thread_saved_pc(p); | |
311 | do { | |
312 | int ret = unwind_frame(&frame); | |
313 | if (ret < 0) | |
314 | return 0; | |
315 | if (!in_sched_functions(frame.pc)) | |
316 | return frame.pc; | |
317 | } while (count ++ < 16); | |
318 | return 0; | |
319 | } | |
320 | ||
321 | unsigned long arch_align_stack(unsigned long sp) | |
322 | { | |
323 | if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) | |
324 | sp -= get_random_int() & ~PAGE_MASK; | |
325 | return sp & ~0xf; | |
326 | } | |
327 | ||
328 | static unsigned long randomize_base(unsigned long base) | |
329 | { | |
330 | unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1; | |
331 | return randomize_range(base, range_end, 0) ? : base; | |
332 | } | |
333 | ||
334 | unsigned long arch_randomize_brk(struct mm_struct *mm) | |
335 | { | |
336 | return randomize_base(mm->brk); | |
337 | } | |
338 | ||
339 | unsigned long randomize_et_dyn(unsigned long base) | |
340 | { | |
341 | return randomize_base(base); | |
342 | } |