[mirror_ubuntu-zesty-kernel.git] / arch / arm64 / kernel / setup.c

/*
 * Based on arch/arm/kernel/setup.c
 *
 * Copyright (C) 1995-2001 Russell King
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/utsname.h>
#include <linux/initrd.h>
#include <linux/console.h>
#include <linux/bootmem.h>
#include <linux/seq_file.h>
#include <linux/screen_info.h>
#include <linux/init.h>
#include <linux/kexec.h>
#include <linux/crash_dump.h>
#include <linux/root_dev.h>
#include <linux/clk-provider.h>
#include <linux/cpu.h>
#include <linux/interrupt.h>
#include <linux/smp.h>
#include <linux/fs.h>
#include <linux/proc_fs.h>
#include <linux/memblock.h>
#include <linux/of_fdt.h>
#include <linux/of_platform.h>

#include <asm/cputype.h>
#include <asm/elf.h>
#include <asm/cputable.h>
#include <asm/sections.h>
#include <asm/setup.h>
#include <asm/smp_plat.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
#include <asm/traps.h>
#include <asm/memblock.h>
#include <asm/psci.h>

unsigned int processor_id;
EXPORT_SYMBOL(processor_id);

unsigned int elf_hwcap __read_mostly;
EXPORT_SYMBOL_GPL(elf_hwcap);

static const char *cpu_name;
static const char *machine_name;
phys_addr_t __fdt_pointer __initdata;

/*
 * Standard memory resources
 */
static struct resource mem_res[] = {
	{
		.name = "Kernel code",
		.start = 0,
		.end = 0,
		.flags = IORESOURCE_MEM
	},
	{
		.name = "Kernel data",
		.start = 0,
		.end = 0,
		.flags = IORESOURCE_MEM
	}
};

#define kernel_code mem_res[0]
#define kernel_data mem_res[1]

void __init early_print(const char *str, ...)
{
	char buf[256];
	va_list ap;

	va_start(ap, str);
	vsnprintf(buf, sizeof(buf), str, ap);
	va_end(ap);

	printk("%s", buf);
}

static void __init setup_processor(void)
{
	struct cpu_info *cpu_info;

	/*
	 * locate processor in the list of supported processor
	 * types.  The linker builds this table for us from the
	 * entries in arch/arm/mm/proc.S
	 */
	cpu_info = lookup_processor_type(read_cpuid_id());
	if (!cpu_info) {
		printk("CPU configuration botched (ID %08x), unable to continue.\n",
		       read_cpuid_id());
		while (1);
	}

	cpu_name = cpu_info->cpu_name;

	printk("CPU: %s [%08x] revision %d\n",
	       cpu_name, read_cpuid_id(), read_cpuid_id() & 15);

	sprintf(init_utsname()->machine, "aarch64");
	elf_hwcap = 0;
}

static void __init setup_machine_fdt(phys_addr_t dt_phys)
{
	struct boot_param_header *devtree;
	unsigned long dt_root;

	/* Check we have a non-NULL DT pointer */
	if (!dt_phys) {
		early_print("\n"
			"Error: NULL or invalid device tree blob\n"
			"The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
			"\nPlease check your bootloader.\n");

		while (true)
			cpu_relax();

	}

	devtree = phys_to_virt(dt_phys);

	/* Check device tree validity */
	if (be32_to_cpu(devtree->magic) != OF_DT_HEADER) {
		early_print("\n"
			"Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"
			"Expected 0x%x, found 0x%x\n"
			"\nPlease check your bootloader.\n",
			dt_phys, devtree, OF_DT_HEADER,
			be32_to_cpu(devtree->magic));

		while (true)
			cpu_relax();
	}

	initial_boot_params = devtree;
	dt_root = of_get_flat_dt_root();

	machine_name = of_get_flat_dt_prop(dt_root, "model", NULL);
	if (!machine_name)
		machine_name = of_get_flat_dt_prop(dt_root, "compatible", NULL);
	if (!machine_name)
		machine_name = "<unknown>";
	pr_info("Machine: %s\n", machine_name);

	/* Retrieve various information from the /chosen node */
	of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
	/* Initialize {size,address}-cells info */
	of_scan_flat_dt(early_init_dt_scan_root, NULL);
	/* Setup memory, calling early_init_dt_add_memory_arch */
	of_scan_flat_dt(early_init_dt_scan_memory, NULL);
}

void __init early_init_dt_add_memory_arch(u64 base, u64 size)
{
	base &= PAGE_MASK;
	size &= PAGE_MASK;
	if (base + size < PHYS_OFFSET) {
		pr_warning("Ignoring memory block 0x%llx - 0x%llx\n",
			   base, base + size);
		return;
	}
	if (base < PHYS_OFFSET) {
		pr_warning("Ignoring memory range 0x%llx - 0x%llx\n",
			   base, PHYS_OFFSET);
		size -= PHYS_OFFSET - base;
		base = PHYS_OFFSET;
	}
	memblock_add(base, size);
}

void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
{
	return __va(memblock_alloc(size, align));
}

/*
 * Limit the memory size that was specified via FDT.
 */
static int __init early_mem(char *p)
{
	phys_addr_t limit;

	if (!p)
		return 1;

	limit = memparse(p, &p) & PAGE_MASK;
	pr_notice("Memory limited to %lldMB\n", limit >> 20);

	memblock_enforce_memory_limit(limit);

	return 0;
}
early_param("mem", early_mem);

static void __init request_standard_resources(void)
{
	struct memblock_region *region;
	struct resource *res;

	kernel_code.start   = virt_to_phys(_text);
	kernel_code.end     = virt_to_phys(_etext - 1);
	kernel_data.start   = virt_to_phys(_sdata);
	kernel_data.end     = virt_to_phys(_end - 1);

	for_each_memblock(memory, region) {
		res = alloc_bootmem_low(sizeof(*res));
		res->name  = "System RAM";
		res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
		res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
		res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;

		request_resource(&iomem_resource, res);

		if (kernel_code.start >= res->start &&
		    kernel_code.end <= res->end)
			request_resource(res, &kernel_code);
		if (kernel_data.start >= res->start &&
		    kernel_data.end <= res->end)
			request_resource(res, &kernel_data);
	}
}

u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };

void __init setup_arch(char **cmdline_p)
{
	setup_processor();

	setup_machine_fdt(__fdt_pointer);

	init_mm.start_code = (unsigned long) _text;
	init_mm.end_code   = (unsigned long) _etext;
	init_mm.end_data   = (unsigned long) _edata;
	init_mm.brk	   = (unsigned long) _end;

	*cmdline_p = boot_command_line;

	parse_early_param();

	arm64_memblock_init();

	paging_init();
	request_standard_resources();

	unflatten_device_tree();

	psci_init();

	cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
#ifdef CONFIG_SMP
	smp_init_cpus();
#endif

#ifdef CONFIG_VT
#if defined(CONFIG_VGA_CONSOLE)
	conswitchp = &vga_con;
#elif defined(CONFIG_DUMMY_CONSOLE)
	conswitchp = &dummy_con;
#endif
#endif
}

static int __init arm64_of_clk_init(void)
{
	of_clk_init(NULL);
	return 0;
}
arch_initcall(arm64_of_clk_init);

static DEFINE_PER_CPU(struct cpu, cpu_data);

static int __init topology_init(void)
{
	int i;

	for_each_possible_cpu(i) {
		struct cpu *cpu = &per_cpu(cpu_data, i);
		cpu->hotpluggable = 1;
		register_cpu(cpu, i);
	}

	return 0;
}
subsys_initcall(topology_init);

static int __init arm64_device_probe(void)
{
	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
	return 0;
}
device_initcall(arm64_device_probe);

static const char *hwcap_str[] = {
	"fp",
	"asimd",
	NULL
};

static int c_show(struct seq_file *m, void *v)
{
	int i;

	seq_printf(m, "Processor\t: %s rev %d (%s)\n",
		   cpu_name, read_cpuid_id() & 15, ELF_PLATFORM);

	for_each_online_cpu(i) {
		/*
		 * glibc reads /proc/cpuinfo to determine the number of
		 * online processors, looking for lines beginning with
		 * "processor".  Give glibc what it expects.
		 */
#ifdef CONFIG_SMP
		seq_printf(m, "processor\t: %d\n", i);
#endif
		seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
			   loops_per_jiffy / (500000UL/HZ),
			   loops_per_jiffy / (5000UL/HZ) % 100);
	}

	/* dump out the processor features */
	seq_puts(m, "Features\t: ");

	for (i = 0; hwcap_str[i]; i++)
		if (elf_hwcap & (1 << i))
			seq_printf(m, "%s ", hwcap_str[i]);

	seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
	seq_printf(m, "CPU architecture: AArch64\n");
	seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15);
	seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff);
	seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);

	seq_puts(m, "\n");

	seq_printf(m, "Hardware\t: %s\n", machine_name);

	return 0;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	return *pos < 1 ? (void *)1 : NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return NULL;
}

static void c_stop(struct seq_file *m, void *v)
{
}

const struct seq_operations cpuinfo_op = {
	.start	= c_start,
	.next	= c_next,
	.stop	= c_stop,
	.show	= c_show
};
Commit	Line	Data
9703d9d7 CM	1	/*
	2	* Based on arch/arm/kernel/setup.c
	3	*
	4	* Copyright (C) 1995-2001 Russell King
	5	* Copyright (C) 2012 ARM Ltd.
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#include <linux/export.h>
	21	#include <linux/kernel.h>
	22	#include <linux/stddef.h>
	23	#include <linux/ioport.h>
	24	#include <linux/delay.h>
	25	#include <linux/utsname.h>
	26	#include <linux/initrd.h>
	27	#include <linux/console.h>
	28	#include <linux/bootmem.h>
	29	#include <linux/seq_file.h>
	30	#include <linux/screen_info.h>
	31	#include <linux/init.h>
	32	#include <linux/kexec.h>
	33	#include <linux/crash_dump.h>
	34	#include <linux/root_dev.h>
de79a64d	35	#include <linux/clk-provider.h>
9703d9d7 CM	36	#include <linux/cpu.h>
	37	#include <linux/interrupt.h>
	38	#include <linux/smp.h>
	39	#include <linux/fs.h>
	40	#include <linux/proc_fs.h>
	41	#include <linux/memblock.h>
	42	#include <linux/of_fdt.h>
d6bafb9b	43	#include <linux/of_platform.h>
9703d9d7 CM	44
	45	#include <asm/cputype.h>
	46	#include <asm/elf.h>
	47	#include <asm/cputable.h>
	48	#include <asm/sections.h>
	49	#include <asm/setup.h>
4c7aa002	50	#include <asm/smp_plat.h>
9703d9d7 CM	51	#include <asm/cacheflush.h>
	52	#include <asm/tlbflush.h>
	53	#include <asm/traps.h>
	54	#include <asm/memblock.h>
e790f1de	55	#include <asm/psci.h>
9703d9d7 CM	56
	57	unsigned int processor_id;
	58	EXPORT_SYMBOL(processor_id);
	59
	60	unsigned int elf_hwcap __read_mostly;
	61	EXPORT_SYMBOL_GPL(elf_hwcap);
	62
	63	static const char *cpu_name;
	64	static const char *machine_name;
	65	phys_addr_t __fdt_pointer __initdata;
	66
	67	/*
	68	* Standard memory resources
	69	*/
	70	static struct resource mem_res[] = {
	71	{
	72	.name = "Kernel code",
	73	.start = 0,
	74	.end = 0,
	75	.flags = IORESOURCE_MEM
	76	},
	77	{
	78	.name = "Kernel data",
	79	.start = 0,
	80	.end = 0,
	81	.flags = IORESOURCE_MEM
	82	}
	83	};
	84
	85	#define kernel_code mem_res[0]
	86	#define kernel_data mem_res[1]
	87
	88	void __init early_print(const char *str, ...)
	89	{
	90	char buf[256];
	91	va_list ap;
	92
	93	va_start(ap, str);
	94	vsnprintf(buf, sizeof(buf), str, ap);
	95	va_end(ap);
	96
	97	printk("%s", buf);
	98	}
	99
	100	static void __init setup_processor(void)
	101	{
	102	struct cpu_info *cpu_info;
	103
	104	/*
	105	* locate processor in the list of supported processor
	106	* types. The linker builds this table for us from the
	107	* entries in arch/arm/mm/proc.S
	108	*/
	109	cpu_info = lookup_processor_type(read_cpuid_id());
	110	if (!cpu_info) {
	111	printk("CPU configuration botched (ID %08x), unable to continue.\n",
	112	read_cpuid_id());
	113	while (1);
	114	}
	115
	116	cpu_name = cpu_info->cpu_name;
	117
	118	printk("CPU: %s [%08x] revision %d\n",
	119	cpu_name, read_cpuid_id(), read_cpuid_id() & 15);
120
121	sprintf(init_utsname()->machine, "aarch64");
122	elf_hwcap = 0;
123	}
124
125	static void __init setup_machine_fdt(phys_addr_t dt_phys)
126	{
127	struct boot_param_header *devtree;
128	unsigned long dt_root;
129
130	/* Check we have a non-NULL DT pointer */
131	if (!dt_phys) {
132	early_print("\n"
133	"Error: NULL or invalid device tree blob\n"
134	"The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
135	"\nPlease check your bootloader.\n");
136
137	while (true)
138	cpu_relax();
139
140	}
141
142	devtree = phys_to_virt(dt_phys);
143
144	/* Check device tree validity */
145	if (be32_to_cpu(devtree->magic) != OF_DT_HEADER) {
146	early_print("\n"
147	"Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"
148	"Expected 0x%x, found 0x%x\n"
149	"\nPlease check your bootloader.\n",
150	dt_phys, devtree, OF_DT_HEADER,
151	be32_to_cpu(devtree->magic));
152
153	while (true)
154	cpu_relax();
155	}
156
157	initial_boot_params = devtree;
158	dt_root = of_get_flat_dt_root();
159
160	machine_name = of_get_flat_dt_prop(dt_root, "model", NULL);
161	if (!machine_name)
162	machine_name = of_get_flat_dt_prop(dt_root, "compatible", NULL);
163	if (!machine_name)
164	machine_name = "<unknown>";
165	pr_info("Machine: %s\n", machine_name);
166
167	/* Retrieve various information from the /chosen node */
168	of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
169	/* Initialize {size,address}-cells info */
170	of_scan_flat_dt(early_init_dt_scan_root, NULL);
171	/* Setup memory, calling early_init_dt_add_memory_arch */
172	of_scan_flat_dt(early_init_dt_scan_memory, NULL);
173	}
174
175	void __init early_init_dt_add_memory_arch(u64 base, u64 size)
176	{
f71a1a42	177	base &= PAGE_MASK;
9703d9d7	178	size &= PAGE_MASK;
f71a1a42 CM	179	if (base + size < PHYS_OFFSET) {
	180	pr_warning("Ignoring memory block 0x%llx - 0x%llx\n",
	181	base, base + size);
	182	return;
	183	}
	184	if (base < PHYS_OFFSET) {
	185	pr_warning("Ignoring memory range 0x%llx - 0x%llx\n",
	186	base, PHYS_OFFSET);
	187	size -= PHYS_OFFSET - base;
	188	base = PHYS_OFFSET;
	189	}
9703d9d7 CM	190	memblock_add(base, size);
	191	}
	192
	193	void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
	194	{
	195	return __va(memblock_alloc(size, align));
	196	}
	197
	198	/*
	199	* Limit the memory size that was specified via FDT.
	200	*/
	201	static int __init early_mem(char *p)
	202	{
	203	phys_addr_t limit;
	204
	205	if (!p)
	206	return 1;
	207
	208	limit = memparse(p, &p) & PAGE_MASK;
	209	pr_notice("Memory limited to %lldMB\n", limit >> 20);
	210
	211	memblock_enforce_memory_limit(limit);
	212
	213	return 0;
	214	}
	215	early_param("mem", early_mem);
	216
	217	static void __init request_standard_resources(void)
	218	{
	219	struct memblock_region *region;
	220	struct resource *res;
	221
	222	kernel_code.start = virt_to_phys(_text);
	223	kernel_code.end = virt_to_phys(_etext - 1);
	224	kernel_data.start = virt_to_phys(_sdata);
	225	kernel_data.end = virt_to_phys(_end - 1);
	226
	227	for_each_memblock(memory, region) {
	228	res = alloc_bootmem_low(sizeof(*res));
	229	res->name = "System RAM";
	230	res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
	231	res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
	232	res->flags = IORESOURCE_MEM \| IORESOURCE_BUSY;
	233
	234	request_resource(&iomem_resource, res);
	235
	236	if (kernel_code.start >= res->start &&
	237	kernel_code.end <= res->end)
	238	request_resource(res, &kernel_code);
	239	if (kernel_data.start >= res->start &&
	240	kernel_data.end <= res->end)
	241	request_resource(res, &kernel_data);
	242	}
	243	}
	244
4c7aa002 JM	245	u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
4c7aa002 JM	246
9703d9d7 CM	247	void __init setup_arch(char **cmdline_p)
	248	{
	249	setup_processor();
	250
	251	setup_machine_fdt(__fdt_pointer);
	252
	253	init_mm.start_code = (unsigned long) _text;
	254	init_mm.end_code = (unsigned long) _etext;
	255	init_mm.end_data = (unsigned long) _edata;
	256	init_mm.brk = (unsigned long) _end;
	257
	258	*cmdline_p = boot_command_line;
	259
	260	parse_early_param();
	261
	262	arm64_memblock_init();
	263
	264	paging_init();
	265	request_standard_resources();
	266
	267	unflatten_device_tree();
	268
e790f1de WD	269	psci_init();
e790f1de WD	270
4c7aa002	271	cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
9703d9d7 CM	272	#ifdef CONFIG_SMP
	273	smp_init_cpus();
	274	#endif
	275
	276	#ifdef CONFIG_VT
	277	#if defined(CONFIG_VGA_CONSOLE)
	278	conswitchp = &vga_con;
	279	#elif defined(CONFIG_DUMMY_CONSOLE)
	280	conswitchp = &dummy_con;
	281	#endif
	282	#endif
	283	}
	284
de79a64d CM	285	static int __init arm64_of_clk_init(void)
	286	{
	287	of_clk_init(NULL);
	288	return 0;
	289	}
	290	arch_initcall(arm64_of_clk_init);
	291
9703d9d7 CM	292	static DEFINE_PER_CPU(struct cpu, cpu_data);
	293
	294	static int __init topology_init(void)
	295	{
	296	int i;
	297
	298	for_each_possible_cpu(i) {
	299	struct cpu *cpu = &per_cpu(cpu_data, i);
	300	cpu->hotpluggable = 1;
	301	register_cpu(cpu, i);
	302	}
	303
	304	return 0;
	305	}
	306	subsys_initcall(topology_init);
	307
d6bafb9b CM	308	static int __init arm64_device_probe(void)
	309	{
	310	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
	311	return 0;
	312	}
	313	device_initcall(arm64_device_probe);
	314
9703d9d7 CM	315	static const char *hwcap_str[] = {
	316	"fp",
	317	"asimd",
	318	NULL
	319	};
	320
	321	static int c_show(struct seq_file m, void v)
	322	{
	323	int i;
	324
	325	seq_printf(m, "Processor\t: %s rev %d (%s)\n",
	326	cpu_name, read_cpuid_id() & 15, ELF_PLATFORM);
	327
	328	for_each_online_cpu(i) {
	329	/*
	330	* glibc reads /proc/cpuinfo to determine the number of
	331	* online processors, looking for lines beginning with
	332	* "processor". Give glibc what it expects.
	333	*/
	334	#ifdef CONFIG_SMP
	335	seq_printf(m, "processor\t: %d\n", i);
	336	#endif
	337	seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
	338	loops_per_jiffy / (500000UL/HZ),
	339	loops_per_jiffy / (5000UL/HZ) % 100);
	340	}
	341
	342	/* dump out the processor features */
	343	seq_puts(m, "Features\t: ");
	344
	345	for (i = 0; hwcap_str[i]; i++)
	346	if (elf_hwcap & (1 << i))
	347	seq_printf(m, "%s ", hwcap_str[i]);
	348
	349	seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
	350	seq_printf(m, "CPU architecture: AArch64\n");
	351	seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15);
	352	seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff);
	353	seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
	354
	355	seq_puts(m, "\n");
	356
	357	seq_printf(m, "Hardware\t: %s\n", machine_name);
	358
	359	return 0;
	360	}
	361
	362	static void c_start(struct seq_file m, loff_t *pos)
	363	{
	364	return pos < 1 ? (void )1 : NULL;
	365	}
	366
	367	static void c_next(struct seq_file m, void v, loff_t pos)
	368	{
	369	++*pos;
	370	return NULL;
	371	}
	372
	373	static void c_stop(struct seq_file m, void v)
	374	{
	375	}
	376
	377	const struct seq_operations cpuinfo_op = {
	378	.start = c_start,
379	.next = c_next,
380	.stop = c_stop,
381	.show = c_show
382	};