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9703d9d7 CM |
1 | /* |
2 | * Based on arch/arm/kernel/setup.c | |
3 | * | |
4 | * Copyright (C) 1995-2001 Russell King | |
5 | * Copyright (C) 2012 ARM Ltd. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include <linux/export.h> | |
21 | #include <linux/kernel.h> | |
22 | #include <linux/stddef.h> | |
23 | #include <linux/ioport.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/utsname.h> | |
26 | #include <linux/initrd.h> | |
27 | #include <linux/console.h> | |
28 | #include <linux/bootmem.h> | |
29 | #include <linux/seq_file.h> | |
30 | #include <linux/screen_info.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/kexec.h> | |
33 | #include <linux/crash_dump.h> | |
34 | #include <linux/root_dev.h> | |
de79a64d | 35 | #include <linux/clk-provider.h> |
9703d9d7 CM |
36 | #include <linux/cpu.h> |
37 | #include <linux/interrupt.h> | |
38 | #include <linux/smp.h> | |
39 | #include <linux/fs.h> | |
40 | #include <linux/proc_fs.h> | |
41 | #include <linux/memblock.h> | |
42 | #include <linux/of_fdt.h> | |
d6bafb9b | 43 | #include <linux/of_platform.h> |
9703d9d7 CM |
44 | |
45 | #include <asm/cputype.h> | |
46 | #include <asm/elf.h> | |
47 | #include <asm/cputable.h> | |
e8765b26 | 48 | #include <asm/cpu_ops.h> |
9703d9d7 CM |
49 | #include <asm/sections.h> |
50 | #include <asm/setup.h> | |
4c7aa002 | 51 | #include <asm/smp_plat.h> |
9703d9d7 CM |
52 | #include <asm/cacheflush.h> |
53 | #include <asm/tlbflush.h> | |
54 | #include <asm/traps.h> | |
55 | #include <asm/memblock.h> | |
e790f1de | 56 | #include <asm/psci.h> |
9703d9d7 CM |
57 | |
58 | unsigned int processor_id; | |
59 | EXPORT_SYMBOL(processor_id); | |
60 | ||
25804e6a | 61 | unsigned long elf_hwcap __read_mostly; |
9703d9d7 CM |
62 | EXPORT_SYMBOL_GPL(elf_hwcap); |
63 | ||
64 | static const char *cpu_name; | |
65 | static const char *machine_name; | |
66 | phys_addr_t __fdt_pointer __initdata; | |
67 | ||
68 | /* | |
69 | * Standard memory resources | |
70 | */ | |
71 | static struct resource mem_res[] = { | |
72 | { | |
73 | .name = "Kernel code", | |
74 | .start = 0, | |
75 | .end = 0, | |
76 | .flags = IORESOURCE_MEM | |
77 | }, | |
78 | { | |
79 | .name = "Kernel data", | |
80 | .start = 0, | |
81 | .end = 0, | |
82 | .flags = IORESOURCE_MEM | |
83 | } | |
84 | }; | |
85 | ||
86 | #define kernel_code mem_res[0] | |
87 | #define kernel_data mem_res[1] | |
88 | ||
89 | void __init early_print(const char *str, ...) | |
90 | { | |
91 | char buf[256]; | |
92 | va_list ap; | |
93 | ||
94 | va_start(ap, str); | |
95 | vsnprintf(buf, sizeof(buf), str, ap); | |
96 | va_end(ap); | |
97 | ||
98 | printk("%s", buf); | |
99 | } | |
100 | ||
101 | static void __init setup_processor(void) | |
102 | { | |
103 | struct cpu_info *cpu_info; | |
104 | ||
105 | /* | |
106 | * locate processor in the list of supported processor | |
107 | * types. The linker builds this table for us from the | |
108 | * entries in arch/arm/mm/proc.S | |
109 | */ | |
110 | cpu_info = lookup_processor_type(read_cpuid_id()); | |
111 | if (!cpu_info) { | |
112 | printk("CPU configuration botched (ID %08x), unable to continue.\n", | |
113 | read_cpuid_id()); | |
114 | while (1); | |
115 | } | |
116 | ||
117 | cpu_name = cpu_info->cpu_name; | |
118 | ||
119 | printk("CPU: %s [%08x] revision %d\n", | |
120 | cpu_name, read_cpuid_id(), read_cpuid_id() & 15); | |
121 | ||
94ed1f2c | 122 | sprintf(init_utsname()->machine, ELF_PLATFORM); |
9703d9d7 CM |
123 | elf_hwcap = 0; |
124 | } | |
125 | ||
126 | static void __init setup_machine_fdt(phys_addr_t dt_phys) | |
127 | { | |
128 | struct boot_param_header *devtree; | |
129 | unsigned long dt_root; | |
130 | ||
131 | /* Check we have a non-NULL DT pointer */ | |
132 | if (!dt_phys) { | |
133 | early_print("\n" | |
134 | "Error: NULL or invalid device tree blob\n" | |
135 | "The dtb must be 8-byte aligned and passed in the first 512MB of memory\n" | |
136 | "\nPlease check your bootloader.\n"); | |
137 | ||
138 | while (true) | |
139 | cpu_relax(); | |
140 | ||
141 | } | |
142 | ||
143 | devtree = phys_to_virt(dt_phys); | |
144 | ||
145 | /* Check device tree validity */ | |
146 | if (be32_to_cpu(devtree->magic) != OF_DT_HEADER) { | |
147 | early_print("\n" | |
148 | "Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n" | |
149 | "Expected 0x%x, found 0x%x\n" | |
150 | "\nPlease check your bootloader.\n", | |
151 | dt_phys, devtree, OF_DT_HEADER, | |
152 | be32_to_cpu(devtree->magic)); | |
153 | ||
154 | while (true) | |
155 | cpu_relax(); | |
156 | } | |
157 | ||
158 | initial_boot_params = devtree; | |
159 | dt_root = of_get_flat_dt_root(); | |
160 | ||
161 | machine_name = of_get_flat_dt_prop(dt_root, "model", NULL); | |
162 | if (!machine_name) | |
163 | machine_name = of_get_flat_dt_prop(dt_root, "compatible", NULL); | |
164 | if (!machine_name) | |
165 | machine_name = "<unknown>"; | |
166 | pr_info("Machine: %s\n", machine_name); | |
167 | ||
168 | /* Retrieve various information from the /chosen node */ | |
169 | of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line); | |
170 | /* Initialize {size,address}-cells info */ | |
171 | of_scan_flat_dt(early_init_dt_scan_root, NULL); | |
172 | /* Setup memory, calling early_init_dt_add_memory_arch */ | |
173 | of_scan_flat_dt(early_init_dt_scan_memory, NULL); | |
174 | } | |
175 | ||
176 | void __init early_init_dt_add_memory_arch(u64 base, u64 size) | |
177 | { | |
f71a1a42 | 178 | base &= PAGE_MASK; |
9703d9d7 | 179 | size &= PAGE_MASK; |
f71a1a42 CM |
180 | if (base + size < PHYS_OFFSET) { |
181 | pr_warning("Ignoring memory block 0x%llx - 0x%llx\n", | |
182 | base, base + size); | |
183 | return; | |
184 | } | |
185 | if (base < PHYS_OFFSET) { | |
186 | pr_warning("Ignoring memory range 0x%llx - 0x%llx\n", | |
187 | base, PHYS_OFFSET); | |
188 | size -= PHYS_OFFSET - base; | |
189 | base = PHYS_OFFSET; | |
190 | } | |
9703d9d7 CM |
191 | memblock_add(base, size); |
192 | } | |
193 | ||
9703d9d7 CM |
194 | /* |
195 | * Limit the memory size that was specified via FDT. | |
196 | */ | |
197 | static int __init early_mem(char *p) | |
198 | { | |
199 | phys_addr_t limit; | |
200 | ||
201 | if (!p) | |
202 | return 1; | |
203 | ||
204 | limit = memparse(p, &p) & PAGE_MASK; | |
205 | pr_notice("Memory limited to %lldMB\n", limit >> 20); | |
206 | ||
207 | memblock_enforce_memory_limit(limit); | |
208 | ||
209 | return 0; | |
210 | } | |
211 | early_param("mem", early_mem); | |
212 | ||
213 | static void __init request_standard_resources(void) | |
214 | { | |
215 | struct memblock_region *region; | |
216 | struct resource *res; | |
217 | ||
218 | kernel_code.start = virt_to_phys(_text); | |
219 | kernel_code.end = virt_to_phys(_etext - 1); | |
220 | kernel_data.start = virt_to_phys(_sdata); | |
221 | kernel_data.end = virt_to_phys(_end - 1); | |
222 | ||
223 | for_each_memblock(memory, region) { | |
224 | res = alloc_bootmem_low(sizeof(*res)); | |
225 | res->name = "System RAM"; | |
226 | res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region)); | |
227 | res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1; | |
228 | res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; | |
229 | ||
230 | request_resource(&iomem_resource, res); | |
231 | ||
232 | if (kernel_code.start >= res->start && | |
233 | kernel_code.end <= res->end) | |
234 | request_resource(res, &kernel_code); | |
235 | if (kernel_data.start >= res->start && | |
236 | kernel_data.end <= res->end) | |
237 | request_resource(res, &kernel_data); | |
238 | } | |
239 | } | |
240 | ||
4c7aa002 JM |
241 | u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID }; |
242 | ||
9703d9d7 CM |
243 | void __init setup_arch(char **cmdline_p) |
244 | { | |
245 | setup_processor(); | |
246 | ||
247 | setup_machine_fdt(__fdt_pointer); | |
248 | ||
249 | init_mm.start_code = (unsigned long) _text; | |
250 | init_mm.end_code = (unsigned long) _etext; | |
251 | init_mm.end_data = (unsigned long) _edata; | |
252 | init_mm.brk = (unsigned long) _end; | |
253 | ||
254 | *cmdline_p = boot_command_line; | |
255 | ||
256 | parse_early_param(); | |
257 | ||
258 | arm64_memblock_init(); | |
259 | ||
260 | paging_init(); | |
261 | request_standard_resources(); | |
262 | ||
263 | unflatten_device_tree(); | |
264 | ||
e790f1de WD |
265 | psci_init(); |
266 | ||
4c7aa002 | 267 | cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; |
e8765b26 | 268 | cpu_read_bootcpu_ops(); |
9703d9d7 CM |
269 | #ifdef CONFIG_SMP |
270 | smp_init_cpus(); | |
271 | #endif | |
272 | ||
273 | #ifdef CONFIG_VT | |
274 | #if defined(CONFIG_VGA_CONSOLE) | |
275 | conswitchp = &vga_con; | |
276 | #elif defined(CONFIG_DUMMY_CONSOLE) | |
277 | conswitchp = &dummy_con; | |
278 | #endif | |
279 | #endif | |
280 | } | |
281 | ||
c560ecfe | 282 | static int __init arm64_device_init(void) |
de79a64d CM |
283 | { |
284 | of_clk_init(NULL); | |
c560ecfe | 285 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
de79a64d CM |
286 | return 0; |
287 | } | |
c560ecfe | 288 | arch_initcall(arm64_device_init); |
de79a64d | 289 | |
9703d9d7 CM |
290 | static DEFINE_PER_CPU(struct cpu, cpu_data); |
291 | ||
292 | static int __init topology_init(void) | |
293 | { | |
294 | int i; | |
295 | ||
296 | for_each_possible_cpu(i) { | |
297 | struct cpu *cpu = &per_cpu(cpu_data, i); | |
298 | cpu->hotpluggable = 1; | |
299 | register_cpu(cpu, i); | |
300 | } | |
301 | ||
302 | return 0; | |
303 | } | |
304 | subsys_initcall(topology_init); | |
305 | ||
306 | static const char *hwcap_str[] = { | |
307 | "fp", | |
308 | "asimd", | |
309 | NULL | |
310 | }; | |
311 | ||
312 | static int c_show(struct seq_file *m, void *v) | |
313 | { | |
314 | int i; | |
315 | ||
316 | seq_printf(m, "Processor\t: %s rev %d (%s)\n", | |
317 | cpu_name, read_cpuid_id() & 15, ELF_PLATFORM); | |
318 | ||
319 | for_each_online_cpu(i) { | |
320 | /* | |
321 | * glibc reads /proc/cpuinfo to determine the number of | |
322 | * online processors, looking for lines beginning with | |
323 | * "processor". Give glibc what it expects. | |
324 | */ | |
325 | #ifdef CONFIG_SMP | |
326 | seq_printf(m, "processor\t: %d\n", i); | |
327 | #endif | |
9703d9d7 CM |
328 | } |
329 | ||
330 | /* dump out the processor features */ | |
331 | seq_puts(m, "Features\t: "); | |
332 | ||
333 | for (i = 0; hwcap_str[i]; i++) | |
334 | if (elf_hwcap & (1 << i)) | |
335 | seq_printf(m, "%s ", hwcap_str[i]); | |
336 | ||
337 | seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24); | |
338 | seq_printf(m, "CPU architecture: AArch64\n"); | |
339 | seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15); | |
340 | seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff); | |
341 | seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15); | |
342 | ||
343 | seq_puts(m, "\n"); | |
344 | ||
345 | seq_printf(m, "Hardware\t: %s\n", machine_name); | |
346 | ||
347 | return 0; | |
348 | } | |
349 | ||
350 | static void *c_start(struct seq_file *m, loff_t *pos) | |
351 | { | |
352 | return *pos < 1 ? (void *)1 : NULL; | |
353 | } | |
354 | ||
355 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
356 | { | |
357 | ++*pos; | |
358 | return NULL; | |
359 | } | |
360 | ||
361 | static void c_stop(struct seq_file *m, void *v) | |
362 | { | |
363 | } | |
364 | ||
365 | const struct seq_operations cpuinfo_op = { | |
366 | .start = c_start, | |
367 | .next = c_next, | |
368 | .stop = c_stop, | |
369 | .show = c_show | |
370 | }; |