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1#include <linux/errno.h>
2#include <linux/linkage.h>
3#include <asm/asm-offsets.h>
4#include <asm/assembler.h>
5
6 .text
7/*
8 * Implementation of MPIDR_EL1 hash algorithm through shifting
9 * and OR'ing.
10 *
11 * @dst: register containing hash result
12 * @rs0: register containing affinity level 0 bit shift
13 * @rs1: register containing affinity level 1 bit shift
14 * @rs2: register containing affinity level 2 bit shift
15 * @rs3: register containing affinity level 3 bit shift
16 * @mpidr: register containing MPIDR_EL1 value
17 * @mask: register containing MPIDR mask
18 *
19 * Pseudo C-code:
20 *
21 *u32 dst;
22 *
23 *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 rs3, u64 mpidr, u64 mask) {
24 * u32 aff0, aff1, aff2, aff3;
25 * u64 mpidr_masked = mpidr & mask;
26 * aff0 = mpidr_masked & 0xff;
27 * aff1 = mpidr_masked & 0xff00;
28 * aff2 = mpidr_masked & 0xff0000;
29 * aff2 = mpidr_masked & 0xff00000000;
30 * dst = (aff0 >> rs0 | aff1 >> rs1 | aff2 >> rs2 | aff3 >> rs3);
31 *}
32 * Input registers: rs0, rs1, rs2, rs3, mpidr, mask
33 * Output register: dst
34 * Note: input and output registers must be disjoint register sets
35 (eg: a macro instance with mpidr = x1 and dst = x1 is invalid)
36 */
37 .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
38 and \mpidr, \mpidr, \mask // mask out MPIDR bits
39 and \dst, \mpidr, #0xff // mask=aff0
40 lsr \dst ,\dst, \rs0 // dst=aff0>>rs0
41 and \mask, \mpidr, #0xff00 // mask = aff1
42 lsr \mask ,\mask, \rs1
43 orr \dst, \dst, \mask // dst|=(aff1>>rs1)
44 and \mask, \mpidr, #0xff0000 // mask = aff2
45 lsr \mask ,\mask, \rs2
46 orr \dst, \dst, \mask // dst|=(aff2>>rs2)
47 and \mask, \mpidr, #0xff00000000 // mask = aff3
48 lsr \mask ,\mask, \rs3
49 orr \dst, \dst, \mask // dst|=(aff3>>rs3)
50 .endm
51/*
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52 * Save CPU state in the provided sleep_stack_data area, and publish its
53 * location for cpu_resume()'s use in sleep_save_stash.
95322526 54 *
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55 * cpu_resume() will restore this saved state, and return. Because the
56 * link-register is saved and restored, it will appear to return from this
57 * function. So that the caller can tell the suspend/resume paths apart,
58 * __cpu_suspend_enter() will always return a non-zero value, whereas the
59 * path through cpu_resume() will return 0.
60 *
61 * x0 = struct sleep_stack_data area
95322526 62 */
714f5992 63ENTRY(__cpu_suspend_enter)
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64 stp x29, lr, [x0, #SLEEP_STACK_DATA_CALLEE_REGS]
65 stp x19, x20, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+16]
66 stp x21, x22, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+32]
67 stp x23, x24, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+48]
68 stp x25, x26, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+64]
69 stp x27, x28, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+80]
70
71 /* save the sp in cpu_suspend_ctx */
95322526 72 mov x2, sp
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73 str x2, [x0, #SLEEP_STACK_DATA_SYSTEM_REGS + CPU_CTX_SP]
74
75 /* find the mpidr_hash */
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76 ldr x1, =sleep_save_stash
77 ldr x1, [x1]
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78 mrs x7, mpidr_el1
79 ldr x9, =mpidr_hash
80 ldr x10, [x9, #MPIDR_HASH_MASK]
81 /*
82 * Following code relies on the struct mpidr_hash
83 * members size.
84 */
85 ldp w3, w4, [x9, #MPIDR_HASH_SHIFTS]
86 ldp w5, w6, [x9, #(MPIDR_HASH_SHIFTS + 8)]
87 compute_mpidr_hash x8, x3, x4, x5, x6, x7, x10
714f5992 88 add x1, x1, x8, lsl #3
adc9b2df 89
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90 str x0, [x1]
91 add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
adc9b2df 92 stp x29, lr, [sp, #-16]!
cabe1c81 93 bl cpu_do_suspend
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94 ldp x29, lr, [sp], #16
95 mov x0, #1
95322526 96 ret
714f5992 97ENDPROC(__cpu_suspend_enter)
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98 .ltorg
99
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100ENTRY(cpu_resume)
101 bl el2_setup // if in EL2 drop to EL1 cleanly
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102 /* enable the MMU early - so we can access sleep_save_stash by va */
103 adr_l lr, __enable_mmu /* __cpu_setup will return here */
bc9f3d77 104 adr_l x27, _resume_switched /* __enable_mmu will branch here */
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105 adrp x25, idmap_pg_dir
106 adrp x26, swapper_pg_dir
107 b __cpu_setup
108ENDPROC(cpu_resume)
109
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110 .pushsection ".idmap.text", "ax"
111_resume_switched:
112 ldr x8, =_cpu_resume
113 br x8
114ENDPROC(_resume_switched)
115 .ltorg
116 .popsection
117
cabe1c81 118ENTRY(_cpu_resume)
95322526 119 mrs x1, mpidr_el1
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120 adrp x8, mpidr_hash
121 add x8, x8, #:lo12:mpidr_hash // x8 = struct mpidr_hash phys address
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122 /* retrieve mpidr_hash members to compute the hash */
123 ldr x2, [x8, #MPIDR_HASH_MASK]
124 ldp w3, w4, [x8, #MPIDR_HASH_SHIFTS]
125 ldp w5, w6, [x8, #(MPIDR_HASH_SHIFTS + 8)]
126 compute_mpidr_hash x7, x3, x4, x5, x6, x1, x2
127 /* x7 contains hash index, let's use it to grab context pointer */
cabe1c81 128 ldr_l x0, sleep_save_stash
95322526 129 ldr x0, [x0, x7, lsl #3]
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130 add x29, x0, #SLEEP_STACK_DATA_CALLEE_REGS
131 add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
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132 /* load sp from context */
133 ldr x2, [x0, #CPU_CTX_SP]
95322526 134 mov sp, x2
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135 /* save thread_info */
136 and x2, x2, #~(THREAD_SIZE - 1)
137 msr sp_el0, x2
95322526 138 /*
cabe1c81 139 * cpu_do_resume expects x0 to contain context address pointer
95322526 140 */
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141 bl cpu_do_resume
142
143#ifdef CONFIG_KASAN
144 mov x0, sp
145 bl kasan_unpoison_remaining_stack
146#endif
147
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148 ldp x19, x20, [x29, #16]
149 ldp x21, x22, [x29, #32]
150 ldp x23, x24, [x29, #48]
151 ldp x25, x26, [x29, #64]
152 ldp x27, x28, [x29, #80]
153 ldp x29, lr, [x29]
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154 mov x0, #0
155 ret
156ENDPROC(_cpu_resume)